From: Greg Kroah-Hartman Date: Thu, 16 Oct 2025 09:34:04 +0000 (+0200) Subject: 6.6-stable patches X-Git-Tag: v5.15.195~89 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=2f6d156d913195a73ea126442230711358880e09;p=thirdparty%2Fkernel%2Fstable-queue.git 6.6-stable patches added patches: drm-nouveau-fix-bad-ret-code-in-nouveau_bo_move_prep.patch drm-rcar-du-dsi-fix-1-2-3-lane-support.patch --- diff --git a/queue-6.6/drm-nouveau-fix-bad-ret-code-in-nouveau_bo_move_prep.patch b/queue-6.6/drm-nouveau-fix-bad-ret-code-in-nouveau_bo_move_prep.patch new file mode 100644 index 0000000000..53e75b1c9c --- /dev/null +++ b/queue-6.6/drm-nouveau-fix-bad-ret-code-in-nouveau_bo_move_prep.patch @@ -0,0 +1,34 @@ +From e4bea919584ff292c9156cf7d641a2ab3cbe27b0 Mon Sep 17 00:00:00 2001 +From: Shuhao Fu +Date: Wed, 8 Oct 2025 00:17:09 +0800 +Subject: drm/nouveau: fix bad ret code in nouveau_bo_move_prep + +From: Shuhao Fu + +commit e4bea919584ff292c9156cf7d641a2ab3cbe27b0 upstream. + +In `nouveau_bo_move_prep`, if `nouveau_mem_map` fails, an error code +should be returned. Currently, it returns zero even if vmm addr is not +correctly mapped. + +Cc: stable@vger.kernel.org +Reviewed-by: Petr Vorel +Signed-off-by: Shuhao Fu +Fixes: 9ce523cc3bf2 ("drm/nouveau: separate buffer object backing memory from nvkm structures") +Signed-off-by: Danilo Krummrich +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/nouveau/nouveau_bo.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/gpu/drm/nouveau/nouveau_bo.c ++++ b/drivers/gpu/drm/nouveau/nouveau_bo.c +@@ -836,7 +836,7 @@ done: + nvif_vmm_put(vmm, &old_mem->vma[1]); + nvif_vmm_put(vmm, &old_mem->vma[0]); + } +- return 0; ++ return ret; + } + + static int diff --git a/queue-6.6/drm-rcar-du-dsi-fix-1-2-3-lane-support.patch b/queue-6.6/drm-rcar-du-dsi-fix-1-2-3-lane-support.patch new file mode 100644 index 0000000000..5bae245264 --- /dev/null +++ b/queue-6.6/drm-rcar-du-dsi-fix-1-2-3-lane-support.patch @@ -0,0 +1,73 @@ +From d83f1d19c898ac1b54ae64d1c950f5beff801982 Mon Sep 17 00:00:00 2001 +From: Marek Vasut +Date: Wed, 13 Aug 2025 23:08:13 +0200 +Subject: drm/rcar-du: dsi: Fix 1/2/3 lane support + +From: Marek Vasut + +commit d83f1d19c898ac1b54ae64d1c950f5beff801982 upstream. + +Remove fixed PPI lane count setup. The R-Car DSI host is capable +of operating in 1..4 DSI lane mode. Remove the hard-coded 4-lane +configuration from PPI register settings and instead configure +the PPI lane count according to lane count information already +obtained by this driver instance. + +Configure TXSETR register to match PPI lane count. The R-Car V4H +Reference Manual R19UH0186EJ0121 Rev.1.21 section 67.2.2.3 Tx Set +Register (TXSETR), field LANECNT description indicates that the +TXSETR register LANECNT bitfield lane count must be configured +such, that it matches lane count configuration in PPISETR register +DLEN bitfield. Make sure the LANECNT and DLEN bitfields are +configured to match. + +Fixes: 155358310f01 ("drm: rcar-du: Add R-Car DSI driver") +Cc: stable@vger.kernel.org +Signed-off-by: Marek Vasut +Reviewed-by: Tomi Valkeinen +Link: https://lore.kernel.org/r/20250813210840.97621-1-marek.vasut+renesas@mailbox.org +Signed-off-by: Tomi Valkeinen +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c | 5 ++++- + drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h | 8 ++++---- + 2 files changed, 8 insertions(+), 5 deletions(-) + +--- a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c ++++ b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c +@@ -576,7 +576,10 @@ static int rcar_mipi_dsi_startup(struct + udelay(10); + rcar_mipi_dsi_clr(dsi, CLOCKSET1, CLOCKSET1_UPDATEPLL); + +- ppisetr = PPISETR_DLEN_3 | PPISETR_CLEN; ++ rcar_mipi_dsi_clr(dsi, TXSETR, TXSETR_LANECNT_MASK); ++ rcar_mipi_dsi_set(dsi, TXSETR, dsi->lanes - 1); ++ ++ ppisetr = ((BIT(dsi->lanes) - 1) & PPISETR_DLEN_MASK) | PPISETR_CLEN; + rcar_mipi_dsi_write(dsi, PPISETR, ppisetr); + + rcar_mipi_dsi_set(dsi, PHYSETUP, PHYSETUP_SHUTDOWNZ); +--- a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h ++++ b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h +@@ -12,6 +12,9 @@ + #define LINKSR_LPBUSY (1 << 1) + #define LINKSR_HSBUSY (1 << 0) + ++#define TXSETR 0x100 ++#define TXSETR_LANECNT_MASK (0x3 << 0) ++ + /* + * Video Mode Register + */ +@@ -80,10 +83,7 @@ + * PHY-Protocol Interface (PPI) Registers + */ + #define PPISETR 0x700 +-#define PPISETR_DLEN_0 (0x1 << 0) +-#define PPISETR_DLEN_1 (0x3 << 0) +-#define PPISETR_DLEN_2 (0x7 << 0) +-#define PPISETR_DLEN_3 (0xf << 0) ++#define PPISETR_DLEN_MASK (0xf << 0) + #define PPISETR_CLEN (1 << 8) + + #define PPICLCR 0x710 diff --git a/queue-6.6/series b/queue-6.6/series index 1757004305..7e0af6072d 100644 --- a/queue-6.6/series +++ b/queue-6.6/series @@ -76,3 +76,5 @@ media-mc-fix-must_connect-handling-for-pads-with-no-links.patch media-pci-ivtv-add-missing-check-after-dma-map.patch media-venus-firmware-use-correct-reset-sequence-for-iris2.patch media-lirc-fix-error-handling-in-lirc_register.patch +drm-rcar-du-dsi-fix-1-2-3-lane-support.patch +drm-nouveau-fix-bad-ret-code-in-nouveau_bo_move_prep.patch