From: Zhenzhong Duan Date: Thu, 25 Jan 2024 07:37:06 +0000 (+0800) Subject: smmu: Clear SMMUPciBus pointer cache when system reset X-Git-Tag: v7.2.10~40 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=3004edca488b945bb70c9706ece44cf6699bff30;p=thirdparty%2Fqemu.git smmu: Clear SMMUPciBus pointer cache when system reset s->smmu_pcibus_by_bus_num is a SMMUPciBus pointer cache indexed by bus number, bus number may not always be a fixed value, i.e., guest reboot to different kernel which set bus number with different algorithm. This could lead to smmu_iommu_mr() providing the wrong iommu MR. Suggested-by: Eric Auger Signed-off-by: Zhenzhong Duan Message-Id: <20240125073706.339369-3-zhenzhong.duan@intel.com> Reviewed-by: Eric Auger Tested-by: Eric Auger Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin (cherry picked from commit 8a6b3f4dc95a064e88adaca86374108da0ecb38d) Signed-off-by: Michael Tokarev --- diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c index bbca3a8db3c..7abc166eb34 100644 --- a/hw/arm/smmu-common.c +++ b/hw/arm/smmu-common.c @@ -529,6 +529,8 @@ static void smmu_base_reset(DeviceState *dev) { SMMUState *s = ARM_SMMU(dev); + memset(s->smmu_pcibus_by_bus_num, 0, sizeof(s->smmu_pcibus_by_bus_num)); + g_hash_table_remove_all(s->configs); g_hash_table_remove_all(s->iotlb); }