From: Jan Petrous (OSS) Date: Thu, 5 Dec 2024 16:42:58 +0000 (+0100) Subject: net: stmmac: Fix CSR divider comment X-Git-Tag: v6.14-rc1~162^2~253^2~14 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=31cdd8418234e70043abd26894b57eb201489cba;p=thirdparty%2Fkernel%2Flinux.git net: stmmac: Fix CSR divider comment The comment in declaration of STMMAC_CSR_250_300M incorrectly describes the constant as '/* MDC = clk_scr_i/122 */' but the DWC Ether QOS Handbook version 5.20a says it is CSR clock/124. Signed-off-by: Jan Petrous (OSS) Reviewed-by: Jacob Keller Reviewed-by: Russell King (Oracle) Link: https://patch.msgid.link/20241205-upstream_s32cc_gmac-v8-1-ec1d180df815@oss.nxp.com Signed-off-by: Jakub Kicinski --- diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h index d79ff252cfdc1..75cbfb5763582 100644 --- a/include/linux/stmmac.h +++ b/include/linux/stmmac.h @@ -33,7 +33,7 @@ #define STMMAC_CSR_20_35M 0x2 /* MDC = clk_scr_i/16 */ #define STMMAC_CSR_35_60M 0x3 /* MDC = clk_scr_i/26 */ #define STMMAC_CSR_150_250M 0x4 /* MDC = clk_scr_i/102 */ -#define STMMAC_CSR_250_300M 0x5 /* MDC = clk_scr_i/122 */ +#define STMMAC_CSR_250_300M 0x5 /* MDC = clk_scr_i/124 */ /* MTL algorithms identifiers */ #define MTL_TX_ALGORITHM_WRR 0x0