From: Greg Kroah-Hartman Date: Sun, 13 Jul 2025 14:52:27 +0000 (+0200) Subject: 5.15-stable patches X-Git-Tag: v5.15.188~27 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=333f8604fcca2acb2e64edd0bd44b0dfa351f247;p=thirdparty%2Fkernel%2Fstable-queue.git 5.15-stable patches added patches: pwm-mediatek-ensure-to-disable-clocks-in-error-path.patch --- diff --git a/queue-5.15/pwm-mediatek-ensure-to-disable-clocks-in-error-path.patch b/queue-5.15/pwm-mediatek-ensure-to-disable-clocks-in-error-path.patch new file mode 100644 index 0000000000..ded43b60ae --- /dev/null +++ b/queue-5.15/pwm-mediatek-ensure-to-disable-clocks-in-error-path.patch @@ -0,0 +1,67 @@ +From 505b730ede7f5c4083ff212aa955155b5b92e574 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= +Date: Fri, 4 Jul 2025 19:27:27 +0200 +Subject: pwm: mediatek: Ensure to disable clocks in error path +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Uwe Kleine-König + +commit 505b730ede7f5c4083ff212aa955155b5b92e574 upstream. + +After enabling the clocks each error path must disable the clocks again. +One of them failed to do so. Unify the error paths to use goto to make it +harder for future changes to add a similar bug. + +Fixes: 7ca59947b5fc ("pwm: mediatek: Prevent divide-by-zero in pwm_mediatek_config()") +Signed-off-by: Uwe Kleine-König +Link: https://lore.kernel.org/r/20250704172728.626815-2-u.kleine-koenig@baylibre.com +Cc: stable@vger.kernel.org +[ukleinek: backported to 5.15.y] +Signed-off-by: Uwe Kleine-König +Signed-off-by: Greg Kroah-Hartman +--- + drivers/pwm/pwm-mediatek.c | 15 +++++++++------ + 1 file changed, 9 insertions(+), 6 deletions(-) + +--- a/drivers/pwm/pwm-mediatek.c ++++ b/drivers/pwm/pwm-mediatek.c +@@ -129,8 +129,10 @@ static int pwm_mediatek_config(struct pw + return ret; + + clk_rate = clk_get_rate(pc->clk_pwms[pwm->hwpwm]); +- if (!clk_rate) +- return -EINVAL; ++ if (!clk_rate) { ++ ret = -EINVAL; ++ goto out; ++ } + + /* Make sure we use the bus clock and not the 26MHz clock */ + if (pc->soc->has_ck_26m_sel) +@@ -149,9 +151,9 @@ static int pwm_mediatek_config(struct pw + } + + if (clkdiv > PWM_CLK_DIV_MAX) { +- pwm_mediatek_clk_disable(chip, pwm); +- dev_err(chip->dev, "period %d not supported\n", period_ns); +- return -EINVAL; ++ dev_err(chip->dev, "period of %d ns not supported\n", period_ns); ++ ret = -EINVAL; ++ goto out; + } + + if (pc->soc->pwm45_fixup && pwm->hwpwm > 2) { +@@ -168,9 +170,10 @@ static int pwm_mediatek_config(struct pw + pwm_mediatek_writel(pc, pwm->hwpwm, reg_width, cnt_period); + pwm_mediatek_writel(pc, pwm->hwpwm, reg_thres, cnt_duty); + ++out: + pwm_mediatek_clk_disable(chip, pwm); + +- return 0; ++ return ret; + } + + static int pwm_mediatek_enable(struct pwm_chip *chip, struct pwm_device *pwm) diff --git a/queue-5.15/series b/queue-5.15/series index e69d5d5e4d..e176677d24 100644 --- a/queue-5.15/series +++ b/queue-5.15/series @@ -41,3 +41,4 @@ asoc-codecs-wcd9335-fix-missing-free-of-regulator-su.patch btrfs-propagate-last_unlink_trans-earlier-when-doing.patch btrfs-use-btrfs_record_snapshot_destroy-during-rmdir.patch rdma-mlx5-fix-vport-loopback-for-mpv-device.patch +pwm-mediatek-ensure-to-disable-clocks-in-error-path.patch