From: Yixun Lan Date: Wed, 16 Oct 2024 00:59:43 +0000 (+0800) Subject: riscv: dts: spacemit: add pinctrl property to uart0 in BPI-F3 X-Git-Tag: v6.14-rc1~104^2^2~1 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=3579b3506fac20abe5ed690d8a9863fc562678a4;p=thirdparty%2Flinux.git riscv: dts: spacemit: add pinctrl property to uart0 in BPI-F3 Before pinctrl driver implemented, the uart0 controller reply on bootloader for setting correct pin mux and configurations. Now, let's add pinctrl property to uart0 of Bananapi-F3 board. Signed-off-by: Yixun Lan --- diff --git a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts index 023274189b492..bc88d4de25a62 100644 --- a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts +++ b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts @@ -4,6 +4,7 @@ */ #include "k1.dtsi" +#include "k1-pinctrl.dtsi" / { model = "Banana Pi BPI-F3"; @@ -15,5 +16,7 @@ }; &uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_2_cfg>; status = "okay"; }; diff --git a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi new file mode 100644 index 0000000000000..a8eac5517f857 --- /dev/null +++ b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (c) 2024 Yixun Lan + */ + +#include + +#define K1_PADCONF(pin, func) (((pin) << 16) | (func)) + +&pinctrl { + uart0_2_cfg: uart0-2-cfg { + uart0-2-pins { + pinmux = , + ; + + bias-pull-up = <0>; + drive-strength = <32>; + }; + }; +}; diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi index 0777bf9e01183..a2d5f7d4a942a 100644 --- a/arch/riscv/boot/dts/spacemit/k1.dtsi +++ b/arch/riscv/boot/dts/spacemit/k1.dtsi @@ -416,6 +416,11 @@ status = "disabled"; }; + pinctrl: pinctrl@d401e000 { + compatible = "spacemit,k1-pinctrl"; + reg = <0x0 0xd401e000 0x0 0x400>; + }; + plic: interrupt-controller@e0000000 { compatible = "spacemit,k1-plic", "sifive,plic-1.0.0"; reg = <0x0 0xe0000000 0x0 0x4000000>;