From: Nicholas Piggin Date: Mon, 12 May 2025 03:10:47 +0000 (+1000) Subject: ppc/xive2: Avoid needless interrupt re-check on CPPR set X-Git-Tag: v10.1.0-rc0~2^2~12 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=370ea4a4b6fffc30324fc8f8134483e5a749114d;p=thirdparty%2Fqemu.git ppc/xive2: Avoid needless interrupt re-check on CPPR set When CPPR priority is decreased, pending interrupts do not need to be re-checked if one is already presented because by definition that will be the highest priority. This prevents a presented group interrupt from being lost. Signed-off-by: Nicholas Piggin Reviewed-by: Glenn Miles Reviewed-by: Michael Kowal Tested-by: Gautam Menghani Link: https://lore.kernel.org/qemu-devel/20250512031100.439842-39-npiggin@gmail.com Signed-off-by: Cédric Le Goater --- diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c index be945bef1c..531e6517ba 100644 --- a/hw/intc/xive2.c +++ b/hw/intc/xive2.c @@ -1250,7 +1250,9 @@ static void xive2_tctx_set_cppr(XiveTCTX *tctx, uint8_t sig_ring, uint8_t cppr) } /* CPPR priority decreased (higher value) */ - xive2_tctx_process_pending(tctx, sig_ring); + if (!xive_nsr_indicates_exception(sig_ring, nsr)) { + xive2_tctx_process_pending(tctx, sig_ring); + } } void xive2_tm_set_hv_cppr(XivePresenter *xptr, XiveTCTX *tctx,