From: Greg Kroah-Hartman Date: Wed, 11 Aug 2010 20:28:57 +0000 (-0700) Subject: .34 patches X-Git-Tag: v2.6.32.19~9 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=37597cff4be10bde358da998ecfe8502ad39dbce;p=thirdparty%2Fkernel%2Fstable-queue.git .34 patches --- diff --git a/queue-2.6.34/i915-fix-ironlake-edp-panel-setup-v4.patch b/queue-2.6.34/i915-fix-ironlake-edp-panel-setup-v4.patch new file mode 100644 index 00000000000..a83c31364bc --- /dev/null +++ b/queue-2.6.34/i915-fix-ironlake-edp-panel-setup-v4.patch @@ -0,0 +1,84 @@ +From fe27d53e5c597ee5ba5d72a29d517091f244e974 Mon Sep 17 00:00:00 2001 +From: Dave Airlie +Date: Wed, 30 Jun 2010 11:46:17 +1000 +Subject: i915: fix ironlake edp panel setup (v4) + +From: Dave Airlie + +commit fe27d53e5c597ee5ba5d72a29d517091f244e974 upstream. + +The eDP spec claims a 20% overhead for the 8:10 encoding scheme used +on the wire. Take this into account when picking the lane/clock speed +for the panel. + +v3: some panels are out of spec, try our best to deal with them, don't +refuse modes on eDP panels, and try the largest allowed settings if +all else fails on eDP. +v4: fix stupid typo, forgot to git add before amending. + +Fixes several reports in bugzilla: + + https://bugs.freedesktop.org/show_bug.cgi?id=28070 + +Signed-off-by: Dave Airlie +Signed-off-by: Eric Anholt +Cc: Manoj Iyer +Signed-off-by: Greg Kroah-Hartman + +--- a/drivers/gpu/drm/i915/intel_dp.c ++++ b/drivers/gpu/drm/i915/intel_dp.c +@@ -136,6 +136,12 @@ intel_dp_link_required(struct drm_device *dev, + } + + static int ++intel_dp_max_data_rate(int max_link_clock, int max_lanes) ++{ ++ return (max_link_clock * max_lanes * 8) / 10; ++} ++ ++static int + intel_dp_mode_valid(struct drm_connector *connector, + struct drm_display_mode *mode) + { +@@ -144,8 +150,11 @@ intel_dp_mode_valid(struct drm_connector *connector, + int max_link_clock = intel_dp_link_clock(intel_dp_max_link_bw(intel_encoder)); + int max_lanes = intel_dp_max_lane_count(intel_encoder); + +- if (intel_dp_link_required(connector->dev, intel_encoder, mode->clock) +- > max_link_clock * max_lanes) ++ /* only refuse the mode on non eDP since we have seen some wierd eDP panels ++ which are outside spec tolerances but somehow work by magic */ ++ if (!IS_eDP(intel_encoder) && ++ (intel_dp_link_required(connector->dev, intel_encoder, mode->clock) ++ > intel_dp_max_data_rate(max_link_clock, max_lanes))) + return MODE_CLOCK_HIGH; + + if (mode->clock < 10000) +@@ -506,7 +515,7 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode, + + for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) { + for (clock = 0; clock <= max_clock; clock++) { +- int link_avail = intel_dp_link_clock(bws[clock]) * lane_count; ++ int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count); + + if (intel_dp_link_required(encoder->dev, intel_encoder, mode->clock) + <= link_avail) { +@@ -521,6 +530,18 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode, + } + } + } ++ ++ if (IS_eDP(intel_encoder)) { ++ /* okay we failed just pick the highest */ ++ dp_priv->lane_count = max_lane_count; ++ dp_priv->link_bw = bws[max_clock]; ++ adjusted_mode->clock = intel_dp_link_clock(dp_priv->link_bw); ++ DRM_DEBUG_KMS("Force picking display port link bw %02x lane " ++ "count %d clock %d\n", ++ dp_priv->link_bw, dp_priv->lane_count, ++ adjusted_mode->clock); ++ return true; ++ } + return false; + } + diff --git a/queue-2.6.34/series b/queue-2.6.34/series index 23888c4bb4f..11303d349a9 100644 --- a/queue-2.6.34/series +++ b/queue-2.6.34/series @@ -48,3 +48,4 @@ net-fix-netdev_notify_peers-to-not-conflict-with-netdev_bonding_deslave.patch irq-add-new-irq-flag-irqf_no_suspend.patch xen-do-not-suspend-ipi-irqs.patch drm-i915-use-rsen-instead-of-htplg-for-tfp410-monitor-detection.patch +i915-fix-ironlake-edp-panel-setup-v4.patch