From: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Date: Wed, 8 Jun 2022 18:38:47 +0000 (+0100)
Subject: xlnx_dp: Fix the interrupt disable logic
X-Git-Tag: v7.1.0-rc0~72^2~49
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=39f40d02f6af8e4718100b6a3854e963c962cfd7;p=thirdparty%2Fqemu.git

xlnx_dp: Fix the interrupt disable logic

Fix interrupt disable logic. Mask value 1 indicates that interrupts are
disabled.

Signed-off-by: Sai Pavan Boddu <saipava@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Frederic Konrad <fkonrad@amd.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20220601172353.3220232-4-fkonrad@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---

diff --git a/hw/display/xlnx_dp.c b/hw/display/xlnx_dp.c
index ed856b596da..a071c818833 100644
--- a/hw/display/xlnx_dp.c
+++ b/hw/display/xlnx_dp.c
@@ -889,7 +889,7 @@ static void xlnx_dp_write(void *opaque, hwaddr offset, uint64_t value,
         xlnx_dp_update_irq(s);
         break;
     case DP_INT_DS:
-        s->core_registers[DP_INT_MASK] |= ~value;
+        s->core_registers[DP_INT_MASK] |= value;
         xlnx_dp_update_irq(s);
         break;
     default: