From: Evan Quan <evan.quan@amd.com>
Date: Thu, 18 Jun 2020 08:16:51 +0000 (+0800)
Subject: drm/amd/pm: correct the BootLinkLevel setup
X-Git-Tag: v5.11-rc1~206^2~12^2~162
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=3a9f6bb21d083640c5770fa663c4ce806fd853a5;p=thirdparty%2Flinux.git

drm/amd/pm: correct the BootLinkLevel setup

Set the BootLinkLevel as the max level.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---

diff --git a/drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c b/drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c
index a6c8f121f41c8..d9d53fbd438df 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c
@@ -2023,7 +2023,7 @@ static int polaris10_init_smc_table(struct pp_hwmgr *hwmgr)
 	table->VoltageResponseTime = 0;
 	table->PhaseResponseTime = 0;
 	table->MemoryThermThrottleEnable = 1;
-	table->PCIeBootLinkLevel = 0;
+	table->PCIeBootLinkLevel = hw_data->dpm_table.pcie_speed_table.count;
 	table->PCIeGenInterval = 1;
 	table->VRConfig = 0;