From: Peter Maydell Date: Thu, 24 Nov 2022 11:50:04 +0000 (+0000) Subject: hw/core/cpu-common: Convert TYPE_CPU class to 3-phase reset X-Git-Tag: v8.0.0-rc0~124^2~25 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=3b750f1b1aa6b6835853badddee6613515ab0530;p=thirdparty%2Fqemu.git hw/core/cpu-common: Convert TYPE_CPU class to 3-phase reset Convert the parent class TYPE_CPU to 3-phase reset. This is a necessary prerequisite to converting the subclasses. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Message-id: 20221124115023.2437291-2-peter.maydell@linaro.org --- diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index f9fdd46b9d7..78b5f350a00 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -116,9 +116,9 @@ void cpu_reset(CPUState *cpu) trace_guest_cpu_reset(cpu); } -static void cpu_common_reset(DeviceState *dev) +static void cpu_common_reset_hold(Object *obj) { - CPUState *cpu = CPU(dev); + CPUState *cpu = CPU(obj); CPUClass *cc = CPU_GET_CLASS(cpu); if (qemu_loglevel_mask(CPU_LOG_RESET)) { @@ -259,6 +259,7 @@ static int64_t cpu_common_get_arch_id(CPUState *cpu) static void cpu_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + ResettableClass *rc = RESETTABLE_CLASS(klass); CPUClass *k = CPU_CLASS(klass); k->parse_features = cpu_common_parse_features; @@ -269,7 +270,7 @@ static void cpu_class_init(ObjectClass *klass, void *data) set_bit(DEVICE_CATEGORY_CPU, dc->categories); dc->realize = cpu_common_realizefn; dc->unrealize = cpu_common_unrealizefn; - dc->reset = cpu_common_reset; + rc->phases.hold = cpu_common_reset_hold; cpu_class_init_props(dc); /* * Reason: CPUs still need special care by board code: wiring up