From: Sofiane Naci Date: Mon, 17 Jun 2013 16:14:06 +0000 (+0000) Subject: aarch64-simd.md (aarch64_dup_lane): Add r<-w alternative and update. X-Git-Tag: releases/gcc-4.9.0~5367 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=3d33d06bac26650aa94d6c9de46b7ee4965af8e5;p=thirdparty%2Fgcc.git aarch64-simd.md (aarch64_dup_lane): Add r<-w alternative and update. gcc/ * config/aarch64/aarch64-simd.md (aarch64_dup_lane): Add r<-w alternative and update. (aarch64_dup_lanedi): Delete. * config/aarch64/arm_neon.h (vdup_lane_*): Update. * config/aarch64/aarch64-simd-builtins.def: Update. testsuite/ * gcc.target/aarch64/scalar_intrinsics.c: Update. From-SVN: r200152 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a58dd00927b5..d9e61873611f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2013-06-17 Sofiane Naci + + * config/aarch64/aarch64-simd.md (aarch64_dup_lane): Add r<-w + alternative and update. + (aarch64_dup_lanedi): Delete. + * config/aarch64/arm_neon.h (vdup_lane_*): Update. + * config/aarch64/aarch64-simd-builtins.def: Update. + 2013-06-17 Richard Biener * lto-streamer.h (enum LTO_tags): Add LTO_tree_scc. diff --git a/gcc/config/aarch64/aarch64-simd-builtins.def b/gcc/config/aarch64/aarch64-simd-builtins.def index 5134f9674bda..4d9b966d0ac0 100644 --- a/gcc/config/aarch64/aarch64-simd-builtins.def +++ b/gcc/config/aarch64/aarch64-simd-builtins.def @@ -64,7 +64,7 @@ BUILTIN_VQ (REINTERP, reinterpretv2df, 0) BUILTIN_VDQ_I (BINOP, dup_lane, 0) - BUILTIN_SDQ_I (BINOP, dup_lane, 0) + BUILTIN_VDQ_I (BINOP, dup_lane_scalar, 0) /* Implemented by aarch64_qshl. */ BUILTIN_VSDQ_I (BINOP, sqshl, 0) BUILTIN_VSDQ_I (BINOP, uqshl, 0) diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md index 02037f3f2cb5..08826b5dd9f4 100644 --- a/gcc/config/aarch64/aarch64-simd.md +++ b/gcc/config/aarch64/aarch64-simd.md @@ -357,29 +357,18 @@ (set_attr "simd_mode" "")] ) -(define_insn "aarch64_dup_lane" - [(set (match_operand:ALLX 0 "register_operand" "=w") +(define_insn "aarch64_dup_lane_scalar" + [(set (match_operand: 0 "register_operand" "=w, r") (vec_select: - (match_operand: 1 "register_operand" "w") - (parallel [(match_operand:SI 2 "immediate_operand" "i")]) + (match_operand:VDQ 1 "register_operand" "w, w") + (parallel [(match_operand:SI 2 "immediate_operand" "i, i")]) ))] "TARGET_SIMD" - "dup\\t%0, %1.[%2]" - [(set_attr "simd_type" "simd_dup") - (set_attr "simd_mode" "")] -) - -(define_insn "aarch64_dup_lanedi" - [(set (match_operand:DI 0 "register_operand" "=w,r") - (vec_select:DI - (match_operand:V2DI 1 "register_operand" "w,w") - (parallel [(match_operand:SI 2 "immediate_operand" "i,i")])))] - "TARGET_SIMD" "@ - dup\\t%0, %1.[%2] - umov\t%0, %1.d[%2]" - [(set_attr "simd_type" "simd_dup") - (set_attr "simd_mode" "DI")] + dup\\t%0, %1.[%2] + umov\\t%0, %1.[%2]" + [(set_attr "simd_type" "simd_dup, simd_movgp") + (set_attr "simd_mode" "")] ) (define_insn "aarch64_simd_dup" diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h index 608db35b3dd9..760ba3dc1e1c 100644 --- a/gcc/config/aarch64/arm_neon.h +++ b/gcc/config/aarch64/arm_neon.h @@ -20234,49 +20234,49 @@ vcvtpq_u64_f64 (float64x2_t __a) __extension__ static __inline int8x1_t __attribute__ ((__always_inline__)) vdupb_lane_s8 (int8x16_t a, int const b) { - return __builtin_aarch64_dup_laneqi (a, b); + return __builtin_aarch64_dup_lane_scalarv16qi (a, b); } __extension__ static __inline uint8x1_t __attribute__ ((__always_inline__)) vdupb_lane_u8 (uint8x16_t a, int const b) { - return (uint8x1_t) __builtin_aarch64_dup_laneqi ((int8x16_t) a, b); + return (uint8x1_t) __builtin_aarch64_dup_lane_scalarv16qi ((int8x16_t) a, b); } __extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) vduph_lane_s16 (int16x8_t a, int const b) { - return __builtin_aarch64_dup_lanehi (a, b); + return __builtin_aarch64_dup_lane_scalarv8hi (a, b); } __extension__ static __inline uint16x1_t __attribute__ ((__always_inline__)) vduph_lane_u16 (uint16x8_t a, int const b) { - return (uint16x1_t) __builtin_aarch64_dup_lanehi ((int16x8_t) a, b); + return (uint16x1_t) __builtin_aarch64_dup_lane_scalarv8hi ((int16x8_t) a, b); } __extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) vdups_lane_s32 (int32x4_t a, int const b) { - return __builtin_aarch64_dup_lanesi (a, b); + return __builtin_aarch64_dup_lane_scalarv4si (a, b); } __extension__ static __inline uint32x1_t __attribute__ ((__always_inline__)) vdups_lane_u32 (uint32x4_t a, int const b) { - return (uint32x1_t) __builtin_aarch64_dup_lanesi ((int32x4_t) a, b); + return (uint32x1_t) __builtin_aarch64_dup_lane_scalarv4si ((int32x4_t) a, b); } __extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) vdupd_lane_s64 (int64x2_t a, int const b) { - return __builtin_aarch64_dup_lanedi (a, b); + return __builtin_aarch64_dup_lane_scalarv2di (a, b); } __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) vdupd_lane_u64 (uint64x2_t a, int const b) { - return (uint64x1_t) __builtin_aarch64_dup_lanedi ((int64x2_t) a, b); + return (uint64x1_t) __builtin_aarch64_dup_lane_scalarv2di ((int64x2_t) a, b); } /* vldn */ diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 147ae19e61b8..cb05b1c3d376 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2013-06-17 Sofiane Naci + + * gcc.target/aarch64/scalar_intrinsics.c: Update. + 2013-06-17 Paolo Carlini PR c++/16128 diff --git a/gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c b/gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c index 16537ce7d351..46d34499b3f6 100644 --- a/gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c +++ b/gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -dp" } */ #include @@ -181,7 +181,7 @@ test_vcltzd_s64 (int64x1_t a) return res; } -/* { dg-final { scan-assembler-times "\\tdup\\tb\[0-9\]+, v\[0-9\]+\.b" 2 } } */ +/* { dg-final { scan-assembler-times "aarch64_dup_lane_scalarv16qi" 2 } } */ int8x1_t test_vdupb_lane_s8 (int8x16_t a) @@ -195,7 +195,7 @@ test_vdupb_lane_u8 (uint8x16_t a) return vdupb_lane_u8 (a, 2); } -/* { dg-final { scan-assembler-times "\\tdup\\th\[0-9\]+, v\[0-9\]+\.h" 2 } } */ +/* { dg-final { scan-assembler-times "aarch64_dup_lane_scalarv8hi" 2 } } */ int16x1_t test_vduph_lane_s16 (int16x8_t a) @@ -209,7 +209,7 @@ test_vduph_lane_u16 (uint16x8_t a) return vduph_lane_u16 (a, 2); } -/* { dg-final { scan-assembler-times "\\tdup\\ts\[0-9\]+, v\[0-9\]+\.s" 2 } } */ +/* { dg-final { scan-assembler-times "aarch64_dup_lane_scalarv4si" 2 } } */ int32x1_t test_vdups_lane_s32 (int32x4_t a) @@ -223,7 +223,7 @@ test_vdups_lane_u32 (uint32x4_t a) return vdups_lane_u32 (a, 2); } -/* { dg-final { scan-assembler-times "\\tumov\\tx\[0-9\]+, v\[0-9\]+\.d" 2 } } */ +/* { dg-final { scan-assembler-times "aarch64_dup_lane_scalarv2di" 2 } } */ int64x1_t test_vdupd_lane_s64 (int64x2_t a)