From: Paolo Bonzini Date: Thu, 28 Oct 2021 17:26:38 +0000 (-0400) Subject: KVM: x86: add support for CPUID leaf 0x80000021 X-Git-Tag: v5.15.187~3 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=3d6513b51b72bf7ce92a4f2059102f6292c2db87;p=thirdparty%2Fkernel%2Fstable.git KVM: x86: add support for CPUID leaf 0x80000021 Commit 58b3d12c0a860cda34ed9d2378078ea5134e6812 upstream. CPUID leaf 0x80000021 defines some features (or lack of bugs) of AMD processors. Expose the ones that make sense via KVM_GET_SUPPORTED_CPUID. Signed-off-by: Paolo Bonzini Signed-off-by: Borislav Petkov (AMD) Signed-off-by: Greg Kroah-Hartman --- diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index 786584a9904c5..c7daf7cd69c25 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -915,7 +915,7 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function) entry->edx = 0; break; case 0x80000000: - entry->eax = min(entry->eax, 0x8000001f); + entry->eax = min(entry->eax, 0x80000021); break; case 0x80000001: entry->ebx &= ~GENMASK(27, 16); @@ -995,6 +995,23 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function) entry->ebx &= ~GENMASK(11, 6); } break; + case 0x80000020: + entry->eax = entry->ebx = entry->ecx = entry->edx = 0; + break; + case 0x80000021: + entry->ebx = entry->ecx = entry->edx = 0; + /* + * Pass down these bits: + * EAX 0 NNDBP, Processor ignores nested data breakpoints + * EAX 2 LAS, LFENCE always serializing + * EAX 6 NSCB, Null selector clear base + * + * Other defined bits are for MSRs that KVM does not expose: + * EAX 3 SPCL, SMM page configuration lock + * EAX 13 PCMSR, Prefetch control MSR + */ + entry->eax &= BIT(0) | BIT(2) | BIT(6); + break; /*Add support for Centaur's CPUID instruction*/ case 0xC0000000: /*Just support up to 0xC0000004 now*/