From: Greg Kroah-Hartman Date: Mon, 9 May 2022 08:10:47 +0000 (+0200) Subject: 5.17-stable patches X-Git-Tag: v4.9.313~104 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=3e02e460d2723ff34326f0931e6515e2dbe9d23b;p=thirdparty%2Fkernel%2Fstable-queue.git 5.17-stable patches added patches: alsa-fireworks-fix-wrong-return-count-shorter-than-expected-by-4-bytes.patch alsa-hda-realtek-add-quirk-for-yoga-duet-7-13itl6-speakers.patch ipmi-ipmi_ipmb-fix-null-ptr-deref-in-ipmi_unregister_smi.patch ipmi-when-handling-send-message-responses-don-t-process-the-message.patch mips-fix-cp0-counter-erratum-detection-for-r4k-cpus.patch parisc-merge-model-and-model-name-into-one-line-in-proc-cpuinfo.patch pci_irq_vector-can-t-be-used-in-atomic-context-any-longer.-this-conflicts-with-the-usage-of-this-function-in-nic_mbx_intr_handler.patch revert-parisc-fix-patch-code-locking-and-flushing.patch revert-parisc-mark-cr16-cpu-clocksource-unstable-on-all-smp-machines.patch revert-parisc-mark-sched_clock-unstable-only-if-clocks-are-not-syncronized.patch --- diff --git a/queue-5.17/alsa-fireworks-fix-wrong-return-count-shorter-than-expected-by-4-bytes.patch b/queue-5.17/alsa-fireworks-fix-wrong-return-count-shorter-than-expected-by-4-bytes.patch new file mode 100644 index 00000000000..8a720c039c4 --- /dev/null +++ b/queue-5.17/alsa-fireworks-fix-wrong-return-count-shorter-than-expected-by-4-bytes.patch @@ -0,0 +1,34 @@ +From eb9d84b0ffe39893cb23b0b6712bbe3637fa25fa Mon Sep 17 00:00:00 2001 +From: Takashi Sakamoto +Date: Sun, 24 Apr 2022 19:24:28 +0900 +Subject: ALSA: fireworks: fix wrong return count shorter than expected by 4 bytes + +From: Takashi Sakamoto + +commit eb9d84b0ffe39893cb23b0b6712bbe3637fa25fa upstream. + +ALSA fireworks driver has a bug in its initial state to return count +shorter than expected by 4 bytes to userspace applications when handling +response frame for Echo Audio Fireworks transaction. It's due to missing +addition of the size for the type of event in ALSA firewire stack. + +Fixes: 555e8a8f7f14 ("ALSA: fireworks: Add command/response functionality into hwdep interface") +Cc: +Signed-off-by: Takashi Sakamoto +Link: https://lore.kernel.org/r/20220424102428.21109-1-o-takashi@sakamocchi.jp +Signed-off-by: Takashi Iwai +Signed-off-by: Greg Kroah-Hartman +--- + sound/firewire/fireworks/fireworks_hwdep.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/sound/firewire/fireworks/fireworks_hwdep.c ++++ b/sound/firewire/fireworks/fireworks_hwdep.c +@@ -34,6 +34,7 @@ hwdep_read_resp_buf(struct snd_efw *efw, + type = SNDRV_FIREWIRE_EVENT_EFW_RESPONSE; + if (copy_to_user(buf, &type, sizeof(type))) + return -EFAULT; ++ count += sizeof(type); + remained -= sizeof(type); + buf += sizeof(type); + diff --git a/queue-5.17/alsa-hda-realtek-add-quirk-for-yoga-duet-7-13itl6-speakers.patch b/queue-5.17/alsa-hda-realtek-add-quirk-for-yoga-duet-7-13itl6-speakers.patch new file mode 100644 index 00000000000..82a05308be7 --- /dev/null +++ b/queue-5.17/alsa-hda-realtek-add-quirk-for-yoga-duet-7-13itl6-speakers.patch @@ -0,0 +1,32 @@ +From 3b79954fd00d540677c97a560622b73f3a1f4e28 Mon Sep 17 00:00:00 2001 +From: Zihao Wang +Date: Sun, 24 Apr 2022 16:41:20 +0800 +Subject: ALSA: hda/realtek: Add quirk for Yoga Duet 7 13ITL6 speakers + +From: Zihao Wang + +commit 3b79954fd00d540677c97a560622b73f3a1f4e28 upstream. + +Lenovo Yoga Duet 7 13ITL6 has Realtek ALC287 and built-in +speakers do not work out of the box. The fix developed for +Yoga 7i 14ITL5 also enables speaker output for this model. + +Signed-off-by: Zihao Wang +Cc: +Link: https://lore.kernel.org/r/20220424084120.74125-1-wzhd@ustc.edu +Signed-off-by: Takashi Iwai +Signed-off-by: Greg Kroah-Hartman +--- + sound/pci/hda/patch_realtek.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/sound/pci/hda/patch_realtek.c ++++ b/sound/pci/hda/patch_realtek.c +@@ -9191,6 +9191,7 @@ static const struct snd_pci_quirk alc269 + SND_PCI_QUIRK(0x17aa, 0x3813, "Legion 7i 15IMHG05", ALC287_FIXUP_LEGION_15IMHG05_SPEAKERS), + SND_PCI_QUIRK(0x17aa, 0x3818, "Lenovo C940", ALC298_FIXUP_LENOVO_SPK_VOLUME), + SND_PCI_QUIRK(0x17aa, 0x3819, "Lenovo 13s Gen2 ITL", ALC287_FIXUP_13S_GEN2_SPEAKERS), ++ SND_PCI_QUIRK(0x17aa, 0x3820, "Yoga Duet 7 13ITL6", ALC287_FIXUP_YOGA7_14ITL_SPEAKERS), + SND_PCI_QUIRK(0x17aa, 0x3824, "Legion Y9000X 2020", ALC285_FIXUP_LEGION_Y9000X_SPEAKERS), + SND_PCI_QUIRK(0x17aa, 0x3827, "Ideapad S740", ALC285_FIXUP_IDEAPAD_S740_COEF), + SND_PCI_QUIRK(0x17aa, 0x3834, "Lenovo IdeaPad Slim 9i 14ITL5", ALC287_FIXUP_YOGA7_14ITL_SPEAKERS), diff --git a/queue-5.17/ipmi-ipmi_ipmb-fix-null-ptr-deref-in-ipmi_unregister_smi.patch b/queue-5.17/ipmi-ipmi_ipmb-fix-null-ptr-deref-in-ipmi_unregister_smi.patch new file mode 100644 index 00000000000..a7331d02c23 --- /dev/null +++ b/queue-5.17/ipmi-ipmi_ipmb-fix-null-ptr-deref-in-ipmi_unregister_smi.patch @@ -0,0 +1,70 @@ +From 9cc3aac42566a0021e0ab7c4e9b31667ad75b1e3 Mon Sep 17 00:00:00 2001 +From: Corey Minyard +Date: Thu, 21 Apr 2022 06:49:43 -0500 +Subject: ipmi:ipmi_ipmb: Fix null-ptr-deref in ipmi_unregister_smi() + +From: Corey Minyard + +commit 9cc3aac42566a0021e0ab7c4e9b31667ad75b1e3 upstream. + +KASAN report null-ptr-deref as follows: + +KASAN: null-ptr-deref in range [0x0000000000000008-0x000000000000000f] +Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.13.0-1ubuntu1.1 04/01/2014 +RIP: 0010:ipmi_unregister_smi+0x7d/0xd50 drivers/char/ipmi/ipmi_msghandler.c:3680 +Call Trace: + ipmi_ipmb_remove+0x138/0x1a0 drivers/char/ipmi/ipmi_ipmb.c:443 + ipmi_ipmb_probe+0x409/0xda1 drivers/char/ipmi/ipmi_ipmb.c:548 + i2c_device_probe+0x959/0xac0 drivers/i2c/i2c-core-base.c:563 + really_probe+0x3f3/0xa70 drivers/base/dd.c:541 + +In ipmi_ipmb_probe(), 'iidev->intf' is not set before +ipmi_register_smi() success. And in the error handling case, +ipmi_ipmb_remove() is called to release resources, ipmi_unregister_smi() +is called without check 'iidev->intf', this will cause KASAN +null-ptr-deref issue. + +General kernel style is to allow NULL to be passed into unregister +calls, so fix it that way. This allows a NULL check to be removed in +other code. + +Fixes: 57c9e3c9a374 ("ipmi:ipmi_ipmb: Unregister the SMI on remove") +Reported-by: Hulk Robot +Cc: stable@vger.kernel.org # v5.17+ +Cc: Wei Yongjun +Signed-off-by: Corey Minyard +Signed-off-by: Greg Kroah-Hartman +--- + drivers/char/ipmi/ipmi_msghandler.c | 5 ++++- + drivers/char/ipmi/ipmi_si_intf.c | 5 +---- + 2 files changed, 5 insertions(+), 5 deletions(-) + +--- a/drivers/char/ipmi/ipmi_msghandler.c ++++ b/drivers/char/ipmi/ipmi_msghandler.c +@@ -3677,8 +3677,11 @@ static void cleanup_smi_msgs(struct ipmi + void ipmi_unregister_smi(struct ipmi_smi *intf) + { + struct ipmi_smi_watcher *w; +- int intf_num = intf->intf_num, index; ++ int intf_num, index; + ++ if (!intf) ++ return; ++ intf_num = intf->intf_num; + mutex_lock(&ipmi_interfaces_mutex); + intf->intf_num = -1; + intf->in_shutdown = true; +--- a/drivers/char/ipmi/ipmi_si_intf.c ++++ b/drivers/char/ipmi/ipmi_si_intf.c +@@ -2220,10 +2220,7 @@ static void cleanup_one_si(struct smi_in + return; + + list_del(&smi_info->link); +- +- if (smi_info->intf) +- ipmi_unregister_smi(smi_info->intf); +- ++ ipmi_unregister_smi(smi_info->intf); + kfree(smi_info); + } + diff --git a/queue-5.17/ipmi-when-handling-send-message-responses-don-t-process-the-message.patch b/queue-5.17/ipmi-when-handling-send-message-responses-don-t-process-the-message.patch new file mode 100644 index 00000000000..b347bc503a6 --- /dev/null +++ b/queue-5.17/ipmi-when-handling-send-message-responses-don-t-process-the-message.patch @@ -0,0 +1,37 @@ +From 3d092ef09303e615707dc5755cf0e29b4df7555f Mon Sep 17 00:00:00 2001 +From: Corey Minyard +Date: Tue, 19 Apr 2022 12:08:09 -0500 +Subject: ipmi: When handling send message responses, don't process the message + +From: Corey Minyard + +commit 3d092ef09303e615707dc5755cf0e29b4df7555f upstream. + +A chunk was dropped when the code handling send messages was rewritten. +Those messages shouldn't be processed normally, they are just an +indication that the message was successfully sent and the timers should +be started for the real response that should be coming later. + +Add back in the missing chunk to just discard the message and go on. + +Fixes: 059747c245f0 ("ipmi: Add support for IPMB direct messages") +Reported-by: Joe Wiese +Cc: stable@vger.kernel.org # v5.16+ +Signed-off-by: Corey Minyard +Tested-by: Joe Wiese +Signed-off-by: Greg Kroah-Hartman +--- + drivers/char/ipmi/ipmi_msghandler.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/drivers/char/ipmi/ipmi_msghandler.c ++++ b/drivers/char/ipmi/ipmi_msghandler.c +@@ -4518,6 +4518,8 @@ return_unspecified: + } else + /* The message was sent, start the timer. */ + intf_start_seq_timer(intf, msg->msgid); ++ requeue = 0; ++ goto out; + } else if (((msg->rsp[0] >> 2) != ((msg->data[0] >> 2) | 1)) + || (msg->rsp[1] != msg->data[1])) { + /* diff --git a/queue-5.17/mips-fix-cp0-counter-erratum-detection-for-r4k-cpus.patch b/queue-5.17/mips-fix-cp0-counter-erratum-detection-for-r4k-cpus.patch new file mode 100644 index 00000000000..49ea124a058 --- /dev/null +++ b/queue-5.17/mips-fix-cp0-counter-erratum-detection-for-r4k-cpus.patch @@ -0,0 +1,106 @@ +From f0a6c68f69981214cb7858738dd2bc81475111f7 Mon Sep 17 00:00:00 2001 +From: "Maciej W. Rozycki" +Date: Sun, 24 Apr 2022 12:46:23 +0100 +Subject: MIPS: Fix CP0 counter erratum detection for R4k CPUs +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Maciej W. Rozycki + +commit f0a6c68f69981214cb7858738dd2bc81475111f7 upstream. + +Fix the discrepancy between the two places we check for the CP0 counter +erratum in along with the incorrect comparison of the R4400 revision +number against 0x30 which matches none and consistently consider all +R4000 and R4400 processors affected, as documented in processor errata +publications[1][2][3], following the mapping between CP0 PRId register +values and processor models: + + PRId | Processor Model +---------+-------------------- +00000422 | R4000 Revision 2.2 +00000430 | R4000 Revision 3.0 +00000440 | R4400 Revision 1.0 +00000450 | R4400 Revision 2.0 +00000460 | R4400 Revision 3.0 + +No other revision of either processor has ever been spotted. + +Contrary to what has been stated in commit ce202cbb9e0b ("[MIPS] Assume +R4000/R4400 newer than 3.0 don't have the mfc0 count bug") marking the +CP0 counter as buggy does not preclude it from being used as either a +clock event or a clock source device. It just cannot be used as both at +a time, because in that case clock event interrupts will be occasionally +lost, and the use as a clock event device takes precedence. + +Compare against 0x4ff in `can_use_mips_counter' so that a single machine +instruction is produced. + +References: + +[1] "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", MIPS + Technologies Inc., May 10, 1994, Erratum 53, p.13 + +[2] "MIPS R4400PC/SC Errata, Processor Revision 1.0", MIPS Technologies + Inc., February 9, 1994, Erratum 21, p.4 + +[3] "MIPS R4400PC/SC Errata, Processor Revision 2.0 & 3.0", MIPS + Technologies Inc., January 24, 1995, Erratum 14, p.3 + +Signed-off-by: Maciej W. Rozycki +Fixes: ce202cbb9e0b ("[MIPS] Assume R4000/R4400 newer than 3.0 don't have the mfc0 count bug") +Cc: stable@vger.kernel.org # v2.6.24+ +Reviewed-by: Philippe Mathieu-Daudé +Signed-off-by: Thomas Bogendoerfer +Signed-off-by: Greg Kroah-Hartman +--- + arch/mips/include/asm/timex.h | 8 ++++---- + arch/mips/kernel/time.c | 11 +++-------- + 2 files changed, 7 insertions(+), 12 deletions(-) + +--- a/arch/mips/include/asm/timex.h ++++ b/arch/mips/include/asm/timex.h +@@ -40,9 +40,9 @@ + typedef unsigned int cycles_t; + + /* +- * On R4000/R4400 before version 5.0 an erratum exists such that if the +- * cycle counter is read in the exact moment that it is matching the +- * compare register, no interrupt will be generated. ++ * On R4000/R4400 an erratum exists such that if the cycle counter is ++ * read in the exact moment that it is matching the compare register, ++ * no interrupt will be generated. + * + * There is a suggested workaround and also the erratum can't strike if + * the compare interrupt isn't being used as the clock source device. +@@ -63,7 +63,7 @@ static inline int can_use_mips_counter(u + if (!__builtin_constant_p(cpu_has_counter)) + asm volatile("" : "=m" (cpu_data[0].options)); + if (likely(cpu_has_counter && +- prid >= (PRID_IMP_R4000 | PRID_REV_ENCODE_44(5, 0)))) ++ prid > (PRID_IMP_R4000 | PRID_REV_ENCODE_44(15, 15)))) + return 1; + else + return 0; +--- a/arch/mips/kernel/time.c ++++ b/arch/mips/kernel/time.c +@@ -141,15 +141,10 @@ static __init int cpu_has_mfc0_count_bug + case CPU_R4400MC: + /* + * The published errata for the R4400 up to 3.0 say the CPU +- * has the mfc0 from count bug. ++ * has the mfc0 from count bug. This seems the last version ++ * produced. + */ +- if ((current_cpu_data.processor_id & 0xff) <= 0x30) +- return 1; +- +- /* +- * we assume newer revisions are ok +- */ +- return 0; ++ return 1; + } + + return 0; diff --git a/queue-5.17/parisc-merge-model-and-model-name-into-one-line-in-proc-cpuinfo.patch b/queue-5.17/parisc-merge-model-and-model-name-into-one-line-in-proc-cpuinfo.patch new file mode 100644 index 00000000000..d75febcc7a7 --- /dev/null +++ b/queue-5.17/parisc-merge-model-and-model-name-into-one-line-in-proc-cpuinfo.patch @@ -0,0 +1,32 @@ +From 5b89966bc96a06f6ad65f64ae4b0461918fcc9d3 Mon Sep 17 00:00:00 2001 +From: Helge Deller +Date: Sun, 3 Apr 2022 21:57:51 +0200 +Subject: parisc: Merge model and model name into one line in /proc/cpuinfo + +From: Helge Deller + +commit 5b89966bc96a06f6ad65f64ae4b0461918fcc9d3 upstream. + +The Linux tool "lscpu" shows the double amount of CPUs if we have +"model" and "model name" in two different lines in /proc/cpuinfo. +This change combines the model and the model name into one line. + +Signed-off-by: Helge Deller +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + arch/parisc/kernel/processor.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +--- a/arch/parisc/kernel/processor.c ++++ b/arch/parisc/kernel/processor.c +@@ -418,8 +418,7 @@ show_cpuinfo (struct seq_file *m, void * + } + seq_printf(m, " (0x%02lx)\n", boot_cpu_data.pdc.capabilities); + +- seq_printf(m, "model\t\t: %s\n" +- "model name\t: %s\n", ++ seq_printf(m, "model\t\t: %s - %s\n", + boot_cpu_data.pdc.sys_model_name, + cpuinfo->dev ? + cpuinfo->dev->name : "Unknown"); diff --git a/queue-5.17/pci_irq_vector-can-t-be-used-in-atomic-context-any-longer.-this-conflicts-with-the-usage-of-this-function-in-nic_mbx_intr_handler.patch b/queue-5.17/pci_irq_vector-can-t-be-used-in-atomic-context-any-longer.-this-conflicts-with-the-usage-of-this-function-in-nic_mbx_intr_handler.patch new file mode 100644 index 00000000000..2fab22c5b21 --- /dev/null +++ b/queue-5.17/pci_irq_vector-can-t-be-used-in-atomic-context-any-longer.-this-conflicts-with-the-usage-of-this-function-in-nic_mbx_intr_handler.patch @@ -0,0 +1,84 @@ +From 6b292a04c694573a302686323fe15b1c7e673e5b Mon Sep 17 00:00:00 2001 +From: Thomas Gleixner +Date: Fri, 29 Apr 2022 15:54:24 +0200 +Subject: pci_irq_vector() can't be used in atomic context any longer. This conflicts with the usage of this function in nic_mbx_intr_handler(). + =?UTF-8?q?age=20of=20this=20function=20in=20nic=5Fmbx=5Fintr=5Fhandler().?= + +From: Thomas Gleixner + +commit 6b292a04c694573a302686323fe15b1c7e673e5b upstream. + +Cache the Linux interrupt numbers in struct nicpf and use that cache in the +interrupt handler to select the mailbox. + +Fixes: 495c66aca3da ("genirq/msi: Convert to new functions") +Reported-by: Ondrej Mosnacek +Signed-off-by: Thomas Gleixner +Cc: Sunil Goutham +Cc: "David S. Miller" +Cc: Jakub Kicinski +Cc: Paolo Abeni +Cc: netdev@vger.kernel.org +Cc: stable@vger.kernel.org +Link: https://bugzilla.redhat.com/show_bug.cgi?id=2041772 +Signed-off-by: David S. Miller +Signed-off-by: Greg Kroah-Hartman +--- + drivers/net/ethernet/cavium/thunder/nic_main.c | 16 ++++++++-------- + 1 file changed, 8 insertions(+), 8 deletions(-) + +--- a/drivers/net/ethernet/cavium/thunder/nic_main.c ++++ b/drivers/net/ethernet/cavium/thunder/nic_main.c +@@ -59,7 +59,7 @@ struct nicpf { + + /* MSI-X */ + u8 num_vec; +- bool irq_allocated[NIC_PF_MSIX_VECTORS]; ++ unsigned int irq_allocated[NIC_PF_MSIX_VECTORS]; + char irq_name[NIC_PF_MSIX_VECTORS][20]; + }; + +@@ -1150,7 +1150,7 @@ static irqreturn_t nic_mbx_intr_handler( + u64 intr; + u8 vf; + +- if (irq == pci_irq_vector(nic->pdev, NIC_PF_INTR_ID_MBOX0)) ++ if (irq == nic->irq_allocated[NIC_PF_INTR_ID_MBOX0]) + mbx = 0; + else + mbx = 1; +@@ -1176,14 +1176,14 @@ static void nic_free_all_interrupts(stru + + for (irq = 0; irq < nic->num_vec; irq++) { + if (nic->irq_allocated[irq]) +- free_irq(pci_irq_vector(nic->pdev, irq), nic); +- nic->irq_allocated[irq] = false; ++ free_irq(nic->irq_allocated[irq], nic); ++ nic->irq_allocated[irq] = 0; + } + } + + static int nic_register_interrupts(struct nicpf *nic) + { +- int i, ret; ++ int i, ret, irq; + nic->num_vec = pci_msix_vec_count(nic->pdev); + + /* Enable MSI-X */ +@@ -1201,13 +1201,13 @@ static int nic_register_interrupts(struc + sprintf(nic->irq_name[i], + "NICPF Mbox%d", (i - NIC_PF_INTR_ID_MBOX0)); + +- ret = request_irq(pci_irq_vector(nic->pdev, i), +- nic_mbx_intr_handler, 0, ++ irq = pci_irq_vector(nic->pdev, i); ++ ret = request_irq(irq, nic_mbx_intr_handler, 0, + nic->irq_name[i], nic); + if (ret) + goto fail; + +- nic->irq_allocated[i] = true; ++ nic->irq_allocated[i] = irq; + } + + /* Enable mailbox interrupt */ diff --git a/queue-5.17/revert-parisc-fix-patch-code-locking-and-flushing.patch b/queue-5.17/revert-parisc-fix-patch-code-locking-and-flushing.patch new file mode 100644 index 00000000000..9bcba6fb134 --- /dev/null +++ b/queue-5.17/revert-parisc-fix-patch-code-locking-and-flushing.patch @@ -0,0 +1,83 @@ +From 6c800d7f55fcd78e17deae5ae4374d8e73482c13 Mon Sep 17 00:00:00 2001 +From: Helge Deller +Date: Sun, 8 May 2022 10:18:40 +0200 +Subject: Revert "parisc: Fix patch code locking and flushing" + +From: Helge Deller + +commit 6c800d7f55fcd78e17deae5ae4374d8e73482c13 upstream. + +This reverts commit a9fe7fa7d874a536e0540469f314772c054a0323. + +Leads to segfaults on 32bit kernel. + +Signed-off-by: Helge Deller +Signed-off-by: Greg Kroah-Hartman +--- + arch/parisc/kernel/patch.c | 25 ++++++++++++++----------- + 1 file changed, 14 insertions(+), 11 deletions(-) + +--- a/arch/parisc/kernel/patch.c ++++ b/arch/parisc/kernel/patch.c +@@ -40,7 +40,10 @@ static void __kprobes *patch_map(void *a + + *need_unmap = 1; + set_fixmap(fixmap, page_to_phys(page)); +- raw_spin_lock_irqsave(&patch_lock, *flags); ++ if (flags) ++ raw_spin_lock_irqsave(&patch_lock, *flags); ++ else ++ __acquire(&patch_lock); + + return (void *) (__fix_to_virt(fixmap) + (uintaddr & ~PAGE_MASK)); + } +@@ -49,7 +52,10 @@ static void __kprobes patch_unmap(int fi + { + clear_fixmap(fixmap); + +- raw_spin_unlock_irqrestore(&patch_lock, *flags); ++ if (flags) ++ raw_spin_unlock_irqrestore(&patch_lock, *flags); ++ else ++ __release(&patch_lock); + } + + void __kprobes __patch_text_multiple(void *addr, u32 *insn, unsigned int len) +@@ -61,9 +67,8 @@ void __kprobes __patch_text_multiple(voi + int mapped; + + /* Make sure we don't have any aliases in cache */ +- flush_kernel_dcache_range_asm(start, end); +- flush_kernel_icache_range_asm(start, end); +- flush_tlb_kernel_range(start, end); ++ flush_kernel_vmap_range(addr, len); ++ flush_icache_range(start, end); + + p = fixmap = patch_map(addr, FIX_TEXT_POKE0, &flags, &mapped); + +@@ -76,10 +81,8 @@ void __kprobes __patch_text_multiple(voi + * We're crossing a page boundary, so + * need to remap + */ +- flush_kernel_dcache_range_asm((unsigned long)fixmap, +- (unsigned long)p); +- flush_tlb_kernel_range((unsigned long)fixmap, +- (unsigned long)p); ++ flush_kernel_vmap_range((void *)fixmap, ++ (p-fixmap) * sizeof(*p)); + if (mapped) + patch_unmap(FIX_TEXT_POKE0, &flags); + p = fixmap = patch_map(addr, FIX_TEXT_POKE0, &flags, +@@ -87,10 +90,10 @@ void __kprobes __patch_text_multiple(voi + } + } + +- flush_kernel_dcache_range_asm((unsigned long)fixmap, (unsigned long)p); +- flush_tlb_kernel_range((unsigned long)fixmap, (unsigned long)p); ++ flush_kernel_vmap_range((void *)fixmap, (p-fixmap) * sizeof(*p)); + if (mapped) + patch_unmap(FIX_TEXT_POKE0, &flags); ++ flush_icache_range(start, end); + } + + void __kprobes __patch_text(void *addr, u32 insn) diff --git a/queue-5.17/revert-parisc-mark-cr16-cpu-clocksource-unstable-on-all-smp-machines.patch b/queue-5.17/revert-parisc-mark-cr16-cpu-clocksource-unstable-on-all-smp-machines.patch new file mode 100644 index 00000000000..2b4ec1cfaf8 --- /dev/null +++ b/queue-5.17/revert-parisc-mark-cr16-cpu-clocksource-unstable-on-all-smp-machines.patch @@ -0,0 +1,61 @@ +From 9dc4241bb14afecd16518a0760bceb3d7359b12a Mon Sep 17 00:00:00 2001 +From: Helge Deller +Date: Sat, 7 May 2022 15:31:16 +0200 +Subject: Revert "parisc: Mark cr16 CPU clocksource unstable on all SMP machines" + +From: Helge Deller + +commit 9dc4241bb14afecd16518a0760bceb3d7359b12a upstream. + +This reverts commit afdb4a5b1d340e4afffc65daa21cc71890d7d589. + +It triggers RCU stalls at boot with a 32-bit kernel. + +Signed-off-by: Helge Deller +Noticed-by: John David Anglin +Cc: stable@vger.kernel.org # v5.16+ +Signed-off-by: Greg Kroah-Hartman +--- + arch/parisc/kernel/time.c | 28 +++++++++++++++++++++------- + 1 file changed, 21 insertions(+), 7 deletions(-) + +--- a/arch/parisc/kernel/time.c ++++ b/arch/parisc/kernel/time.c +@@ -249,16 +249,30 @@ void __init time_init(void) + static int __init init_cr16_clocksource(void) + { + /* +- * The cr16 interval timers are not syncronized across CPUs, even if +- * they share the same socket. ++ * The cr16 interval timers are not syncronized across CPUs on ++ * different sockets, so mark them unstable and lower rating on ++ * multi-socket SMP systems. + */ + if (num_online_cpus() > 1 && !running_on_qemu) { +- /* mark sched_clock unstable */ +- clear_sched_clock_stable(); ++ int cpu; ++ unsigned long cpu0_loc; ++ cpu0_loc = per_cpu(cpu_data, 0).cpu_loc; + +- clocksource_cr16.name = "cr16_unstable"; +- clocksource_cr16.flags = CLOCK_SOURCE_UNSTABLE; +- clocksource_cr16.rating = 0; ++ for_each_online_cpu(cpu) { ++ if (cpu == 0) ++ continue; ++ if ((cpu0_loc != 0) && ++ (cpu0_loc == per_cpu(cpu_data, cpu).cpu_loc)) ++ continue; ++ ++ /* mark sched_clock unstable */ ++ clear_sched_clock_stable(); ++ ++ clocksource_cr16.name = "cr16_unstable"; ++ clocksource_cr16.flags = CLOCK_SOURCE_UNSTABLE; ++ clocksource_cr16.rating = 0; ++ break; ++ } + } + + /* register at clocksource framework */ diff --git a/queue-5.17/revert-parisc-mark-sched_clock-unstable-only-if-clocks-are-not-syncronized.patch b/queue-5.17/revert-parisc-mark-sched_clock-unstable-only-if-clocks-are-not-syncronized.patch new file mode 100644 index 00000000000..3c7d6714341 --- /dev/null +++ b/queue-5.17/revert-parisc-mark-sched_clock-unstable-only-if-clocks-are-not-syncronized.patch @@ -0,0 +1,56 @@ +From 7962c0896429af2a0e00ec6bc15d992536453b2d Mon Sep 17 00:00:00 2001 +From: Helge Deller +Date: Sat, 7 May 2022 15:32:38 +0200 +Subject: Revert "parisc: Mark sched_clock unstable only if clocks are not syncronized" + +From: Helge Deller + +commit 7962c0896429af2a0e00ec6bc15d992536453b2d upstream. + +This reverts commit d97180ad68bdb7ee10f327205a649bc2f558741d. + +It triggers RCU stalls at boot with a 32-bit kernel. + +Signed-off-by: Helge Deller +Noticed-by: John David Anglin +Cc: stable@vger.kernel.org # v5.15+ +Signed-off-by: Greg Kroah-Hartman +--- + arch/parisc/kernel/setup.c | 2 ++ + arch/parisc/kernel/time.c | 7 ++++--- + 2 files changed, 6 insertions(+), 3 deletions(-) + +--- a/arch/parisc/kernel/setup.c ++++ b/arch/parisc/kernel/setup.c +@@ -161,6 +161,8 @@ void __init setup_arch(char **cmdline_p) + #ifdef CONFIG_PA11 + dma_ops_init(); + #endif ++ ++ clear_sched_clock_stable(); + } + + /* +--- a/arch/parisc/kernel/time.c ++++ b/arch/parisc/kernel/time.c +@@ -265,9 +265,6 @@ static int __init init_cr16_clocksource( + (cpu0_loc == per_cpu(cpu_data, cpu).cpu_loc)) + continue; + +- /* mark sched_clock unstable */ +- clear_sched_clock_stable(); +- + clocksource_cr16.name = "cr16_unstable"; + clocksource_cr16.flags = CLOCK_SOURCE_UNSTABLE; + clocksource_cr16.rating = 0; +@@ -275,6 +272,10 @@ static int __init init_cr16_clocksource( + } + } + ++ /* XXX: We may want to mark sched_clock stable here if cr16 clocks are ++ * in sync: ++ * (clocksource_cr16.flags == CLOCK_SOURCE_IS_CONTINUOUS) */ ++ + /* register at clocksource framework */ + clocksource_register_hz(&clocksource_cr16, + 100 * PAGE0->mem_10msec); diff --git a/queue-5.17/series b/queue-5.17/series new file mode 100644 index 00000000000..671d839a0d5 --- /dev/null +++ b/queue-5.17/series @@ -0,0 +1,10 @@ +pci_irq_vector-can-t-be-used-in-atomic-context-any-longer.-this-conflicts-with-the-usage-of-this-function-in-nic_mbx_intr_handler.patch +ipmi-when-handling-send-message-responses-don-t-process-the-message.patch +ipmi-ipmi_ipmb-fix-null-ptr-deref-in-ipmi_unregister_smi.patch +mips-fix-cp0-counter-erratum-detection-for-r4k-cpus.patch +revert-parisc-fix-patch-code-locking-and-flushing.patch +revert-parisc-mark-cr16-cpu-clocksource-unstable-on-all-smp-machines.patch +revert-parisc-mark-sched_clock-unstable-only-if-clocks-are-not-syncronized.patch +parisc-merge-model-and-model-name-into-one-line-in-proc-cpuinfo.patch +alsa-hda-realtek-add-quirk-for-yoga-duet-7-13itl6-speakers.patch +alsa-fireworks-fix-wrong-return-count-shorter-than-expected-by-4-bytes.patch