From: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Date: Tue, 10 Jan 2017 16:24:01 +0000 (+0100)
Subject: target-microblaze: Don't hard code 0xb as initial MB version
X-Git-Tag: v2.10.0-rc0~94^2~14
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=3e92250589c617b8cff74cbe6641ba2459717a27;p=thirdparty%2Fqemu.git

target-microblaze: Don't hard code 0xb as initial MB version

Don't hard code 0xb as initial MB version.

Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---

diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
index af70faaa90f..4bc77dfc4dd 100644
--- a/target/microblaze/cpu.c
+++ b/target/microblaze/cpu.c
@@ -152,8 +152,7 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
                        | PVR0_USE_HW_MUL_MASK \
                        | PVR0_USE_EXC_MASK \
                        | PVR0_USE_ICACHE_MASK \
-                       | PVR0_USE_DCACHE_MASK \
-                       | (0xb << 8);
+                       | PVR0_USE_DCACHE_MASK;
     env->pvr.regs[2] = PVR2_D_OPB_MASK \
                         | PVR2_D_LMB_MASK \
                         | PVR2_I_OPB_MASK \