From: Cezary Rojewski <cezary.rojewski@intel.com>
Date: Thu, 9 Jan 2025 12:22:14 +0000 (+0100)
Subject: ASoC: Intel: avs: Adjust DSP status register names
X-Git-Tag: v6.14-rc1~111^2~7^2~14^2~2
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=3eede0fc99c684df6f3f35866761036dabf89d05;p=thirdparty%2Fkernel%2Flinux.git

ASoC: Intel: avs: Adjust DSP status register names

Both status and error are "codes". Update the wording to make code
cohesive.

Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://patch.msgid.link/20250109122216.3667847-12-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
---

diff --git a/sound/soc/intel/avs/loader.c b/sound/soc/intel/avs/loader.c
index b3ea35d267e95..9ff7818395cdc 100644
--- a/sound/soc/intel/avs/loader.c
+++ b/sound/soc/intel/avs/loader.c
@@ -168,7 +168,7 @@ int avs_cldma_load_basefw(struct avs_dev *adev, struct firmware *fw)
 				       AVS_ROM_INIT_POLLING_US, SKL_ROM_INIT_TIMEOUT_US);
 	if (ret < 0) {
 		dev_err(adev->dev, "rom init failed: %d, status: 0x%08x, lec: 0x%08x\n",
-			ret, reg, snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR_CODE(adev)));
+			ret, reg, snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR(adev)));
 		avs_dsp_core_disable(adev, AVS_MAIN_CORE_MASK);
 		return ret;
 	}
@@ -182,7 +182,7 @@ int avs_cldma_load_basefw(struct avs_dev *adev, struct firmware *fw)
 	hda_cldma_stop(cl);
 	if (ret < 0) {
 		dev_err(adev->dev, "transfer fw failed: %d, status: 0x%08x, lec: 0x%08x\n",
-			ret, reg, snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR_CODE(adev)));
+			ret, reg, snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR(adev)));
 		avs_dsp_core_disable(adev, AVS_MAIN_CORE_MASK);
 		return ret;
 	}
@@ -316,7 +316,7 @@ avs_hda_init_rom(struct avs_dev *adev, unsigned int dma_id, bool purge)
 				       AVS_ROM_INIT_POLLING_US, APL_ROM_INIT_TIMEOUT_US);
 	if (ret < 0) {
 		dev_err(adev->dev, "rom init failed: %d, status: 0x%08x, lec: 0x%08x\n",
-			ret, reg, snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR_CODE(adev)));
+			ret, reg, snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR(adev)));
 		goto err;
 	}
 
@@ -348,7 +348,7 @@ static int avs_imr_load_basefw(struct avs_dev *adev)
 	if (!ret) {
 		dev_err(adev->dev, "firmware ready timeout, status: 0x%08x, lec: 0x%08x\n",
 			snd_hdac_adsp_readl(adev, AVS_FW_REG_STATUS(adev)),
-			snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR_CODE(adev)));
+			snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR(adev)));
 		avs_dsp_core_disable(adev, AVS_MAIN_CORE_MASK);
 		return -ETIMEDOUT;
 	}
@@ -408,7 +408,7 @@ int avs_hda_load_basefw(struct avs_dev *adev, struct firmware *fw)
 	snd_hdac_dsp_trigger(hstream, false);
 	if (ret < 0) {
 		dev_err(adev->dev, "transfer fw failed: %d, status: 0x%08x, lec: 0x%08x\n",
-			ret, reg, snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR_CODE(adev)));
+			ret, reg, snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR(adev)));
 		avs_dsp_core_disable(adev, AVS_MAIN_CORE_MASK);
 	}
 
@@ -590,7 +590,7 @@ static int avs_dsp_load_basefw(struct avs_dev *adev)
 	if (!ret) {
 		dev_err(adev->dev, "firmware ready timeout, status: 0x%08x, lec: 0x%08x\n",
 			snd_hdac_adsp_readl(adev, AVS_FW_REG_STATUS(adev)),
-			snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR_CODE(adev)));
+			snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR(adev)));
 		avs_dsp_core_disable(adev, AVS_MAIN_CORE_MASK);
 		ret = -ETIMEDOUT;
 		goto release_fw;
diff --git a/sound/soc/intel/avs/registers.h b/sound/soc/intel/avs/registers.h
index f76e91cff2a9a..64afd56b1897f 100644
--- a/sound/soc/intel/avs/registers.h
+++ b/sound/soc/intel/avs/registers.h
@@ -74,7 +74,7 @@
 /* Constants used when accessing SRAM, space shared with firmware */
 #define AVS_FW_REG_BASE(adev)		((adev)->spec->sram->base_offset)
 #define AVS_FW_REG_STATUS(adev)		(AVS_FW_REG_BASE(adev) + 0x0)
-#define AVS_FW_REG_ERROR_CODE(adev)	(AVS_FW_REG_BASE(adev) + 0x4)
+#define AVS_FW_REG_ERROR(adev)		(AVS_FW_REG_BASE(adev) + 0x4)
 
 #define AVS_WINDOW_CHUNK_SIZE		SZ_4K
 #define AVS_FW_REGS_SIZE		AVS_WINDOW_CHUNK_SIZE