From: Greg Kroah-Hartman Date: Sun, 8 May 2016 13:01:04 +0000 (+0200) Subject: 4.5-stable patches X-Git-Tag: v3.14.69~13 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=3fcf20015d2797c95841acbad29f9ce2da4f9881;p=thirdparty%2Fkernel%2Fstable-queue.git 4.5-stable patches added patches: acpica-dispatcher-update-thread-id-for-recursive-method-calls.patch arc-add-missing-io-barriers-to-io-read-write-16-32-be.patch arm-dts-apq8064-add-ahci-ports-implemented-mask.patch ata-ahci-platform-add-ports-implemented-dt-bindings.patch cpufreq-st-enable-selective-initialization-based-on-the-platform.patch libahci-save-port-map-for-forced-port-map.patch parisc-fix-a-bug-when-syscall-number-of-tracee-is-__nr_linux_syscalls.patch powerpc-fix-bad-inline-asm-constraint-in-create_zero_mask.patch x86-sysfb_efi-fix-valid-bar-address-range-check.patch --- diff --git a/queue-4.5/acpica-dispatcher-update-thread-id-for-recursive-method-calls.patch b/queue-4.5/acpica-dispatcher-update-thread-id-for-recursive-method-calls.patch new file mode 100644 index 00000000000..7c2c886b849 --- /dev/null +++ b/queue-4.5/acpica-dispatcher-update-thread-id-for-recursive-method-calls.patch @@ -0,0 +1,39 @@ +From 93d68841a23a5779cef6fb9aa0ef32e7c5bd00da Mon Sep 17 00:00:00 2001 +From: Prarit Bhargava +Date: Wed, 4 May 2016 13:48:56 +0800 +Subject: ACPICA: Dispatcher: Update thread ID for recursive method calls + +From: Prarit Bhargava + +commit 93d68841a23a5779cef6fb9aa0ef32e7c5bd00da upstream. + +ACPICA commit 7a3bd2d962f221809f25ddb826c9e551b916eb25 + +Set the mutex owner thread ID. +Original patch from: Prarit Bhargava + +Link: https://bugzilla.kernel.org/show_bug.cgi?id=115121 +Link: https://github.com/acpica/acpica/commit/7a3bd2d9 +Signed-off-by: Prarit Bhargava +Tested-by: Andy Lutomirski # On a Dell XPS 13 9350 +Signed-off-by: Bob Moore +Signed-off-by: Lv Zheng +Signed-off-by: Rafael J. Wysocki +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/acpi/acpica/dsmethod.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/drivers/acpi/acpica/dsmethod.c ++++ b/drivers/acpi/acpica/dsmethod.c +@@ -428,6 +428,9 @@ acpi_ds_begin_method_execution(struct ac + obj_desc->method.mutex->mutex. + original_sync_level = + obj_desc->method.mutex->mutex.sync_level; ++ ++ obj_desc->method.mutex->mutex.thread_id = ++ acpi_os_get_thread_id(); + } + } + diff --git a/queue-4.5/arc-add-missing-io-barriers-to-io-read-write-16-32-be.patch b/queue-4.5/arc-add-missing-io-barriers-to-io-read-write-16-32-be.patch new file mode 100644 index 00000000000..56774187cbf --- /dev/null +++ b/queue-4.5/arc-add-missing-io-barriers-to-io-read-write-16-32-be.patch @@ -0,0 +1,81 @@ +From e5bc0478ab6cf565619224536d75ecb2aedca43b Mon Sep 17 00:00:00 2001 +From: Vineet Gupta +Date: Thu, 5 May 2016 13:32:34 +0530 +Subject: ARC: Add missing io barriers to io{read,write}{16,32}be() + +From: Vineet Gupta + +commit e5bc0478ab6cf565619224536d75ecb2aedca43b upstream. + +While reviewing a different change to asm-generic/io.h Arnd spotted that +ARC ioread32 and ioread32be both of which come from asm-generic versions +are not symmetrical in terms of calling the io barriers. + +generic ioread32 -> ARC readl() [ has barriers] +generic ioread32be -> __be32_to_cpu(__raw_readl()) [ lacks barriers] + +While generic ioread32be is being remediated to call readl(), that involves +a swab32(), causing double swaps on ioread32be() on Big Endian systems. + +So provide our versions of big endian IO accessors to ensure io barrier +calls while also keeping them optimal + +Suggested-by: Arnd Bergmann +Acked-by: Arnd Bergmann +Signed-off-by: Vineet Gupta +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arc/include/asm/io.h | 27 ++++++++++++++++++--------- + 1 file changed, 18 insertions(+), 9 deletions(-) + +--- a/arch/arc/include/asm/io.h ++++ b/arch/arc/include/asm/io.h +@@ -13,6 +13,15 @@ + #include + #include + ++#ifdef CONFIG_ISA_ARCV2 ++#include ++#define __iormb() rmb() ++#define __iowmb() wmb() ++#else ++#define __iormb() do { } while (0) ++#define __iowmb() do { } while (0) ++#endif ++ + extern void __iomem *ioremap(unsigned long physaddr, unsigned long size); + extern void __iomem *ioremap_prot(phys_addr_t offset, unsigned long size, + unsigned long flags); +@@ -22,6 +31,15 @@ extern void iounmap(const void __iomem * + #define ioremap_wc(phy, sz) ioremap(phy, sz) + #define ioremap_wt(phy, sz) ioremap(phy, sz) + ++/* ++ * io{read,write}{16,32}be() macros ++ */ ++#define ioread16be(p) ({ u16 __v = be16_to_cpu((__force __be16)__raw_readw(p)); __iormb(); __v; }) ++#define ioread32be(p) ({ u32 __v = be32_to_cpu((__force __be32)__raw_readl(p)); __iormb(); __v; }) ++ ++#define iowrite16be(v,p) ({ __iowmb(); __raw_writew((__force u16)cpu_to_be16(v), p); }) ++#define iowrite32be(v,p) ({ __iowmb(); __raw_writel((__force u32)cpu_to_be32(v), p); }) ++ + /* Change struct page to physical address */ + #define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) + +@@ -99,15 +117,6 @@ static inline void __raw_writel(u32 w, v + + } + +-#ifdef CONFIG_ISA_ARCV2 +-#include +-#define __iormb() rmb() +-#define __iowmb() wmb() +-#else +-#define __iormb() do { } while (0) +-#define __iowmb() do { } while (0) +-#endif +- + /* + * MMIO can also get buffered/optimized in micro-arch, so barriers needed + * Based on ARM model for the typical use case diff --git a/queue-4.5/arm-dts-apq8064-add-ahci-ports-implemented-mask.patch b/queue-4.5/arm-dts-apq8064-add-ahci-ports-implemented-mask.patch new file mode 100644 index 00000000000..633af3e3f77 --- /dev/null +++ b/queue-4.5/arm-dts-apq8064-add-ahci-ports-implemented-mask.patch @@ -0,0 +1,43 @@ +From bb4add2ce991e4ec891b5a0287fd1ab77b631979 Mon Sep 17 00:00:00 2001 +From: Srinivas Kandagatla +Date: Fri, 1 Apr 2016 08:52:58 +0100 +Subject: ARM: dts: apq8064: add ahci ports-implemented mask + +From: Srinivas Kandagatla + +commit bb4add2ce991e4ec891b5a0287fd1ab77b631979 upstream. + +This patch adds new ports-implemented mask, which is required to get +achi working on the mainline. Without this patch value read from +PORTS_IMPL register which is zero would not enable any ports for +software to use. + +Fixes: 566d1827df2e ("libata: disable forced PORTS_IMPL for >= AHCI 1.3") +Signed-off-by: Srinivas Kandagatla +Reviewed-by: Andy Gross +Signed-off-by: Tejun Heo +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm/boot/dts/qcom-apq8064.dtsi | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/qcom-apq8064.dtsi ++++ b/arch/arm/boot/dts/qcom-apq8064.dtsi +@@ -665,7 +665,7 @@ + }; + + sata0: sata@29000000 { +- compatible = "generic-ahci"; ++ compatible = "qcom,apq8064-ahci", "generic-ahci"; + status = "disabled"; + reg = <0x29000000 0x180>; + interrupts = ; +@@ -687,6 +687,7 @@ + + phys = <&sata_phy0>; + phy-names = "sata-phy"; ++ ports-implemented = <0x1>; + }; + + /* Temporary fixed regulator */ diff --git a/queue-4.5/ata-ahci-platform-add-ports-implemented-dt-bindings.patch b/queue-4.5/ata-ahci-platform-add-ports-implemented-dt-bindings.patch new file mode 100644 index 00000000000..89a541ba5f5 --- /dev/null +++ b/queue-4.5/ata-ahci-platform-add-ports-implemented-dt-bindings.patch @@ -0,0 +1,57 @@ +From 17dcc37e3e847bc0e67a5b1ec52471fcc6c18682 Mon Sep 17 00:00:00 2001 +From: Srinivas Kandagatla +Date: Fri, 1 Apr 2016 08:52:57 +0100 +Subject: ata: ahci-platform: Add ports-implemented DT bindings. + +From: Srinivas Kandagatla + +commit 17dcc37e3e847bc0e67a5b1ec52471fcc6c18682 upstream. + +On some SOCs PORTS_IMPL register value is never programmed by the +firmware and left at zero value. Which means that no sata ports are +available for software. AHCI driver used to cope up with this by +fabricating the port_map if the PORTS_IMPL register is read zero, +but recent patch broke this workaround as zero value was valid for +NVMe disks. + +This patch adds ports-implemented DT bindings as workaround for this issue +in a way that DT can can override the PORTS_IMPL register in cases where +the firmware did not program it already. + +Fixes: 566d1827df2e ("libata: disable forced PORTS_IMPL for >= AHCI 1.3") +Signed-off-by: Srinivas Kandagatla +Acked-by: Tejun Heo +Reviewed-by: Andy Gross +Signed-off-by: Tejun Heo +Signed-off-by: Greg Kroah-Hartman + +--- + Documentation/devicetree/bindings/ata/ahci-platform.txt | 4 ++++ + drivers/ata/ahci_platform.c | 3 +++ + 2 files changed, 7 insertions(+) + +--- a/Documentation/devicetree/bindings/ata/ahci-platform.txt ++++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt +@@ -30,6 +30,10 @@ Optional properties: + - target-supply : regulator for SATA target power + - phys : reference to the SATA PHY node + - phy-names : must be "sata-phy" ++- ports-implemented : Mask that indicates which ports that the HBA supports ++ are available for software to use. Useful if PORTS_IMPL ++ is not programmed by the BIOS, which is true with ++ some embedded SOC's. + + Required properties when using sub-nodes: + - #address-cells : number of cells to encode an address +--- a/drivers/ata/ahci_platform.c ++++ b/drivers/ata/ahci_platform.c +@@ -51,6 +51,9 @@ static int ahci_probe(struct platform_de + if (rc) + return rc; + ++ of_property_read_u32(dev->of_node, ++ "ports-implemented", &hpriv->force_port_map); ++ + if (of_device_is_compatible(dev->of_node, "hisilicon,hisi-ahci")) + hpriv->flags |= AHCI_HFLAG_NO_FBS | AHCI_HFLAG_NO_NCQ; + diff --git a/queue-4.5/cpufreq-st-enable-selective-initialization-based-on-the-platform.patch b/queue-4.5/cpufreq-st-enable-selective-initialization-based-on-the-platform.patch new file mode 100644 index 00000000000..ff41fa62c3e --- /dev/null +++ b/queue-4.5/cpufreq-st-enable-selective-initialization-based-on-the-platform.patch @@ -0,0 +1,52 @@ +From 2482bc31ca8096241b8fa97610ef23154ce55f45 Mon Sep 17 00:00:00 2001 +From: Sudeep Holla +Date: Wed, 27 Apr 2016 17:18:59 +0100 +Subject: cpufreq: st: enable selective initialization based on the platform + +From: Sudeep Holla + +commit 2482bc31ca8096241b8fa97610ef23154ce55f45 upstream. + +The sti-cpufreq does unconditional registration of the cpufreq-dt driver +which causes issue on an multi-platform build. For example, on Vexpress +TC2 platform, we get the following error on boot: + +cpu cpu0: OPP-v2 not supported +cpu cpu0: Not doing voltage scaling +cpu: dev_pm_opp_of_cpumask_add_table: couldn't find opp table + for cpu:0, -19 +cpu cpu0: dev_pm_opp_get_max_volt_latency: Invalid regulator (-6) +... +arm_big_little: bL_cpufreq_register: Failed registering platform driver: + vexpress-spc, err: -17 + +The actual driver fails to initialise as cpufreq-dt is probed +successfully, which is incorrect. This issue can happen to any platform +not using cpufreq-dt in a multi-platform build. + +This patch adds a check to do selective initialization of the driver. + +Fixes: ab0ea257fc58 (cpufreq: st: Provide runtime initialised driver for ST's platforms) +Signed-off-by: Sudeep Holla +Acked-by: Viresh Kumar +Acked-by: Lee Jones +Signed-off-by: Rafael J. Wysocki +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/cpufreq/sti-cpufreq.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/drivers/cpufreq/sti-cpufreq.c ++++ b/drivers/cpufreq/sti-cpufreq.c +@@ -259,6 +259,10 @@ static int sti_cpufreq_init(void) + { + int ret; + ++ if ((!of_machine_is_compatible("st,stih407")) && ++ (!of_machine_is_compatible("st,stih410"))) ++ return -ENODEV; ++ + ddata.cpu = get_cpu_device(0); + if (!ddata.cpu) { + dev_err(ddata.cpu, "Failed to get device for CPU0\n"); diff --git a/queue-4.5/libahci-save-port-map-for-forced-port-map.patch b/queue-4.5/libahci-save-port-map-for-forced-port-map.patch new file mode 100644 index 00000000000..7b95c94f029 --- /dev/null +++ b/queue-4.5/libahci-save-port-map-for-forced-port-map.patch @@ -0,0 +1,36 @@ +From 2fd0f46cb1b82587c7ae4a616d69057fb9bd0af7 Mon Sep 17 00:00:00 2001 +From: Srinivas Kandagatla +Date: Fri, 1 Apr 2016 08:52:56 +0100 +Subject: libahci: save port map for forced port map + +From: Srinivas Kandagatla + +commit 2fd0f46cb1b82587c7ae4a616d69057fb9bd0af7 upstream. + +In usecases where force_port_map is used saved_port_map is never set, +resulting in not programming the PORTS_IMPL register as part of initial +config. This patch fixes this by setting it to port_map even in case +where force_port_map is used, making it more inline with other parts of +the code. + +Fixes: 566d1827df2e ("libata: disable forced PORTS_IMPL for >= AHCI 1.3") +Signed-off-by: Srinivas Kandagatla +Acked-by: Tejun Heo +Reviewed-by: Andy Gross +Signed-off-by: Tejun Heo +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/ata/libahci.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/ata/libahci.c ++++ b/drivers/ata/libahci.c +@@ -469,6 +469,7 @@ void ahci_save_initial_config(struct dev + dev_info(dev, "forcing port_map 0x%x -> 0x%x\n", + port_map, hpriv->force_port_map); + port_map = hpriv->force_port_map; ++ hpriv->saved_port_map = port_map; + } + + if (hpriv->mask_port_map) { diff --git a/queue-4.5/parisc-fix-a-bug-when-syscall-number-of-tracee-is-__nr_linux_syscalls.patch b/queue-4.5/parisc-fix-a-bug-when-syscall-number-of-tracee-is-__nr_linux_syscalls.patch new file mode 100644 index 00000000000..79e36f9f70c --- /dev/null +++ b/queue-4.5/parisc-fix-a-bug-when-syscall-number-of-tracee-is-__nr_linux_syscalls.patch @@ -0,0 +1,36 @@ +From f0b22d1bb2a37a665a969e95785c75a4f49d1499 Mon Sep 17 00:00:00 2001 +From: "Dmitry V. Levin" +Date: Wed, 27 Apr 2016 04:56:11 +0300 +Subject: parisc: fix a bug when syscall number of tracee is __NR_Linux_syscalls + +From: Dmitry V. Levin + +commit f0b22d1bb2a37a665a969e95785c75a4f49d1499 upstream. + +Do not load one entry beyond the end of the syscall table when the +syscall number of a traced process equals to __NR_Linux_syscalls. +Similar bug with regular processes was fixed by commit 3bb457af4fa8 +("[PARISC] Fix bug when syscall nr is __NR_Linux_syscalls"). + +This bug was found by strace test suite. + +Signed-off-by: Dmitry V. Levin +Acked-by: Helge Deller +Signed-off-by: Helge Deller +Signed-off-by: Greg Kroah-Hartman + +--- + arch/parisc/kernel/syscall.S | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/parisc/kernel/syscall.S ++++ b/arch/parisc/kernel/syscall.S +@@ -344,7 +344,7 @@ tracesys_next: + #endif + + cmpib,COND(=),n -1,%r20,tracesys_exit /* seccomp may have returned -1 */ +- comiclr,>>= __NR_Linux_syscalls, %r20, %r0 ++ comiclr,>> __NR_Linux_syscalls, %r20, %r0 + b,n .Ltracesys_nosys + + LDREGX %r20(%r19), %r19 diff --git a/queue-4.5/powerpc-fix-bad-inline-asm-constraint-in-create_zero_mask.patch b/queue-4.5/powerpc-fix-bad-inline-asm-constraint-in-create_zero_mask.patch new file mode 100644 index 00000000000..974ffa1725a --- /dev/null +++ b/queue-4.5/powerpc-fix-bad-inline-asm-constraint-in-create_zero_mask.patch @@ -0,0 +1,51 @@ +From b4c112114aab9aff5ed4568ca5e662bb02cdfe74 Mon Sep 17 00:00:00 2001 +From: Anton Blanchard +Date: Sat, 30 Apr 2016 08:29:27 +1000 +Subject: powerpc: Fix bad inline asm constraint in create_zero_mask() + +From: Anton Blanchard + +commit b4c112114aab9aff5ed4568ca5e662bb02cdfe74 upstream. + +In create_zero_mask() we have: + + addi %1,%2,-1 + andc %1,%1,%2 + popcntd %0,%1 + +using the "r" constraint for %2. r0 is a valid register in the "r" set, +but addi X,r0,X turns it into an li: + + li r7,-1 + andc r7,r7,r0 + popcntd r4,r7 + +Fix this by using the "b" constraint, for which r0 is not a valid +register. + +This was found with a kernel build using gcc trunk, narrowed down to +when -frename-registers was enabled at -O2. It is just luck however +that we aren't seeing this on older toolchains. + +Thanks to Segher for working with me to find this issue. + +Fixes: d0cebfa650a0 ("powerpc: word-at-a-time optimization for 64-bit Little Endian") +Signed-off-by: Anton Blanchard +Signed-off-by: Michael Ellerman +Signed-off-by: Greg Kroah-Hartman + +--- + arch/powerpc/include/asm/word-at-a-time.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/powerpc/include/asm/word-at-a-time.h ++++ b/arch/powerpc/include/asm/word-at-a-time.h +@@ -82,7 +82,7 @@ static inline unsigned long create_zero_ + "andc %1,%1,%2\n\t" + "popcntd %0,%1" + : "=r" (leading_zero_bits), "=&r" (trailing_zero_bit_mask) +- : "r" (bits)); ++ : "b" (bits)); + + return leading_zero_bits; + } diff --git a/queue-4.5/series b/queue-4.5/series index 5876f507467..418c2b46122 100644 --- a/queue-4.5/series +++ b/queue-4.5/series @@ -59,3 +59,12 @@ writeback-fix-performance-regression-in-wb_over_bg_thresh.patch maintainers-remove-asterisk-from-efi-directory-names.patch x86-tsc-read-all-ratio-bits-from-msr_platform_info.patch arm-cpuidle-pass-on-arm_cpuidle_suspend-s-return-value.patch +parisc-fix-a-bug-when-syscall-number-of-tracee-is-__nr_linux_syscalls.patch +cpufreq-st-enable-selective-initialization-based-on-the-platform.patch +arc-add-missing-io-barriers-to-io-read-write-16-32-be.patch +x86-sysfb_efi-fix-valid-bar-address-range-check.patch +arm-dts-apq8064-add-ahci-ports-implemented-mask.patch +acpica-dispatcher-update-thread-id-for-recursive-method-calls.patch +powerpc-fix-bad-inline-asm-constraint-in-create_zero_mask.patch +libahci-save-port-map-for-forced-port-map.patch +ata-ahci-platform-add-ports-implemented-dt-bindings.patch diff --git a/queue-4.5/x86-sysfb_efi-fix-valid-bar-address-range-check.patch b/queue-4.5/x86-sysfb_efi-fix-valid-bar-address-range-check.patch new file mode 100644 index 00000000000..7d759985560 --- /dev/null +++ b/queue-4.5/x86-sysfb_efi-fix-valid-bar-address-range-check.patch @@ -0,0 +1,71 @@ +From c10fcb14c7afd6688c7b197a814358fecf244222 Mon Sep 17 00:00:00 2001 +From: Wang YanQing +Date: Thu, 5 May 2016 14:14:21 +0100 +Subject: x86/sysfb_efi: Fix valid BAR address range check + +From: Wang YanQing + +commit c10fcb14c7afd6688c7b197a814358fecf244222 upstream. + +The code for checking whether a BAR address range is valid will break +out of the loop when a start address of 0x0 is encountered. + +This behaviour is wrong since by breaking out of the loop we may miss +the BAR that describes the EFI frame buffer in a later iteration. + +Because of this bug I can't use video=efifb: boot parameter to get +efifb on my new ThinkPad E550 for my old linux system hard disk with +3.10 kernel. In 3.10, efifb is the only choice due to DRM/I915 not +supporting the GPU. + +This patch also add a trivial optimization to break out after we find +the frame buffer address range without testing later BARs. + +Signed-off-by: Wang YanQing +[ Rewrote changelog. ] +Signed-off-by: Matt Fleming +Reviewed-by: Peter Jones +Cc: Ard Biesheuvel +Cc: David Herrmann +Cc: Linus Torvalds +Cc: Peter Zijlstra +Cc: Thomas Gleixner +Cc: Tomi Valkeinen +Cc: linux-efi@vger.kernel.org +Link: http://lkml.kernel.org/r/1462454061-21561-2-git-send-email-matt@codeblueprint.co.uk +Signed-off-by: Ingo Molnar +Signed-off-by: Greg Kroah-Hartman + +--- + arch/x86/kernel/sysfb_efi.c | 14 ++++++++++++-- + 1 file changed, 12 insertions(+), 2 deletions(-) + +--- a/arch/x86/kernel/sysfb_efi.c ++++ b/arch/x86/kernel/sysfb_efi.c +@@ -106,14 +106,24 @@ static int __init efifb_set_system(const + continue; + for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { + resource_size_t start, end; ++ unsigned long flags; ++ ++ flags = pci_resource_flags(dev, i); ++ if (!(flags & IORESOURCE_MEM)) ++ continue; ++ ++ if (flags & IORESOURCE_UNSET) ++ continue; ++ ++ if (pci_resource_len(dev, i) == 0) ++ continue; + + start = pci_resource_start(dev, i); +- if (start == 0) +- break; + end = pci_resource_end(dev, i); + if (screen_info.lfb_base >= start && + screen_info.lfb_base < end) { + found_bar = 1; ++ break; + } + } + }