From: Greg Kroah-Hartman Date: Fri, 16 Aug 2019 09:56:49 +0000 (+0200) Subject: 4.9-stable patches X-Git-Tag: v4.19.68~74 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=403947d6a61b692f16ebea50147e19a7607f37e5;p=thirdparty%2Fkernel%2Fstable-queue.git 4.9-stable patches added patches: scsi-mpt3sas-use-63-bit-dma-addressing-on-sas35-hba.patch --- diff --git a/queue-4.9/scsi-mpt3sas-use-63-bit-dma-addressing-on-sas35-hba.patch b/queue-4.9/scsi-mpt3sas-use-63-bit-dma-addressing-on-sas35-hba.patch new file mode 100644 index 00000000000..12f57ac6328 --- /dev/null +++ b/queue-4.9/scsi-mpt3sas-use-63-bit-dma-addressing-on-sas35-hba.patch @@ -0,0 +1,78 @@ +From df9a606184bfdb5ae3ca9d226184e9489f5c24f7 Mon Sep 17 00:00:00 2001 +From: Suganath Prabu +Date: Tue, 30 Jul 2019 03:43:57 -0400 +Subject: scsi: mpt3sas: Use 63-bit DMA addressing on SAS35 HBA + +From: Suganath Prabu + +commit df9a606184bfdb5ae3ca9d226184e9489f5c24f7 upstream. + +Although SAS3 & SAS3.5 IT HBA controllers support 64-bit DMA addressing, as +per hardware design, if DMA-able range contains all 64-bits +set (0xFFFFFFFF-FFFFFFFF) then it results in a firmware fault. + +E.g. SGE's start address is 0xFFFFFFFF-FFFF000 and data length is 0x1000 +bytes. when HBA tries to DMA the data at 0xFFFFFFFF-FFFFFFFF location then +HBA will fault the firmware. + +Driver will set 63-bit DMA mask to ensure the above address will not be +used. + +Cc: # 5.1.20+ +Signed-off-by: Suganath Prabu +Reviewed-by: Christoph Hellwig +Signed-off-by: Martin K. Petersen +Signed-off-by: Greg Kroah-Hartman + + +--- + drivers/scsi/mpt3sas/mpt3sas_base.c | 12 +++++++----- + 1 file changed, 7 insertions(+), 5 deletions(-) + +--- a/drivers/scsi/mpt3sas/mpt3sas_base.c ++++ b/drivers/scsi/mpt3sas/mpt3sas_base.c +@@ -1707,9 +1707,11 @@ _base_config_dma_addressing(struct MPT3S + { + struct sysinfo s; + u64 consistent_dma_mask; ++ /* Set 63 bit DMA mask for all SAS3 and SAS35 controllers */ ++ int dma_mask = (ioc->hba_mpi_version_belonged > MPI2_VERSION) ? 63 : 64; + + if (ioc->dma_mask) +- consistent_dma_mask = DMA_BIT_MASK(64); ++ consistent_dma_mask = DMA_BIT_MASK(dma_mask); + else + consistent_dma_mask = DMA_BIT_MASK(32); + +@@ -1717,11 +1719,11 @@ _base_config_dma_addressing(struct MPT3S + const uint64_t required_mask = + dma_get_required_mask(&pdev->dev); + if ((required_mask > DMA_BIT_MASK(32)) && +- !pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) && ++ !pci_set_dma_mask(pdev, DMA_BIT_MASK(dma_mask)) && + !pci_set_consistent_dma_mask(pdev, consistent_dma_mask)) { + ioc->base_add_sg_single = &_base_add_sg_single_64; + ioc->sge_size = sizeof(Mpi2SGESimple64_t); +- ioc->dma_mask = 64; ++ ioc->dma_mask = dma_mask; + goto out; + } + } +@@ -1747,7 +1749,7 @@ static int + _base_change_consistent_dma_mask(struct MPT3SAS_ADAPTER *ioc, + struct pci_dev *pdev) + { +- if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) { ++ if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(ioc->dma_mask))) { + if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) + return -ENODEV; + } +@@ -3381,7 +3383,7 @@ _base_allocate_memory_pools(struct MPT3S + total_sz += sz; + } while (ioc->rdpq_array_enable && (++i < ioc->reply_queue_count)); + +- if (ioc->dma_mask == 64) { ++ if (ioc->dma_mask > 32) { + if (_base_change_consistent_dma_mask(ioc, ioc->pdev) != 0) { + pr_warn(MPT3SAS_FMT + "no suitable consistent DMA mask for %s\n", diff --git a/queue-4.9/series b/queue-4.9/series index 3a13d9397fb..29f1e308f2e 100644 --- a/queue-4.9/series +++ b/queue-4.9/series @@ -39,3 +39,4 @@ smb3-fix-deadlock-in-validate-negotiate-hits-reconnect.patch smb3-send-cap_dfs-capability-during-session-setup.patch mwifiex-fix-802.11n-wpa-detection.patch iwlwifi-don-t-unmap-as-page-memory-that-was-mapped-as-single.patch +scsi-mpt3sas-use-63-bit-dma-addressing-on-sas35-hba.patch