From: Bernhard Beschow Date: Fri, 8 Sep 2023 08:42:34 +0000 (+0200) Subject: hw/acpi/core: Trace enable and status registers of GPE separately X-Git-Tag: v8.2.0-rc0~88^2~21 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=40a6b8935d5862840c602f977564d2ebbea60ed6;p=thirdparty%2Fqemu.git hw/acpi/core: Trace enable and status registers of GPE separately The bit positions of both registers are related. Tracing the registers independently results in the same offsets across these registers which eases debugging. Signed-off-by: Bernhard Beschow Acked-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20230908084234.17642-9-shentey@gmail.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- diff --git a/hw/acpi/core.c b/hw/acpi/core.c index c561845a4ad..ec5e127d172 100644 --- a/hw/acpi/core.c +++ b/hw/acpi/core.c @@ -687,13 +687,13 @@ void acpi_gpe_ioport_writeb(ACPIREGS *ar, uint32_t addr, uint32_t val) { uint8_t *cur; - trace_acpi_gpe_ioport_writeb(addr, val); - cur = acpi_gpe_ioport_get_ptr(ar, addr); if (addr < ar->gpe.len / 2) { + trace_acpi_gpe_sts_ioport_writeb(addr, val); /* GPE_STS */ *cur = (*cur) & ~val; } else if (addr < ar->gpe.len) { + trace_acpi_gpe_en_ioport_writeb(addr - (ar->gpe.len / 2), val); /* GPE_EN */ *cur = val; } else { @@ -712,7 +712,11 @@ uint32_t acpi_gpe_ioport_readb(ACPIREGS *ar, uint32_t addr) val = *cur; } - trace_acpi_gpe_ioport_readb(addr, val); + if (addr < ar->gpe.len / 2) { + trace_acpi_gpe_sts_ioport_readb(addr, val); + } else { + trace_acpi_gpe_en_ioport_readb(addr - (ar->gpe.len / 2), val); + } return val; } diff --git a/hw/acpi/trace-events b/hw/acpi/trace-events index 159937ddb9a..edc93e703c4 100644 --- a/hw/acpi/trace-events +++ b/hw/acpi/trace-events @@ -18,8 +18,10 @@ mhp_acpi_pc_dimm_deleted(uint32_t slot) "slot[0x%"PRIx32"] pc-dimm deleted" mhp_acpi_pc_dimm_delete_failed(uint32_t slot) "slot[0x%"PRIx32"] pc-dimm delete failed" # core.c -acpi_gpe_ioport_readb(uint32_t addr, uint8_t val) "addr: 0x%" PRIx32 " ==> 0x%" PRIx8 -acpi_gpe_ioport_writeb(uint32_t addr, uint8_t val) "addr: 0x%" PRIx32 " <== 0x%" PRIx8 +acpi_gpe_en_ioport_readb(uint32_t addr, uint8_t val) "addr: 0x%" PRIx32 " ==> 0x%02" PRIx8 +acpi_gpe_en_ioport_writeb(uint32_t addr, uint8_t val) "addr: 0x%" PRIx32 " <== 0x%02" PRIx8 +acpi_gpe_sts_ioport_readb(uint32_t addr, uint8_t val) "addr: 0x%" PRIx32 " ==> 0x%02" PRIx8 +acpi_gpe_sts_ioport_writeb(uint32_t addr, uint8_t val) "addr: 0x%" PRIx32 " <== 0x%02" PRIx8 # cpu.c cpuhp_acpi_invalid_idx_selected(uint32_t idx) "0x%"PRIx32