From: davem Date: Fri, 10 May 2002 15:07:41 +0000 (+0000) Subject: 2002-05-10 David S. Miller X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=40cc626c987a9b607bbb096ee7bf4e1515c03146;p=thirdparty%2Fgcc.git 2002-05-10 David S. Miller * config/sparc/sparc.md: Use define_constants for unspec numbers. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@53364 138bc75d-0d04-0410-961f-82ee72b054a4 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 9f4d052e60db..d933c9733b01 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,4 +1,6 @@ -2002-05-09 David S. Miller +2002-05-10 David S. Miller + + * config/sparc/sparc.md: Use define_constants for unspec numbers. * rtl.h (struct rtx_def): Document unchanging and in_struct flags more accurately. diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md index 98fd14e62075..37ab89916bc0 100644 --- a/gcc/config/sparc/sparc.md +++ b/gcc/config/sparc/sparc.md @@ -24,34 +24,30 @@ ;;- See file "rtl.def" for documentation on define_insn, match_*, et. al. -;; Uses of UNSPEC and UNSPEC_VOLATILE in this file: -;; -;; UNSPEC: 0 movsi_{lo_sum,high}_pic -;; pic_lo_sum_di -;; pic_sethi_di -;; 1 update_return -;; 2 get_pc -;; 5 movsi_{,lo_sum_,high_}pic_label_ref -;; 6 seth44 -;; 7 setm44 -;; 8 setl44 -;; 9 sethh -;; 10 setlm -;; 11 embmedany_sethi, embmedany_brsum -;; 13 embmedany_textuhi -;; 14 embmedany_texthi -;; 15 embmedany_textulo -;; 16 embmedany_textlo -;; 18 sethm -;; 19 setlo -;; -;; UNSPEC_VOLATILE: 0 blockage -;; 1 flush_register_windows -;; 2 goto_handler_and_restore -;; 3 goto_handler_and_restore_v9* -;; 4 flush -;; 5 do_builtin_setjmp_setup -;; +(define_constants + [(UNSPEC_MOVE_PIC 0) + (UNSPEC_UPDATE_RETURN 1) + (UNSPEC_GET_PC 2) + (UNSPEC_MOVE_PIC_LABEL 5) + (UNSPEC_SETH44 6) + (UNSPEC_SETM44 7) + (UNSPEC_SETHH 9) + (UNSPEC_SETLM 10) + (UNSPEC_EMB_HISUM 11) + (UNSPEC_EMB_TEXTUHI 13) + (UNSPEC_EMB_TEXTHI 14) + (UNSPEC_EMB_TEXTULO 15) + (UNSPEC_EMB_SETHM 18) + ]) + +(define_constants + [(UNSPECV_BLOCKAGE 0) + (UNSPECV_FLUSHW 1) + (UNSPECV_GOTO 2) + (UNSPECV_GOTO_V9 3) + (UNSPECV_FLUSH 4) + (UNSPECV_SETJMP 5) + ]) ;; The upper 32 fp regs on the v9 can't hold SFmode values. To deal with this ;; a second register class, EXTRA_FP_REGS, exists for the v9 chip. The name @@ -1778,7 +1774,7 @@ (define_insn "get_pc" [(clobber (reg:SI 15)) (set (match_operand 0 "register_operand" "=r") - (unspec [(match_operand 1 "" "") (match_operand 2 "" "")] 2))] + (unspec [(match_operand 1 "" "") (match_operand 2 "" "")] UNSPEC_GET_PC))] "flag_pic && REGNO (operands[0]) == 23" "sethi\\t%%hi(%a1-4), %0\\n\\tcall\\t%a2\\n\\tadd\\t%0, %%lo(%a1+4), %0" [(set_attr "type" "multi") @@ -2055,22 +2051,22 @@ (define_insn "movsi_lo_sum_pic" [(set (match_operand:SI 0 "register_operand" "=r") (lo_sum:SI (match_operand:SI 1 "register_operand" "r") - (unspec:SI [(match_operand:SI 2 "immediate_operand" "in")] 0)))] + (unspec:SI [(match_operand:SI 2 "immediate_operand" "in")] UNSPEC_MOVE_PIC)))] "flag_pic" "or\\t%1, %%lo(%a2), %0") (define_insn "movsi_high_pic" [(set (match_operand:SI 0 "register_operand" "=r") - (high:SI (unspec:SI [(match_operand 1 "" "")] 0)))] + (high:SI (unspec:SI [(match_operand 1 "" "")] UNSPEC_MOVE_PIC)))] "flag_pic && check_pic (1)" "sethi\\t%%hi(%a1), %0") (define_expand "movsi_pic_label_ref" [(set (match_dup 3) (high:SI (unspec:SI [(match_operand:SI 1 "label_ref_operand" "") - (match_dup 2)] 5))) + (match_dup 2)] UNSPEC_MOVE_PIC_LABEL))) (set (match_dup 4) (lo_sum:SI (match_dup 3) - (unspec:SI [(match_dup 1) (match_dup 2)] 5))) + (unspec:SI [(match_dup 1) (match_dup 2)] UNSPEC_MOVE_PIC_LABEL))) (set (match_operand:SI 0 "register_operand" "=r") (minus:SI (match_dup 5) (match_dup 4)))] "flag_pic" @@ -2095,7 +2091,7 @@ [(set (match_operand:SI 0 "register_operand" "=r") (high:SI (unspec:SI [(match_operand:SI 1 "label_ref_operand" "") - (match_operand:SI 2 "" "")] 5)))] + (match_operand:SI 2 "" "")] UNSPEC_MOVE_PIC_LABEL)))] "flag_pic" "sethi\\t%%hi(%a2-(%a1-.)), %0") @@ -2103,7 +2099,7 @@ [(set (match_operand:SI 0 "register_operand" "=r") (lo_sum:SI (match_operand:SI 1 "register_operand" "r") (unspec:SI [(match_operand:SI 2 "label_ref_operand" "") - (match_operand:SI 3 "" "")] 5)))] + (match_operand:SI 3 "" "")] UNSPEC_MOVE_PIC_LABEL)))] "flag_pic" "or\\t%1, %%lo(%a3-(%a2-.)), %0") @@ -2308,9 +2304,9 @@ (define_expand "movdi_pic_label_ref" [(set (match_dup 3) (high:DI (unspec:DI [(match_operand:DI 1 "label_ref_operand" "") - (match_dup 2)] 5))) + (match_dup 2)] UNSPEC_MOVE_PIC_LABEL))) (set (match_dup 4) (lo_sum:DI (match_dup 3) - (unspec:DI [(match_dup 1) (match_dup 2)] 5))) + (unspec:DI [(match_dup 1) (match_dup 2)] UNSPEC_MOVE_PIC_LABEL))) (set (match_operand:DI 0 "register_operand" "=r") (minus:DI (match_dup 5) (match_dup 4)))] "TARGET_ARCH64 && flag_pic" @@ -2335,7 +2331,7 @@ [(set (match_operand:DI 0 "register_operand" "=r") (high:DI (unspec:DI [(match_operand:DI 1 "label_ref_operand" "") - (match_operand:DI 2 "" "")] 5)))] + (match_operand:DI 2 "" "")] UNSPEC_MOVE_PIC_LABEL)))] "TARGET_ARCH64 && flag_pic" "sethi\\t%%hi(%a2-(%a1-.)), %0") @@ -2343,7 +2339,7 @@ [(set (match_operand:DI 0 "register_operand" "=r") (lo_sum:DI (match_operand:DI 1 "register_operand" "r") (unspec:DI [(match_operand:DI 2 "label_ref_operand" "") - (match_operand:DI 3 "" "")] 5)))] + (match_operand:DI 3 "" "")] UNSPEC_MOVE_PIC_LABEL)))] "TARGET_ARCH64 && flag_pic" "or\\t%1, %%lo(%a3-(%a2-.)), %0") @@ -2353,13 +2349,13 @@ (define_insn "movdi_lo_sum_pic" [(set (match_operand:DI 0 "register_operand" "=r") (lo_sum:DI (match_operand:DI 1 "register_operand" "r") - (unspec:DI [(match_operand:DI 2 "immediate_operand" "in")] 0)))] + (unspec:DI [(match_operand:DI 2 "immediate_operand" "in")] UNSPEC_MOVE_PIC)))] "TARGET_ARCH64 && flag_pic" "or\\t%1, %%lo(%a2), %0") (define_insn "movdi_high_pic" [(set (match_operand:DI 0 "register_operand" "=r") - (high:DI (unspec:DI [(match_operand 1 "" "")] 0)))] + (high:DI (unspec:DI [(match_operand 1 "" "")] UNSPEC_MOVE_PIC)))] "TARGET_ARCH64 && flag_pic && check_pic (1)" "sethi\\t%%hi(%a1), %0") @@ -2384,14 +2380,14 @@ (define_insn "seth44" [(set (match_operand:DI 0 "register_operand" "=r") - (high:DI (unspec:DI [(match_operand:DI 1 "symbolic_operand" "")] 6)))] + (high:DI (unspec:DI [(match_operand:DI 1 "symbolic_operand" "")] UNSPEC_SETH44)))] "TARGET_CM_MEDMID" "sethi\\t%%h44(%a1), %0") (define_insn "setm44" [(set (match_operand:DI 0 "register_operand" "=r") (lo_sum:DI (match_operand:DI 1 "register_operand" "r") - (unspec:DI [(match_operand:DI 2 "symbolic_operand" "")] 7)))] + (unspec:DI [(match_operand:DI 2 "symbolic_operand" "")] UNSPEC_SETM44)))] "TARGET_CM_MEDMID" "or\\t%1, %%m44(%a2), %0") @@ -2404,20 +2400,20 @@ (define_insn "sethh" [(set (match_operand:DI 0 "register_operand" "=r") - (high:DI (unspec:DI [(match_operand:DI 1 "symbolic_operand" "")] 9)))] + (high:DI (unspec:DI [(match_operand:DI 1 "symbolic_operand" "")] UNSPEC_SETHH)))] "TARGET_CM_MEDANY" "sethi\\t%%hh(%a1), %0") (define_insn "setlm" [(set (match_operand:DI 0 "register_operand" "=r") - (high:DI (unspec:DI [(match_operand:DI 1 "symbolic_operand" "")] 10)))] + (high:DI (unspec:DI [(match_operand:DI 1 "symbolic_operand" "")] UNSPEC_SETLM)))] "TARGET_CM_MEDANY" "sethi\\t%%lm(%a1), %0") (define_insn "sethm" [(set (match_operand:DI 0 "register_operand" "=r") (lo_sum:DI (match_operand:DI 1 "register_operand" "r") - (unspec:DI [(match_operand:DI 2 "symbolic_operand" "")] 18)))] + (unspec:DI [(match_operand:DI 2 "symbolic_operand" "")] UNSPEC_EMB_SETHM)))] "TARGET_CM_MEDANY" "or\\t%1, %%hm(%a2), %0") @@ -2430,7 +2426,7 @@ (define_insn "embmedany_sethi" [(set (match_operand:DI 0 "register_operand" "=r") - (high:DI (unspec:DI [(match_operand:DI 1 "data_segment_operand" "")] 11)))] + (high:DI (unspec:DI [(match_operand:DI 1 "data_segment_operand" "")] UNSPEC_EMB_HISUM)))] "TARGET_CM_EMBMEDANY && check_pic (1)" "sethi\\t%%hi(%a1), %0") @@ -2443,26 +2439,26 @@ (define_insn "embmedany_brsum" [(set (match_operand:DI 0 "register_operand" "=r") - (unspec:DI [(match_operand:DI 1 "register_operand" "r")] 11))] + (unspec:DI [(match_operand:DI 1 "register_operand" "r")] UNSPEC_EMB_HISUM))] "TARGET_CM_EMBMEDANY" "add\\t%1, %_, %0") (define_insn "embmedany_textuhi" [(set (match_operand:DI 0 "register_operand" "=r") - (high:DI (unspec:DI [(match_operand:DI 1 "text_segment_operand" "")] 13)))] + (high:DI (unspec:DI [(match_operand:DI 1 "text_segment_operand" "")] UNSPEC_EMB_TEXTUHI)))] "TARGET_CM_EMBMEDANY && check_pic (1)" "sethi\\t%%uhi(%a1), %0") (define_insn "embmedany_texthi" [(set (match_operand:DI 0 "register_operand" "=r") - (high:DI (unspec:DI [(match_operand:DI 1 "text_segment_operand" "")] 14)))] + (high:DI (unspec:DI [(match_operand:DI 1 "text_segment_operand" "")] UNSPEC_EMB_TEXTHI)))] "TARGET_CM_EMBMEDANY && check_pic (1)" "sethi\\t%%hi(%a1), %0") (define_insn "embmedany_textulo" [(set (match_operand:DI 0 "register_operand" "=r") (lo_sum:DI (match_operand:DI 1 "register_operand" "r") - (unspec:DI [(match_operand:DI 2 "text_segment_operand" "")] 15)))] + (unspec:DI [(match_operand:DI 2 "text_segment_operand" "")] UNSPEC_EMB_TEXTULO)))] "TARGET_CM_EMBMEDANY" "or\\t%1, %%ulo(%a2), %0") @@ -7982,7 +7978,7 @@ ;; all of memory. This blocks insns from being moved across this point. (define_insn "blockage" - [(unspec_volatile [(const_int 0)] 0)] + [(unspec_volatile [(const_int 0)] UNSPECV_BLOCKAGE)] "" "" [(set_attr "length" "0")]) @@ -8034,7 +8030,7 @@ (define_insn "update_return" [(unspec:SI [(match_operand:SI 0 "register_operand" "r") - (match_operand:SI 1 "register_operand" "r")] 1)] + (match_operand:SI 1 "register_operand" "r")] UNSPEC_UPDATE_RETURN)] "! TARGET_ARCH64" "cmp\\t%1, 0\;be,a\\t.+8\;add\\t%0, 4, %0" [(set_attr "type" "multi") @@ -8127,13 +8123,13 @@ ;; Special trap insn to flush register windows. (define_insn "flush_register_windows" - [(unspec_volatile [(const_int 0)] 1)] + [(unspec_volatile [(const_int 0)] UNSPECV_FLUSHW)] "" "* return TARGET_V9 ? \"flushw\" : \"ta\\t3\";" [(set_attr "type" "misc")]) (define_insn "goto_handler_and_restore" - [(unspec_volatile [(match_operand 0 "register_operand" "=r")] 2)] + [(unspec_volatile [(match_operand 0 "register_operand" "=r")] UNSPECV_GOTO)] "GET_MODE (operands[0]) == Pmode" "jmp\\t%0+0\\n\\trestore" [(set_attr "type" "multi") @@ -8142,7 +8138,7 @@ ;;(define_insn "goto_handler_and_restore_v9" ;; [(unspec_volatile [(match_operand:SI 0 "register_operand" "=r,r") ;; (match_operand:SI 1 "register_operand" "=r,r") -;; (match_operand:SI 2 "const_int_operand" "I,n")] 3)] +;; (match_operand:SI 2 "const_int_operand" "I,n")] UNSPECV_GOTO_V9)] ;; "TARGET_V9 && ! TARGET_ARCH64" ;; "@ ;; return\\t%0+0\\n\\tmov\\t%2, %Y1 @@ -8153,7 +8149,7 @@ ;;(define_insn "*goto_handler_and_restore_v9_sp64" ;; [(unspec_volatile [(match_operand:DI 0 "register_operand" "=r,r") ;; (match_operand:DI 1 "register_operand" "=r,r") -;; (match_operand:SI 2 "const_int_operand" "I,n")] 3)] +;; (match_operand:SI 2 "const_int_operand" "I,n")] UNSPECV_GOTO_V9)] ;; "TARGET_V9 && TARGET_ARCH64" ;; "@ ;; return\\t%0+0\\n\\tmov\\t%2, %Y1 @@ -8174,7 +8170,7 @@ }") (define_insn "do_builtin_setjmp_setup" - [(unspec_volatile [(const_int 0)] 5)] + [(unspec_volatile [(const_int 0)] UNSPECV_SETJMP)] "" "* { @@ -8199,7 +8195,7 @@ (const_int 3)))]) (define_split - [(unspec_volatile [(const_int 0)] 5)] + [(unspec_volatile [(const_int 0)] UNSPECV_SETJMP)] "! current_function_calls_alloca || ! TARGET_V9 || TARGET_FLAT" [(const_int 0)] " @@ -8246,13 +8242,13 @@ ; it on SImode mem values. (define_insn "flush" - [(unspec_volatile [(match_operand:SI 0 "memory_operand" "m")] 3)] + [(unspec_volatile [(match_operand:SI 0 "memory_operand" "m")] UNSPECV_FLUSH)] "" "* return TARGET_V9 ? \"flush\\t%f0\" : \"iflush\\t%f0\";" [(set_attr "type" "misc")]) (define_insn "flushdi" - [(unspec_volatile [(match_operand:DI 0 "memory_operand" "m")] 3)] + [(unspec_volatile [(match_operand:DI 0 "memory_operand" "m")] UNSPECV_FLUSH)] "" "* return TARGET_V9 ? \"flush\\t%f0\" : \"iflush\\t%f0\";" [(set_attr "type" "misc")])