From: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Date: Tue, 6 May 2014 04:39:38 +0000 (-0700)
Subject: net: xilinx_ethlite: Fix Rx-pong interrupt
X-Git-Tag: v2.1.0-rc0~71^2~4
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=40e76f736d09535bc20e980a06c059229c7b5265;p=thirdparty%2Fqemu.git

net: xilinx_ethlite: Fix Rx-pong interrupt

There is no CTRL_I bit in the pong buffer control register. The
CTRL_I bit from the ping buffer masks both ping and pong buffers.
Fix.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
---

diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c
index 5a434f642d1..1b177b3dae3 100644
--- a/hw/net/xilinx_ethlite.c
+++ b/hw/net/xilinx_ethlite.c
@@ -196,8 +196,9 @@ static ssize_t eth_rx(NetClientState *nc, const uint8_t *buf, size_t size)
     memcpy(&s->regs[rxbase + R_RX_BUF0], buf, size);
 
     s->regs[rxbase + R_RX_CTRL0] |= CTRL_S;
-    if (s->regs[rxbase + R_RX_CTRL0] & CTRL_I)
+    if (s->regs[R_RX_CTRL0] & CTRL_I) {
         eth_pulse_irq(s);
+    }
 
     /* If c_rx_pingpong was set flip buffers.  */
     s->rxbuf ^= s->c_rx_pingpong;