From: Sasha Levin Date: Sun, 24 Mar 2024 17:48:26 +0000 (-0400) Subject: Drop arm64-dts-qcom-sc8280xp-fix-ufs-phy-clocks.patch X-Git-Tag: v6.8.2~67 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=42b49867e17ac8d2d9acc9c689cf21b728d6a8a5;p=thirdparty%2Fkernel%2Fstable-queue.git Drop arm64-dts-qcom-sc8280xp-fix-ufs-phy-clocks.patch Signed-off-by: Sasha Levin --- diff --git a/queue-6.1/arm64-dts-qcom-sc8280xp-fix-ufs-phy-clocks.patch b/queue-6.1/arm64-dts-qcom-sc8280xp-fix-ufs-phy-clocks.patch deleted file mode 100644 index 8d91092fee4..00000000000 --- a/queue-6.1/arm64-dts-qcom-sc8280xp-fix-ufs-phy-clocks.patch +++ /dev/null @@ -1,63 +0,0 @@ -From 1154c3a467b6aa7ffbef75370e18c4c3cfff3141 Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Wed, 31 Jan 2024 12:37:37 +0530 -Subject: arm64: dts: qcom: sc8280xp: Fix UFS PHY clocks - -From: Manivannan Sadhasivam - -[ Upstream commit 1d4ef9644e219202ed89ac42f3e1defebcab9c7d ] - -QMP PHY used in SC8280XP requires 3 clocks: - -* ref - 19.2MHz reference clock from RPMh -* ref_aux - Auxiliary reference clock from GCC -* qref - QREF clock from GCC - -Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") -Signed-off-by: Manivannan Sadhasivam -Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-14-58a49d2f4605@linaro.org -Signed-off-by: Bjorn Andersson -Signed-off-by: Sasha Levin ---- - arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 18 ++++++++++++------ - 1 file changed, 12 insertions(+), 6 deletions(-) - -diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi -index 88140ce104a44..57937fdd1e790 100644 ---- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi -+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi -@@ -889,9 +889,12 @@ ufs_mem_phy: phy@1d87000 { - compatible = "qcom,sc8280xp-qmp-ufs-phy"; - reg = <0 0x01d87000 0 0x1000>; - -- clocks = <&gcc GCC_UFS_CARD_CLKREF_CLK>, -- <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; -- clock-names = "ref", "ref_aux"; -+ clocks = <&rpmhcc RPMH_CXO_CLK>, -+ <&gcc GCC_UFS_PHY_PHY_AUX_CLK>, -+ <&gcc GCC_UFS_CARD_CLKREF_CLK>; -+ clock-names = "ref", -+ "ref_aux", -+ "qref"; - - power-domains = <&gcc UFS_PHY_GDSC>; - -@@ -951,9 +954,12 @@ ufs_card_phy: phy@1da7000 { - compatible = "qcom,sc8280xp-qmp-ufs-phy"; - reg = <0 0x01da7000 0 0x1000>; - -- clocks = <&gcc GCC_UFS_1_CARD_CLKREF_CLK>, -- <&gcc GCC_UFS_CARD_PHY_AUX_CLK>; -- clock-names = "ref", "ref_aux"; -+ clocks = <&rpmhcc RPMH_CXO_CLK>, -+ <&gcc GCC_UFS_CARD_PHY_AUX_CLK>, -+ <&gcc GCC_UFS_1_CARD_CLKREF_CLK>; -+ clock-names = "ref", -+ "ref_aux", -+ "qref"; - - power-domains = <&gcc UFS_CARD_GDSC>; - --- -2.43.0 - diff --git a/queue-6.1/series b/queue-6.1/series index 24ed62e059c..4d3e5ecb27a 100644 --- a/queue-6.1/series +++ b/queue-6.1/series @@ -135,7 +135,6 @@ arm64-dts-qcom-sm8150-fix-ufs-phy-clocks.patch arm64-dts-qcom-sm8250-switch-ufs-qmp-phy-to-new-styl.patch arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch arm64-dts-qcom-sc8280xp-update-ufs-phy-nodes.patch -arm64-dts-qcom-sc8280xp-fix-ufs-phy-clocks.patch printk-disable-passing-console-lock-owner-completely.patch pwm-sti-fix-capture-for-st-pwm-num-chan-st-capture-n.patch tools-resolve_btfids-refactor-set-sorting-with-types.patch diff --git a/queue-6.6/arm64-dts-qcom-sc8280xp-fix-ufs-phy-clocks.patch b/queue-6.6/arm64-dts-qcom-sc8280xp-fix-ufs-phy-clocks.patch deleted file mode 100644 index bb39e0caf5e..00000000000 --- a/queue-6.6/arm64-dts-qcom-sc8280xp-fix-ufs-phy-clocks.patch +++ /dev/null @@ -1,63 +0,0 @@ -From 1ba174627e2f7a08614d663d0fc669f563d02110 Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Wed, 31 Jan 2024 12:37:37 +0530 -Subject: arm64: dts: qcom: sc8280xp: Fix UFS PHY clocks - -From: Manivannan Sadhasivam - -[ Upstream commit 1d4ef9644e219202ed89ac42f3e1defebcab9c7d ] - -QMP PHY used in SC8280XP requires 3 clocks: - -* ref - 19.2MHz reference clock from RPMh -* ref_aux - Auxiliary reference clock from GCC -* qref - QREF clock from GCC - -Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") -Signed-off-by: Manivannan Sadhasivam -Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-14-58a49d2f4605@linaro.org -Signed-off-by: Bjorn Andersson -Signed-off-by: Sasha Levin ---- - arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 18 ++++++++++++------ - 1 file changed, 12 insertions(+), 6 deletions(-) - -diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi -index b8081513176ac..8732a510245c8 100644 ---- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi -+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi -@@ -2256,9 +2256,12 @@ ufs_mem_phy: phy@1d87000 { - compatible = "qcom,sc8280xp-qmp-ufs-phy"; - reg = <0 0x01d87000 0 0x1000>; - -- clocks = <&gcc GCC_UFS_CARD_CLKREF_CLK>, -- <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; -- clock-names = "ref", "ref_aux"; -+ clocks = <&rpmhcc RPMH_CXO_CLK>, -+ <&gcc GCC_UFS_PHY_PHY_AUX_CLK>, -+ <&gcc GCC_UFS_CARD_CLKREF_CLK>; -+ clock-names = "ref", -+ "ref_aux", -+ "qref"; - - power-domains = <&gcc UFS_PHY_GDSC>; - -@@ -2318,9 +2321,12 @@ ufs_card_phy: phy@1da7000 { - compatible = "qcom,sc8280xp-qmp-ufs-phy"; - reg = <0 0x01da7000 0 0x1000>; - -- clocks = <&gcc GCC_UFS_1_CARD_CLKREF_CLK>, -- <&gcc GCC_UFS_CARD_PHY_AUX_CLK>; -- clock-names = "ref", "ref_aux"; -+ clocks = <&rpmhcc RPMH_CXO_CLK>, -+ <&gcc GCC_UFS_CARD_PHY_AUX_CLK>, -+ <&gcc GCC_UFS_1_CARD_CLKREF_CLK>; -+ clock-names = "ref", -+ "ref_aux", -+ "qref"; - - power-domains = <&gcc UFS_CARD_GDSC>; - --- -2.43.0 - diff --git a/queue-6.6/series b/queue-6.6/series index 36b0daf71b9..2d5acecb9bc 100644 --- a/queue-6.6/series +++ b/queue-6.6/series @@ -196,7 +196,6 @@ arm64-dts-qcom-sm8150-switch-ufs-qmp-phy-to-new-styl.patch arm64-dts-qcom-sm8150-fix-ufs-phy-clocks.patch arm64-dts-qcom-sm8250-switch-ufs-qmp-phy-to-new-styl.patch arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch -arm64-dts-qcom-sc8280xp-fix-ufs-phy-clocks.patch arm64-dts-qcom-sm8350-switch-ufs-qmp-phy-to-new-styl.patch arm64-dts-qcom-sm8350-fix-ufs-phy-clocks.patch arm64-dts-qcom-sm8550-fix-ufs-phy-clocks.patch diff --git a/queue-6.7/arm64-dts-qcom-sc8280xp-fix-ufs-phy-clocks.patch b/queue-6.7/arm64-dts-qcom-sc8280xp-fix-ufs-phy-clocks.patch deleted file mode 100644 index 3f48de1cdb6..00000000000 --- a/queue-6.7/arm64-dts-qcom-sc8280xp-fix-ufs-phy-clocks.patch +++ /dev/null @@ -1,63 +0,0 @@ -From f96256045c7e5939008f0f7182934c2443150014 Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Wed, 31 Jan 2024 12:37:37 +0530 -Subject: arm64: dts: qcom: sc8280xp: Fix UFS PHY clocks - -From: Manivannan Sadhasivam - -[ Upstream commit 1d4ef9644e219202ed89ac42f3e1defebcab9c7d ] - -QMP PHY used in SC8280XP requires 3 clocks: - -* ref - 19.2MHz reference clock from RPMh -* ref_aux - Auxiliary reference clock from GCC -* qref - QREF clock from GCC - -Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") -Signed-off-by: Manivannan Sadhasivam -Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-14-58a49d2f4605@linaro.org -Signed-off-by: Bjorn Andersson -Signed-off-by: Sasha Levin ---- - arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 18 ++++++++++++------ - 1 file changed, 12 insertions(+), 6 deletions(-) - -diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi -index b8081513176ac..8732a510245c8 100644 ---- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi -+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi -@@ -2256,9 +2256,12 @@ ufs_mem_phy: phy@1d87000 { - compatible = "qcom,sc8280xp-qmp-ufs-phy"; - reg = <0 0x01d87000 0 0x1000>; - -- clocks = <&gcc GCC_UFS_CARD_CLKREF_CLK>, -- <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; -- clock-names = "ref", "ref_aux"; -+ clocks = <&rpmhcc RPMH_CXO_CLK>, -+ <&gcc GCC_UFS_PHY_PHY_AUX_CLK>, -+ <&gcc GCC_UFS_CARD_CLKREF_CLK>; -+ clock-names = "ref", -+ "ref_aux", -+ "qref"; - - power-domains = <&gcc UFS_PHY_GDSC>; - -@@ -2318,9 +2321,12 @@ ufs_card_phy: phy@1da7000 { - compatible = "qcom,sc8280xp-qmp-ufs-phy"; - reg = <0 0x01da7000 0 0x1000>; - -- clocks = <&gcc GCC_UFS_1_CARD_CLKREF_CLK>, -- <&gcc GCC_UFS_CARD_PHY_AUX_CLK>; -- clock-names = "ref", "ref_aux"; -+ clocks = <&rpmhcc RPMH_CXO_CLK>, -+ <&gcc GCC_UFS_CARD_PHY_AUX_CLK>, -+ <&gcc GCC_UFS_1_CARD_CLKREF_CLK>; -+ clock-names = "ref", -+ "ref_aux", -+ "qref"; - - power-domains = <&gcc UFS_CARD_GDSC>; - --- -2.43.0 - diff --git a/queue-6.7/series b/queue-6.7/series index 2e7e5c26f97..e8a3d4d8f94 100644 --- a/queue-6.7/series +++ b/queue-6.7/series @@ -221,7 +221,6 @@ arm64-dts-qcom-sm8150-switch-ufs-qmp-phy-to-new-styl.patch arm64-dts-qcom-sm8150-fix-ufs-phy-clocks.patch arm64-dts-qcom-sm8250-switch-ufs-qmp-phy-to-new-styl.patch arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch -arm64-dts-qcom-sc8280xp-fix-ufs-phy-clocks.patch arm64-dts-qcom-sm8350-switch-ufs-qmp-phy-to-new-styl.patch arm64-dts-qcom-sm8350-fix-ufs-phy-clocks.patch arm64-dts-qcom-sm8550-fix-ufs-phy-clocks.patch diff --git a/queue-6.8/arm64-dts-qcom-sc8280xp-fix-ufs-phy-clocks.patch b/queue-6.8/arm64-dts-qcom-sc8280xp-fix-ufs-phy-clocks.patch deleted file mode 100644 index c96576e6f5f..00000000000 --- a/queue-6.8/arm64-dts-qcom-sc8280xp-fix-ufs-phy-clocks.patch +++ /dev/null @@ -1,63 +0,0 @@ -From ded687f305f7c8f497b2f71fd79cc0644d622ffc Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Wed, 31 Jan 2024 12:37:37 +0530 -Subject: arm64: dts: qcom: sc8280xp: Fix UFS PHY clocks - -From: Manivannan Sadhasivam - -[ Upstream commit 1d4ef9644e219202ed89ac42f3e1defebcab9c7d ] - -QMP PHY used in SC8280XP requires 3 clocks: - -* ref - 19.2MHz reference clock from RPMh -* ref_aux - Auxiliary reference clock from GCC -* qref - QREF clock from GCC - -Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") -Signed-off-by: Manivannan Sadhasivam -Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-14-58a49d2f4605@linaro.org -Signed-off-by: Bjorn Andersson -Signed-off-by: Sasha Levin ---- - arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 18 ++++++++++++------ - 1 file changed, 12 insertions(+), 6 deletions(-) - -diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi -index febf28356ff8b..bb0786ab2864d 100644 ---- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi -+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi -@@ -2257,9 +2257,12 @@ ufs_mem_phy: phy@1d87000 { - compatible = "qcom,sc8280xp-qmp-ufs-phy"; - reg = <0 0x01d87000 0 0x1000>; - -- clocks = <&gcc GCC_UFS_CARD_CLKREF_CLK>, -- <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; -- clock-names = "ref", "ref_aux"; -+ clocks = <&rpmhcc RPMH_CXO_CLK>, -+ <&gcc GCC_UFS_PHY_PHY_AUX_CLK>, -+ <&gcc GCC_UFS_CARD_CLKREF_CLK>; -+ clock-names = "ref", -+ "ref_aux", -+ "qref"; - - power-domains = <&gcc UFS_PHY_GDSC>; - -@@ -2319,9 +2322,12 @@ ufs_card_phy: phy@1da7000 { - compatible = "qcom,sc8280xp-qmp-ufs-phy"; - reg = <0 0x01da7000 0 0x1000>; - -- clocks = <&gcc GCC_UFS_1_CARD_CLKREF_CLK>, -- <&gcc GCC_UFS_CARD_PHY_AUX_CLK>; -- clock-names = "ref", "ref_aux"; -+ clocks = <&rpmhcc RPMH_CXO_CLK>, -+ <&gcc GCC_UFS_CARD_PHY_AUX_CLK>, -+ <&gcc GCC_UFS_1_CARD_CLKREF_CLK>; -+ clock-names = "ref", -+ "ref_aux", -+ "qref"; - - power-domains = <&gcc UFS_CARD_GDSC>; - --- -2.43.0 - diff --git a/queue-6.8/series b/queue-6.8/series index 1030e965016..6d01f351f3d 100644 --- a/queue-6.8/series +++ b/queue-6.8/series @@ -160,7 +160,6 @@ arm64-dts-qcom-sm6125-fix-ufs-phy-clocks.patch arm64-dts-qcom-sm6350-fix-ufs-phy-clocks.patch arm64-dts-qcom-sm8150-fix-ufs-phy-clocks.patch arm64-dts-qcom-sm8250-fix-ufs-phy-clocks.patch -arm64-dts-qcom-sc8280xp-fix-ufs-phy-clocks.patch arm64-dts-qcom-sm8350-fix-ufs-phy-clocks.patch arm64-dts-qcom-sm8550-fix-ufs-phy-clocks.patch arm64-dts-qcom-sm8650-fix-ufs-phy-clocks.patch