From: Pan Li Date: Wed, 20 Nov 2024 05:22:40 +0000 (+0800) Subject: RISC-V: Rearrange the test files for vector SAT_ADD [NFC] X-Git-Tag: basepoints/gcc-16~4056 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=42f1a08e41d7f70624d874b034211e7ffe65a99e;p=thirdparty%2Fgcc.git RISC-V: Rearrange the test files for vector SAT_ADD [NFC] The test files of scalar SAT_TRUNC only has numbers as the suffix. Rearrange the file name to -{form number}-{target-type}. For example, test form 3 for uint32_t SAT_TRUNC will have -3-u32.c for asm check and -run-3-u32.c for the run test. Meanwhile, all related test files moved to riscv/rvv/autovec/sat/. The below test suites are passed for this patch. * The rv64gcv fully regression test. It is test only patch and obvious up to a point, will commit it directly if no comments in next 48H. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-2.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-1-s16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-3.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-1-s32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-4.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-1-s64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-1.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-1-s8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-6.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-2-s16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-7.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-2-s32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-2-s64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-5.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-2-s8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-10.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-3-s16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-11.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-3-s32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-12.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-3-s64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-9.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-3-s8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-14.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-4-s16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-15.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-4-s32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-4-s64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-13.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-4-s8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-run-2.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-1-s16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-run-3.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-1-s32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-run-4.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-1-s64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-run-1.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-1-s8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-run-6.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-2-s16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-run-7.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-2-s32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-run-8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-2-s64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-run-5.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-2-s8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-run-10.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-3-s16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-run-11.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-3-s32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-run-12.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-3-s64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-run-9.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-3-s8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-run-14.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-4-s16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-run-15.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-4-s32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-run-16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-4-s64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-run-13.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-4-s8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-2.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-1-u16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-3.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-1-u32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-4.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-1-u64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-1.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-1-u8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-6.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-2-u16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-7.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-2-u32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-2-u64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-5.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-2-u8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-10.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-3-u16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-11.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-3-u32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-12.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-3-u64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-9.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-3-u8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-14.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-4-u16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-15.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-4-u32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-4-u64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-13.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-4-u8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-18.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-5-u16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-19.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-5-u32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-20.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-5-u64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-17.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-5-u8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-22.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-6-u16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-23.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-6-u32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-24.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-6-u64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-21.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-6-u8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-26.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-7-u16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-27.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-7-u32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-28.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-7-u64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-25.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-7-u8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-30.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-8-u16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-31.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-8-u32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-32.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-8-u64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-29.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-8-u8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-2.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-1-u16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-3.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-1-u32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-4.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-1-u64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-1.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-1-u8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-6.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-2-u16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-7.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-2-u32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-2-u64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-5.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-2-u8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-10.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-3-u16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-11.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-3-u32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-12.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-3-u64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-9.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-3-u8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-14.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-4-u16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-15.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-4-u32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-4-u64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-13.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-4-u8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-18.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-5-u16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-19.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-5-u32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-20.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-5-u64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-17.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-5-u8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-22.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-6-u16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-23.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-6-u32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-24.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-6-u64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-21.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-6-u8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-26.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-7-u16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-27.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-7-u32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-28.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-7-u64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-25.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-7-u8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-30.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-8-u16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-31.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-8-u32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-32.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-8-u64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-29.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-8-u8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm-2.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-1-u16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm-3.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-1-u32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm-4.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-1-u64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm-1.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-1-u8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm-6.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-2-u16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm-7.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-2-u32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm-8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-2-u64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm-5.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-2-u8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm-10.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-3-u16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm-11.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-3-u32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm-12.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-3-u64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm-9.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-3-u8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm-14.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-4-u16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm-15.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-4-u32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm-16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-4-u64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm-13.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-4-u8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm-run-2.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-run-1-u16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm-run-3.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-run-1-u32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm-run-4.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-run-1-u64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm-run-1.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-run-1-u8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm-run-6.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-run-2-u16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm-run-7.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-run-2-u32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm-run-8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-run-2-u64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm-run-5.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-run-2-u8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm-run-10.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-run-3-u16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm-run-11.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-run-3-u32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm-run-12.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-run-3-u64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm-run-9.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-run-3-u8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm-run-14.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-run-4-u16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm-run-15.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-run-4-u32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm-run-16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-run-4-u64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm-run-13.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-run-4-u8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-2.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-1-u16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-3.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-1-u32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-4.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-1-u64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-1.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-1-u8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-6.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-2-u16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-7.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-2-u32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-2-u64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-5.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-2-u8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-10.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-3-u16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-11.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-3-u32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-12.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-3-u64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-9.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-3-u8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-14.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-4-u16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-15.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-4-u32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add_imm_reconcile-13.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-4-u8.c: ...here. * gcc.target/riscv/rvv/autovec/sat/vec_sat_arith.h: New test. * gcc.target/riscv/rvv/autovec/sat/vec_sat_binary_vvv_run.h: New test. * gcc.target/riscv/rvv/autovec/sat/vec_sat_binary_vvx_run.h: New test. * gcc.target/riscv/rvv/autovec/sat/vec_sat_binary_vx_run.h: New test. * gcc.target/riscv/rvv/autovec/sat/vec_sat_data.h: New test. Signed-off-by: Pan Li --- diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_arith.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_arith.h new file mode 100644 index 000000000000..cb419553926d --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_arith.h @@ -0,0 +1,886 @@ +#ifndef HAVE_VEC_SAT_ARITH +#define HAVE_VEC_SAT_ARITH + +#include +#include + +#define VALIDATE_RESULT(out, expect, N) \ + do \ + { \ + for (unsigned i = 0; i < N; i++) \ + if (out[i] != expect[i]) __builtin_abort (); \ + } \ + while (false) + +/******************************************************************************/ +/* Saturation Add (unsigned and signed) */ +/******************************************************************************/ +#define DEF_VEC_SAT_U_ADD_FMT_1(T) \ +void __attribute__((noinline)) \ +vec_sat_u_add_##T##_fmt_1 (T *out, T *op_1, T *op_2, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + T x = op_1[i]; \ + T y = op_2[i]; \ + out[i] = (x + y) | (-(T)((T)(x + y) < x)); \ + } \ +} + +#define DEF_VEC_SAT_U_ADD_FMT_2(T) \ +void __attribute__((noinline)) \ +vec_sat_u_add_##T##_fmt_2 (T *out, T *op_1, T *op_2, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + T x = op_1[i]; \ + T y = op_2[i]; \ + out[i] = (T)(x + y) >= x ? (x + y) : -1; \ + } \ +} + +#define DEF_VEC_SAT_U_ADD_FMT_3(T) \ +void __attribute__((noinline)) \ +vec_sat_u_add_##T##_fmt_3 (T *out, T *op_1, T *op_2, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + T x = op_1[i]; \ + T y = op_2[i]; \ + T ret; \ + T overflow = __builtin_add_overflow (x, y, &ret); \ + out[i] = (T)(-overflow) | ret; \ + } \ +} + +#define DEF_VEC_SAT_U_ADD_FMT_4(T) \ +void __attribute__((noinline)) \ +vec_sat_u_add_##T##_fmt_4 (T *out, T *op_1, T *op_2, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + T x = op_1[i]; \ + T y = op_2[i]; \ + T ret; \ + out[i] = __builtin_add_overflow (x, y, &ret) ? -1 : ret; \ + } \ +} + +#define DEF_VEC_SAT_U_ADD_FMT_5(T) \ +void __attribute__((noinline)) \ +vec_sat_u_add_##T##_fmt_5 (T *out, T *op_1, T *op_2, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + T x = op_1[i]; \ + T y = op_2[i]; \ + T ret; \ + out[i] = __builtin_add_overflow (x, y, &ret) == 0 ? ret : -1; \ + } \ +} + +#define DEF_VEC_SAT_U_ADD_FMT_6(T) \ +void __attribute__((noinline)) \ +vec_sat_u_add_##T##_fmt_6 (T *out, T *op_1, T *op_2, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + T x = op_1[i]; \ + T y = op_2[i]; \ + out[i] = x <= (T)(x + y) ? (x + y) : -1; \ + } \ +} + +#define DEF_VEC_SAT_U_ADD_FMT_7(T) \ +void __attribute__((noinline)) \ +vec_sat_u_add_##T##_fmt_7 (T *out, T *op_1, T *op_2, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + T x = op_1[i]; \ + T y = op_2[i]; \ + out[i] = (T)(x + y) < x ? -1 : (x + y); \ + } \ +} + +#define DEF_VEC_SAT_U_ADD_FMT_8(T) \ +void __attribute__((noinline)) \ +vec_sat_u_add_##T##_fmt_8 (T *out, T *op_1, T *op_2, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + T x = op_1[i]; \ + T y = op_2[i]; \ + out[i] = x > (T)(x + y) ? -1 : (x + y); \ + } \ +} + +#define RUN_VEC_SAT_U_ADD_FMT_1(T, out, op_1, op_2, N) \ + vec_sat_u_add_##T##_fmt_1(out, op_1, op_2, N) + +#define RUN_VEC_SAT_U_ADD_FMT_2(T, out, op_1, op_2, N) \ + vec_sat_u_add_##T##_fmt_2(out, op_1, op_2, N) + +#define RUN_VEC_SAT_U_ADD_FMT_3(T, out, op_1, op_2, N) \ + vec_sat_u_add_##T##_fmt_3(out, op_1, op_2, N) + +#define RUN_VEC_SAT_U_ADD_FMT_4(T, out, op_1, op_2, N) \ + vec_sat_u_add_##T##_fmt_4(out, op_1, op_2, N) + +#define RUN_VEC_SAT_U_ADD_FMT_5(T, out, op_1, op_2, N) \ + vec_sat_u_add_##T##_fmt_5(out, op_1, op_2, N) + +#define RUN_VEC_SAT_U_ADD_FMT_6(T, out, op_1, op_2, N) \ + vec_sat_u_add_##T##_fmt_6(out, op_1, op_2, N) + +#define RUN_VEC_SAT_U_ADD_FMT_7(T, out, op_1, op_2, N) \ + vec_sat_u_add_##T##_fmt_7(out, op_1, op_2, N) + +#define RUN_VEC_SAT_U_ADD_FMT_8(T, out, op_1, op_2, N) \ + vec_sat_u_add_##T##_fmt_8(out, op_1, op_2, N) + +#define DEF_VEC_SAT_U_ADD_IMM_FMT_1(T, IMM) \ +T __attribute__((noinline)) \ +vec_sat_u_add_imm##IMM##_##T##_fmt_1 (T *out, T *in, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + out[i] = (T)(in[i] + IMM) >= in[i] ? (in[i] + IMM) : -1; \ +} +#define DEF_VEC_SAT_U_ADD_IMM_FMT_1_WRAP(T, IMM) \ + DEF_VEC_SAT_U_ADD_IMM_FMT_1(T, IMM) + +#define DEF_VEC_SAT_U_ADD_IMM_FMT_2(T, IMM) \ +T __attribute__((noinline)) \ +vec_sat_u_add_imm##IMM##_##T##_fmt_2 (T *out, T *in, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + out[i] = (T)(in[i] + IMM) < in[i] ? -1 : (in[i] + IMM); \ +} +#define DEF_VEC_SAT_U_ADD_IMM_FMT_2_WRAP(T, IMM) \ + DEF_VEC_SAT_U_ADD_IMM_FMT_2(T, IMM) + +#define DEF_VEC_SAT_U_ADD_IMM_FMT_3(T, IMM) \ +T __attribute__((noinline)) \ +vec_sat_u_add_imm##IMM##_##T##_fmt_3 (T *out, T *in, unsigned limit) \ +{ \ + unsigned i; \ + T ret; \ + for (i = 0; i < limit; i++) \ + { \ + out[i] = __builtin_add_overflow (in[i], IMM, &ret) ? -1 : ret; \ + } \ +} +#define DEF_VEC_SAT_U_ADD_IMM_FMT_3_WRAP(T, IMM) \ + DEF_VEC_SAT_U_ADD_IMM_FMT_3(T, IMM) + +#define DEF_VEC_SAT_U_ADD_IMM_FMT_4(T, IMM) \ +T __attribute__((noinline)) \ +vec_sat_u_add_imm##IMM##_##T##_fmt_4 (T *out, T *in, unsigned limit) \ +{ \ + unsigned i; \ + T ret; \ + for (i = 0; i < limit; i++) \ + { \ + out[i] = __builtin_add_overflow (in[i], IMM, &ret) == 0 ? ret : -1; \ + } \ +} +#define DEF_VEC_SAT_U_ADD_IMM_FMT_4_WRAP(T, IMM) \ + DEF_VEC_SAT_U_ADD_IMM_FMT_4(T, IMM) + +#define RUN_VEC_SAT_U_ADD_IMM_FMT_1(T, out, op_1, expect, IMM, N) \ + vec_sat_u_add_imm##IMM##_##T##_fmt_1(out, op_1, N); \ + VALIDATE_RESULT (out, expect, N) +#define RUN_VEC_SAT_U_ADD_IMM_FMT_1_WRAP(T, out, op_1, expect, IMM, N) \ + RUN_VEC_SAT_U_ADD_IMM_FMT_1(T, out, op_1, expect, IMM, N) + +#define RUN_VEC_SAT_U_ADD_IMM_FMT_2(T, out, op_1, expect, IMM, N) \ + vec_sat_u_add_imm##IMM##_##T##_fmt_2(out, op_1, N); \ + VALIDATE_RESULT (out, expect, N) +#define RUN_VEC_SAT_U_ADD_IMM_FMT_2_WRAP(T, out, op_1, expect, IMM, N) \ + RUN_VEC_SAT_U_ADD_IMM_FMT_2(T, out, op_1, expect, IMM, N) + +#define RUN_VEC_SAT_U_ADD_IMM_FMT_3(T, out, op_1, expect, IMM, N) \ + vec_sat_u_add_imm##IMM##_##T##_fmt_3(out, op_1, N); \ + VALIDATE_RESULT (out, expect, N) +#define RUN_VEC_SAT_U_ADD_IMM_FMT_3_WRAP(T, out, op_1, expect, IMM, N) \ + RUN_VEC_SAT_U_ADD_IMM_FMT_3(T, out, op_1, expect, IMM, N) + +#define RUN_VEC_SAT_U_ADD_IMM_FMT_4(T, out, op_1, expect, IMM, N) \ + vec_sat_u_add_imm##IMM##_##T##_fmt_4(out, op_1, N); \ + VALIDATE_RESULT (out, expect, N) +#define RUN_VEC_SAT_U_ADD_IMM_FMT_4_WRAP(T, out, op_1, expect, IMM, N) \ + RUN_VEC_SAT_U_ADD_IMM_FMT_4(T, out, op_1, expect, IMM, N) + +#define DEF_VEC_SAT_S_ADD_FMT_1(T, UT, MIN, MAX) \ +void __attribute__((noinline)) \ +vec_sat_s_add_##T##_fmt_1 (T *out, T *op_1, T *op_2, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + T x = op_1[i]; \ + T y = op_2[i]; \ + T sum = (UT)x + (UT)y; \ + out[i] = (x ^ y) < 0 \ + ? sum \ + : (sum ^ x) >= 0 \ + ? sum \ + : x < 0 ? MIN : MAX; \ + } \ +} +#define DEF_VEC_SAT_S_ADD_FMT_1_WRAP(T, UT, MIN, MAX) \ + DEF_VEC_SAT_S_ADD_FMT_1(T, UT, MIN, MAX) + +#define DEF_VEC_SAT_S_ADD_FMT_2(T, UT, MIN, MAX) \ +void __attribute__((noinline)) \ +vec_sat_s_add_##T##_fmt_2 (T *out, T *op_1, T *op_2, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + T x = op_1[i]; \ + T y = op_2[i]; \ + T sum = (UT)x + (UT)y; \ + if ((x ^ y) < 0 || (sum ^ x) >= 0) \ + out[i] = sum; \ + else \ + out[i] = x < 0 ? MIN : MAX; \ + } \ +} +#define DEF_VEC_SAT_S_ADD_FMT_2_WRAP(T, UT, MIN, MAX) \ + DEF_VEC_SAT_S_ADD_FMT_2(T, UT, MIN, MAX) + +#define DEF_VEC_SAT_S_ADD_FMT_3(T, UT, MIN, MAX) \ +void __attribute__((noinline)) \ +vec_sat_s_add_##T##_fmt_3 (T *out, T *op_1, T *op_2, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + T x = op_1[i]; \ + T y = op_2[i]; \ + T sum; \ + bool overflow = __builtin_add_overflow (x, y, &sum); \ + out[i] = overflow ? x < 0 ? MIN : MAX : sum; \ + } \ +} +#define DEF_VEC_SAT_S_ADD_FMT_3_WRAP(T, UT, MIN, MAX) \ + DEF_VEC_SAT_S_ADD_FMT_3(T, UT, MIN, MAX) + +#define DEF_VEC_SAT_S_ADD_FMT_4(T, UT, MIN, MAX) \ +void __attribute__((noinline)) \ +vec_sat_s_add_##T##_fmt_4 (T *out, T *op_1, T *op_2, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + T x = op_1[i]; \ + T y = op_2[i]; \ + T sum; \ + bool overflow = __builtin_add_overflow (x, y, &sum); \ + out[i] = !overflow ? sum : x < 0 ? MIN : MAX; \ + } \ +} +#define DEF_VEC_SAT_S_ADD_FMT_4_WRAP(T, UT, MIN, MAX) \ + DEF_VEC_SAT_S_ADD_FMT_4(T, UT, MIN, MAX) + +#define RUN_VEC_SAT_S_ADD_FMT_1(T, out, op_1, op_2, N) \ + vec_sat_s_add_##T##_fmt_1(out, op_1, op_2, N) +#define RUN_VEC_SAT_S_ADD_FMT_1_WRAP(T, out, op_1, op_2, N) \ + RUN_VEC_SAT_S_ADD_FMT_1(T, out, op_1, op_2, N) + +#define RUN_VEC_SAT_S_ADD_FMT_2(T, out, op_1, op_2, N) \ + vec_sat_s_add_##T##_fmt_2(out, op_1, op_2, N) +#define RUN_VEC_SAT_S_ADD_FMT_2_WRAP(T, out, op_1, op_2, N) \ + RUN_VEC_SAT_S_ADD_FMT_2(T, out, op_1, op_2, N) + +#define RUN_VEC_SAT_S_ADD_FMT_3(T, out, op_1, op_2, N) \ + vec_sat_s_add_##T##_fmt_3(out, op_1, op_2, N) +#define RUN_VEC_SAT_S_ADD_FMT_3_WRAP(T, out, op_1, op_2, N) \ + RUN_VEC_SAT_S_ADD_FMT_3(T, out, op_1, op_2, N) + +#define RUN_VEC_SAT_S_ADD_FMT_4(T, out, op_1, op_2, N) \ + vec_sat_s_add_##T##_fmt_4(out, op_1, op_2, N) +#define RUN_VEC_SAT_S_ADD_FMT_4_WRAP(T, out, op_1, op_2, N) \ + RUN_VEC_SAT_S_ADD_FMT_4(T, out, op_1, op_2, N) + +/******************************************************************************/ +/* Saturation Sub (Unsigned and Signed) */ +/******************************************************************************/ +#define DEF_VEC_SAT_U_SUB_FMT_1(T) \ +void __attribute__((noinline)) \ +vec_sat_u_sub_##T##_fmt_1 (T *out, T *op_1, T *op_2, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + T x = op_1[i]; \ + T y = op_2[i]; \ + out[i] = (x - y) & (-(T)(x >= y)); \ + } \ +} + +#define DEF_VEC_SAT_U_SUB_FMT_2(T) \ +void __attribute__((noinline)) \ +vec_sat_u_sub_##T##_fmt_2 (T *out, T *op_1, T *op_2, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + T x = op_1[i]; \ + T y = op_2[i]; \ + out[i] = (x - y) & (-(T)(x > y)); \ + } \ +} + +#define DEF_VEC_SAT_U_SUB_FMT_3(T) \ +void __attribute__((noinline)) \ +vec_sat_u_sub_##T##_fmt_3 (T *out, T *op_1, T *op_2, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + T x = op_1[i]; \ + T y = op_2[i]; \ + out[i] = x > y ? x - y : 0; \ + } \ +} + +#define DEF_VEC_SAT_U_SUB_FMT_4(T) \ +void __attribute__((noinline)) \ +vec_sat_u_sub_##T##_fmt_4 (T *out, T *op_1, T *op_2, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + T x = op_1[i]; \ + T y = op_2[i]; \ + out[i] = x >= y ? x - y : 0; \ + } \ +} + +#define DEF_VEC_SAT_U_SUB_FMT_5(T) \ +void __attribute__((noinline)) \ +vec_sat_u_sub_##T##_fmt_5 (T *out, T *op_1, T *op_2, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + T x = op_1[i]; \ + T y = op_2[i]; \ + out[i] = x < y ? 0 : x - y; \ + } \ +} + +#define DEF_VEC_SAT_U_SUB_FMT_6(T) \ +void __attribute__((noinline)) \ +vec_sat_u_sub_##T##_fmt_6 (T *out, T *op_1, T *op_2, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + T x = op_1[i]; \ + T y = op_2[i]; \ + out[i] = x <= y ? 0 : x - y; \ + } \ +} + +#define DEF_VEC_SAT_U_SUB_FMT_7(T) \ +void __attribute__((noinline)) \ +vec_sat_u_sub_##T##_fmt_7 (T *out, T *op_1, T *op_2, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + T x = op_1[i]; \ + T y = op_2[i]; \ + T ret; \ + T overflow = __builtin_sub_overflow (x, y, &ret); \ + out[i] = ret & (T)(overflow - 1); \ + } \ +} + +#define DEF_VEC_SAT_U_SUB_FMT_8(T) \ +void __attribute__((noinline)) \ +vec_sat_u_sub_##T##_fmt_8 (T *out, T *op_1, T *op_2, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + T x = op_1[i]; \ + T y = op_2[i]; \ + T ret; \ + T overflow = __builtin_sub_overflow (x, y, &ret); \ + out[i] = ret & (T)-(!overflow); \ + } \ +} + +#define DEF_VEC_SAT_U_SUB_FMT_9(T) \ +void __attribute__((noinline)) \ +vec_sat_u_sub_##T##_fmt_9 (T *out, T *op_1, T *op_2, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + T x = op_1[i]; \ + T y = op_2[i]; \ + T ret; \ + bool overflow = __builtin_sub_overflow (x, y, &ret); \ + out[i] = overflow ? 0 : ret; \ + } \ +} + +#define DEF_VEC_SAT_U_SUB_FMT_10(T) \ +void __attribute__((noinline)) \ +vec_sat_u_sub_##T##_fmt_10 (T *out, T *op_1, T *op_2, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + T x = op_1[i]; \ + T y = op_2[i]; \ + T ret; \ + bool overflow = __builtin_sub_overflow (x, y, &ret); \ + out[i] = !overflow ? ret : 0; \ + } \ +} + +#define DEF_VEC_SAT_U_SUB_ZIP(T1, T2) \ +void __attribute__((noinline)) \ +vec_sat_u_sub_##T1##_##T2##_fmt_zip (T1 *x, T2 b, unsigned limit) \ +{ \ + T2 a; \ + T1 *p = x; \ + do { \ + a = *--p; \ + *p = (T1)(a >= b ? a - b : 0); \ + } while (--limit); \ +} +#define DEF_VEC_SAT_U_SUB_ZIP_WRAP(T1, T2) DEF_VEC_SAT_U_SUB_ZIP(T1, T2) + +#define DEF_VEC_SAT_U_SUB_IMM_FMT_1(T, IMM) \ +void __attribute__((noinline)) \ +vec_sat_u_sub_imm##IMM##_##T##_fmt_1 (T *out, T *in, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + out[i] = (T)IMM >= in[i] ? (T)IMM - in[i] : 0; \ +} + +#define DEF_VEC_SAT_U_SUB_IMM_FMT_1_WRAP(T, IMM) \ + DEF_VEC_SAT_U_SUB_IMM_FMT_1(T, IMM) + +#define RUN_VEC_SAT_U_SUB_IMM_FMT_1(T, out, op_1, expect, IMM, N) \ + vec_sat_u_sub_imm##IMM##_##T##_fmt_1(out, op_1, N); \ + VALIDATE_RESULT (out, expect, N) +#define RUN_VEC_SAT_U_SUB_IMM_FMT_1_WRAP(T, out, op_1, expect, IMM, N) \ + RUN_VEC_SAT_U_SUB_IMM_FMT_1(T, out, op_1, expect, IMM, N) + +#define DEF_VEC_SAT_S_SUB_FMT_1(T, UT, MIN, MAX) \ +void __attribute__((noinline)) \ +vec_sat_s_sub_##T##_fmt_1 (T *out, T *op_1, T *op_2, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + T x = op_1[i]; \ + T y = op_2[i]; \ + T minus = (UT)x - (UT)y; \ + out[i] = (x ^ y) >= 0 \ + ? minus \ + : (minus ^ x) >= 0 \ + ? minus \ + : x < 0 ? MIN : MAX; \ + } \ +} +#define DEF_VEC_SAT_S_SUB_FMT_1_WRAP(T, UT, MIN, MAX) \ + DEF_VEC_SAT_S_SUB_FMT_1(T, UT, MIN, MAX) + +#define DEF_VEC_SAT_S_SUB_FMT_2(T, UT, MIN, MAX) \ +void __attribute__((noinline)) \ +vec_sat_s_sub_##T##_fmt_2 (T *out, T *op_1, T *op_2, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + T x = op_1[i]; \ + T y = op_2[i]; \ + T minus = (UT)x - (UT)y; \ + out[i] = (x ^ y) >= 0 || (minus ^ x) >= 0 \ + ? minus : x < 0 ? MIN : MAX; \ + } \ +} +#define DEF_VEC_SAT_S_SUB_FMT_2_WRAP(T, UT, MIN, MAX) \ + DEF_VEC_SAT_S_SUB_FMT_2(T, UT, MIN, MAX) + +#define DEF_VEC_SAT_S_SUB_FMT_3(T, UT, MIN, MAX) \ +void __attribute__((noinline)) \ +vec_sat_s_sub_##T##_fmt_3 (T *out, T *op_1, T *op_2, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + T x = op_1[i]; \ + T y = op_2[i]; \ + T minus; \ + bool overflow = __builtin_sub_overflow (x, y, &minus); \ + out[i] = overflow ? x < 0 ? MIN : MAX : minus; \ + } \ +} +#define DEF_VEC_SAT_S_SUB_FMT_3_WRAP(T, UT, MIN, MAX) \ + DEF_VEC_SAT_S_SUB_FMT_3(T, UT, MIN, MAX) + +#define DEF_VEC_SAT_S_SUB_FMT_4(T, UT, MIN, MAX) \ +void __attribute__((noinline)) \ +vec_sat_s_sub_##T##_fmt_4 (T *out, T *op_1, T *op_2, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + T x = op_1[i]; \ + T y = op_2[i]; \ + T minus; \ + bool overflow = __builtin_sub_overflow (x, y, &minus); \ + out[i] = !overflow ? minus : x < 0 ? MIN : MAX; \ + } \ +} +#define DEF_VEC_SAT_S_SUB_FMT_4_WRAP(T, UT, MIN, MAX) \ + DEF_VEC_SAT_S_SUB_FMT_4(T, UT, MIN, MAX) + +#define RUN_VEC_SAT_U_SUB_FMT_1(T, out, op_1, op_2, N) \ + vec_sat_u_sub_##T##_fmt_1(out, op_1, op_2, N) + +#define RUN_VEC_SAT_U_SUB_FMT_2(T, out, op_1, op_2, N) \ + vec_sat_u_sub_##T##_fmt_2(out, op_1, op_2, N) + +#define RUN_VEC_SAT_U_SUB_FMT_3(T, out, op_1, op_2, N) \ + vec_sat_u_sub_##T##_fmt_3(out, op_1, op_2, N) + +#define RUN_VEC_SAT_U_SUB_FMT_4(T, out, op_1, op_2, N) \ + vec_sat_u_sub_##T##_fmt_4(out, op_1, op_2, N) + +#define RUN_VEC_SAT_U_SUB_FMT_5(T, out, op_1, op_2, N) \ + vec_sat_u_sub_##T##_fmt_5(out, op_1, op_2, N) + +#define RUN_VEC_SAT_U_SUB_FMT_6(T, out, op_1, op_2, N) \ + vec_sat_u_sub_##T##_fmt_6(out, op_1, op_2, N) + +#define RUN_VEC_SAT_U_SUB_FMT_7(T, out, op_1, op_2, N) \ + vec_sat_u_sub_##T##_fmt_7(out, op_1, op_2, N) + +#define RUN_VEC_SAT_U_SUB_FMT_8(T, out, op_1, op_2, N) \ + vec_sat_u_sub_##T##_fmt_8(out, op_1, op_2, N) + +#define RUN_VEC_SAT_U_SUB_FMT_9(T, out, op_1, op_2, N) \ + vec_sat_u_sub_##T##_fmt_9(out, op_1, op_2, N) + +#define RUN_VEC_SAT_U_SUB_FMT_10(T, out, op_1, op_2, N) \ + vec_sat_u_sub_##T##_fmt_10(out, op_1, op_2, N) + +#define RUN_VEC_SAT_U_SUB_FMT_ZIP(T1, T2, x, b, N) \ + vec_sat_u_sub_##T1##_##T2##_fmt_zip(x, b, N) +#define RUN_VEC_SAT_U_SUB_FMT_ZIP_WRAP(T1, T2, x, b, N) \ + RUN_VEC_SAT_U_SUB_FMT_ZIP(T1, T2, x, b, N) \ + +#define RUN_VEC_SAT_S_SUB_FMT_1(T, out, op_1, op_2, N) \ + vec_sat_s_sub_##T##_fmt_1(out, op_1, op_2, N) +#define RUN_VEC_SAT_S_SUB_FMT_1_WRAP(T, out, op_1, op_2, N) \ + RUN_VEC_SAT_S_SUB_FMT_1(T, out, op_1, op_2, N) + +#define RUN_VEC_SAT_S_SUB_FMT_2(T, out, op_1, op_2, N) \ + vec_sat_s_sub_##T##_fmt_2(out, op_1, op_2, N) +#define RUN_VEC_SAT_S_SUB_FMT_2_WRAP(T, out, op_1, op_2, N) \ + RUN_VEC_SAT_S_SUB_FMT_2(T, out, op_1, op_2, N) + +#define RUN_VEC_SAT_S_SUB_FMT_3(T, out, op_1, op_2, N) \ + vec_sat_s_sub_##T##_fmt_3(out, op_1, op_2, N) +#define RUN_VEC_SAT_S_SUB_FMT_3_WRAP(T, out, op_1, op_2, N) \ + RUN_VEC_SAT_S_SUB_FMT_3(T, out, op_1, op_2, N) + +#define RUN_VEC_SAT_S_SUB_FMT_4(T, out, op_1, op_2, N) \ + vec_sat_s_sub_##T##_fmt_4(out, op_1, op_2, N) +#define RUN_VEC_SAT_S_SUB_FMT_4_WRAP(T, out, op_1, op_2, N) \ + RUN_VEC_SAT_S_SUB_FMT_4(T, out, op_1, op_2, N) + +/******************************************************************************/ +/* Saturation Sub Truncated (Unsigned and Signed) */ +/******************************************************************************/ +#define DEF_VEC_SAT_U_SUB_TRUNC_FMT_1(OUT_T, IN_T) \ +void __attribute__((noinline)) \ +vec_sat_u_sub_trunc_##OUT_T##_fmt_1 (OUT_T *out, IN_T *op_1, IN_T y, \ + unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + IN_T x = op_1[i]; \ + out[i] = (OUT_T)(x >= y ? x - y : 0); \ + } \ +} + +#define RUN_VEC_SAT_U_SUB_TRUNC_FMT_1(OUT_T, IN_T, out, op_1, y, N) \ + vec_sat_u_sub_trunc_##OUT_T##_fmt_1(out, op_1, y, N) + +/******************************************************************************/ +/* Saturation Truncation (Unsigned and Signed) */ +/******************************************************************************/ +#define DEF_VEC_SAT_U_TRUNC_FMT_1(NT, WT) \ +void __attribute__((noinline)) \ +vec_sat_u_trunc_##NT##_##WT##_fmt_1 (NT *out, WT *in, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + WT x = in[i]; \ + bool overflow = x > (WT)(NT)(-1); \ + out[i] = ((NT)x) | (NT)-overflow; \ + } \ +} +#define DEF_VEC_SAT_U_TRUNC_FMT_1_WRAP(NT, WT) DEF_VEC_SAT_U_TRUNC_FMT_1(NT, WT) + +#define DEF_VEC_SAT_U_TRUNC_FMT_2(NT, WT) \ +void __attribute__((noinline)) \ +vec_sat_u_trunc_##NT##_##WT##_fmt_2 (NT *out, WT *in, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + WT max = (WT)(NT)-1; \ + out[i] = in[i] > max ? (NT)max : (NT)in[i]; \ + } \ +} +#define DEF_VEC_SAT_U_TRUNC_FMT_2_WRAP(NT, WT) DEF_VEC_SAT_U_TRUNC_FMT_2(NT, WT) + +#define DEF_VEC_SAT_U_TRUNC_FMT_3(NT, WT) \ +void __attribute__((noinline)) \ +vec_sat_u_trunc_##NT##_##WT##_fmt_3 (NT *out, WT *in, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + WT max = (WT)(NT)-1; \ + out[i] = in[i] <= max ? (NT)in[i] : (NT)max; \ + } \ +} +#define DEF_VEC_SAT_U_TRUNC_FMT_3_WRAP(NT, WT) DEF_VEC_SAT_U_TRUNC_FMT_3(NT, WT) + +#define DEF_VEC_SAT_U_TRUNC_FMT_4(NT, WT) \ +void __attribute__((noinline)) \ +vec_sat_u_trunc_##NT##_##WT##_fmt_4 (NT *out, WT *in, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + bool not_overflow = in[i] <= (WT)(NT)(-1); \ + out[i] = ((NT)in[i]) | (NT)((NT)not_overflow - 1); \ + } \ +} +#define DEF_VEC_SAT_U_TRUNC_FMT_4_WRAP(NT, WT) DEF_VEC_SAT_U_TRUNC_FMT_4(NT, WT) + +#define DEF_VEC_SAT_S_TRUNC_FMT_1(NT, WT, NT_MIN, NT_MAX) \ +void __attribute__((noinline)) \ +vec_sat_s_trunc_##NT##_##WT##_fmt_1 (NT *out, WT *in, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + WT x = in[i]; \ + NT trunc = (NT)x; \ + out[i] = (WT)NT_MIN <= x && x <= (WT)NT_MAX \ + ? trunc \ + : x < 0 ? NT_MIN : NT_MAX; \ + } \ +} +#define DEF_VEC_SAT_S_TRUNC_FMT_1_WRAP(NT, WT, NT_MIN, NT_MAX) \ + DEF_VEC_SAT_S_TRUNC_FMT_1(NT, WT, NT_MIN, NT_MAX) + +#define DEF_VEC_SAT_S_TRUNC_FMT_2(NT, WT, NT_MIN, NT_MAX) \ +void __attribute__((noinline)) \ +vec_sat_s_trunc_##NT##_##WT##_fmt_2 (NT *out, WT *in, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + WT x = in[i]; \ + NT trunc = (NT)x; \ + out[i] = (WT)NT_MIN < x && x < (WT)NT_MAX \ + ? trunc \ + : x < 0 ? NT_MIN : NT_MAX; \ + } \ +} +#define DEF_VEC_SAT_S_TRUNC_FMT_2_WRAP(NT, WT, NT_MIN, NT_MAX) \ + DEF_VEC_SAT_S_TRUNC_FMT_2(NT, WT, NT_MIN, NT_MAX) + +#define DEF_VEC_SAT_S_TRUNC_FMT_3(NT, WT, NT_MIN, NT_MAX) \ +void __attribute__((noinline)) \ +vec_sat_s_trunc_##NT##_##WT##_fmt_3 (NT *out, WT *in, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + WT x = in[i]; \ + NT trunc = (NT)x; \ + out[i] = (WT)NT_MIN < x && x <= (WT)NT_MAX \ + ? trunc \ + : x < 0 ? NT_MIN : NT_MAX; \ + } \ +} +#define DEF_VEC_SAT_S_TRUNC_FMT_3_WRAP(NT, WT, NT_MIN, NT_MAX) \ + DEF_VEC_SAT_S_TRUNC_FMT_3(NT, WT, NT_MIN, NT_MAX) + +#define DEF_VEC_SAT_S_TRUNC_FMT_4(NT, WT, NT_MIN, NT_MAX) \ +void __attribute__((noinline)) \ +vec_sat_s_trunc_##NT##_##WT##_fmt_4 (NT *out, WT *in, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + WT x = in[i]; \ + NT trunc = (NT)x; \ + out[i] = (WT)NT_MIN <= x && x < (WT)NT_MAX \ + ? trunc \ + : x < 0 ? NT_MIN : NT_MAX; \ + } \ +} +#define DEF_VEC_SAT_S_TRUNC_FMT_4_WRAP(NT, WT, NT_MIN, NT_MAX) \ + DEF_VEC_SAT_S_TRUNC_FMT_4(NT, WT, NT_MIN, NT_MAX) + +#define DEF_VEC_SAT_S_TRUNC_FMT_5(NT, WT, NT_MIN, NT_MAX) \ +void __attribute__((noinline)) \ +vec_sat_s_trunc_##NT##_##WT##_fmt_5 (NT *out, WT *in, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + WT x = in[i]; \ + NT trunc = (NT)x; \ + out[i] = (WT)NT_MIN > x || x > (WT)NT_MAX \ + ? x < 0 ? NT_MIN : NT_MAX \ + : trunc; \ + } \ +} +#define DEF_VEC_SAT_S_TRUNC_FMT_5_WRAP(NT, WT, NT_MIN, NT_MAX) \ + DEF_VEC_SAT_S_TRUNC_FMT_5(NT, WT, NT_MIN, NT_MAX) + +#define DEF_VEC_SAT_S_TRUNC_FMT_6(NT, WT, NT_MIN, NT_MAX) \ +void __attribute__((noinline)) \ +vec_sat_s_trunc_##NT##_##WT##_fmt_6 (NT *out, WT *in, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + WT x = in[i]; \ + NT trunc = (NT)x; \ + out[i] = (WT)NT_MIN >= x || x > (WT)NT_MAX \ + ? x < 0 ? NT_MIN : NT_MAX \ + : trunc; \ + } \ +} +#define DEF_VEC_SAT_S_TRUNC_FMT_6_WRAP(NT, WT, NT_MIN, NT_MAX) \ + DEF_VEC_SAT_S_TRUNC_FMT_6(NT, WT, NT_MIN, NT_MAX) + +#define DEF_VEC_SAT_S_TRUNC_FMT_7(NT, WT, NT_MIN, NT_MAX) \ +void __attribute__((noinline)) \ +vec_sat_s_trunc_##NT##_##WT##_fmt_7 (NT *out, WT *in, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + WT x = in[i]; \ + NT trunc = (NT)x; \ + out[i] = (WT)NT_MIN > x || x >= (WT)NT_MAX \ + ? x < 0 ? NT_MIN : NT_MAX \ + : trunc; \ + } \ +} +#define DEF_VEC_SAT_S_TRUNC_FMT_7_WRAP(NT, WT, NT_MIN, NT_MAX) \ + DEF_VEC_SAT_S_TRUNC_FMT_7(NT, WT, NT_MIN, NT_MAX) + +#define DEF_VEC_SAT_S_TRUNC_FMT_8(NT, WT, NT_MIN, NT_MAX) \ +void __attribute__((noinline)) \ +vec_sat_s_trunc_##NT##_##WT##_fmt_8 (NT *out, WT *in, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + WT x = in[i]; \ + NT trunc = (NT)x; \ + out[i] = (WT)NT_MIN >= x || x >= (WT)NT_MAX \ + ? x < 0 ? NT_MIN : NT_MAX \ + : trunc; \ + } \ +} +#define DEF_VEC_SAT_S_TRUNC_FMT_8_WRAP(NT, WT, NT_MIN, NT_MAX) \ + DEF_VEC_SAT_S_TRUNC_FMT_8(NT, WT, NT_MIN, NT_MAX) + +#define RUN_VEC_SAT_U_TRUNC_FMT_1(NT, WT, out, in, N) \ + vec_sat_u_trunc_##NT##_##WT##_fmt_1 (out, in, N) +#define RUN_VEC_SAT_U_TRUNC_FMT_1_WRAP(NT, WT, out, in, N) \ + RUN_VEC_SAT_U_TRUNC_FMT_1(NT, WT, out, in, N) + +#define RUN_VEC_SAT_U_TRUNC_FMT_2(NT, WT, out, in, N) \ + vec_sat_u_trunc_##NT##_##WT##_fmt_2 (out, in, N) +#define RUN_VEC_SAT_U_TRUNC_FMT_2_WRAP(NT, WT, out, in, N) \ + RUN_VEC_SAT_U_TRUNC_FMT_2(NT, WT, out, in, N) + +#define RUN_VEC_SAT_U_TRUNC_FMT_3(NT, WT, out, in, N) \ + vec_sat_u_trunc_##NT##_##WT##_fmt_3 (out, in, N) +#define RUN_VEC_SAT_U_TRUNC_FMT_3_WRAP(NT, WT, out, in, N) \ + RUN_VEC_SAT_U_TRUNC_FMT_3(NT, WT, out, in, N) + +#define RUN_VEC_SAT_U_TRUNC_FMT_4(NT, WT, out, in, N) \ + vec_sat_u_trunc_##NT##_##WT##_fmt_4 (out, in, N) +#define RUN_VEC_SAT_U_TRUNC_FMT_4_WRAP(NT, WT, out, in, N) \ + RUN_VEC_SAT_U_TRUNC_FMT_4(NT, WT, out, in, N) + +#define RUN_VEC_SAT_S_TRUNC_FMT_1(NT, WT, out, in, N) \ + vec_sat_s_trunc_##NT##_##WT##_fmt_1 (out, in, N) +#define RUN_VEC_SAT_S_TRUNC_FMT_1_WRAP(NT, WT, out, in, N) \ + RUN_VEC_SAT_S_TRUNC_FMT_1(NT, WT, out, in, N) + +#define RUN_VEC_SAT_S_TRUNC_FMT_2(NT, WT, out, in, N) \ + vec_sat_s_trunc_##NT##_##WT##_fmt_2 (out, in, N) +#define RUN_VEC_SAT_S_TRUNC_FMT_2_WRAP(NT, WT, out, in, N) \ + RUN_VEC_SAT_S_TRUNC_FMT_2(NT, WT, out, in, N) + +#define RUN_VEC_SAT_S_TRUNC_FMT_3(NT, WT, out, in, N) \ + vec_sat_s_trunc_##NT##_##WT##_fmt_3 (out, in, N) +#define RUN_VEC_SAT_S_TRUNC_FMT_3_WRAP(NT, WT, out, in, N) \ + RUN_VEC_SAT_S_TRUNC_FMT_3(NT, WT, out, in, N) + +#define RUN_VEC_SAT_S_TRUNC_FMT_4(NT, WT, out, in, N) \ + vec_sat_s_trunc_##NT##_##WT##_fmt_4 (out, in, N) +#define RUN_VEC_SAT_S_TRUNC_FMT_4_WRAP(NT, WT, out, in, N) \ + RUN_VEC_SAT_S_TRUNC_FMT_4(NT, WT, out, in, N) + +#define RUN_VEC_SAT_S_TRUNC_FMT_5(NT, WT, out, in, N) \ + vec_sat_s_trunc_##NT##_##WT##_fmt_5 (out, in, N) +#define RUN_VEC_SAT_S_TRUNC_FMT_5_WRAP(NT, WT, out, in, N) \ + RUN_VEC_SAT_S_TRUNC_FMT_5(NT, WT, out, in, N) + +#define RUN_VEC_SAT_S_TRUNC_FMT_6(NT, WT, out, in, N) \ + vec_sat_s_trunc_##NT##_##WT##_fmt_6 (out, in, N) +#define RUN_VEC_SAT_S_TRUNC_FMT_6_WRAP(NT, WT, out, in, N) \ + RUN_VEC_SAT_S_TRUNC_FMT_6(NT, WT, out, in, N) + +#define RUN_VEC_SAT_S_TRUNC_FMT_7(NT, WT, out, in, N) \ + vec_sat_s_trunc_##NT##_##WT##_fmt_7 (out, in, N) +#define RUN_VEC_SAT_S_TRUNC_FMT_7_WRAP(NT, WT, out, in, N) \ + RUN_VEC_SAT_S_TRUNC_FMT_7(NT, WT, out, in, N) + +#define RUN_VEC_SAT_S_TRUNC_FMT_8(NT, WT, out, in, N) \ + vec_sat_s_trunc_##NT##_##WT##_fmt_8 (out, in, N) +#define RUN_VEC_SAT_S_TRUNC_FMT_8_WRAP(NT, WT, out, in, N) \ + RUN_VEC_SAT_S_TRUNC_FMT_8(NT, WT, out, in, N) + +#endif diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_binary_vvv_run.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_binary_vvv_run.h new file mode 100644 index 000000000000..a61482af47b7 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_binary_vvv_run.h @@ -0,0 +1,33 @@ +#ifndef HAVE_DEFINED_VEC_SAT_BINARY_VVV_RUN_H +#define HAVE_DEFINED_VEC_SAT_BINARY_VVV_RUN_H + +/* To leverage this header files for run test, you need to: + 1. define T as the type, for example uint8_t, + 2. defint N as the test array size, for example 16. + 3. define RUN_VEC_SAT_BINARY as run function. + 4. prepare the test_data for test cases. + */ + +int +main () +{ + unsigned i, k; + T out[N]; + + for (i = 0; i < sizeof (test_data) / sizeof (test_data[0]); i++) + { + T *op_1 = test_data[i][0]; + T *op_2 = test_data[i][1]; + T *expect = test_data[i][2]; + + RUN_VEC_SAT_BINARY (T, out, op_1, op_2, N); + + for (k = 0; k < N; k++) + if (out[k] != expect[k]) + __builtin_abort (); + } + + return 0; +} + +#endif diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_binary_vvx_run.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_binary_vvx_run.h new file mode 100644 index 000000000000..90a003367347 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_binary_vvx_run.h @@ -0,0 +1,27 @@ +#ifndef HAVE_DEFINED_VEC_SAT_BINARY_VVX_RUN_H +#define HAVE_DEFINED_VEC_SAT_BINARY_VVX_RUN_H + +int +main () +{ + unsigned i, k; + OUT_T out[N]; + + for (i = 0; i < sizeof (expect_data) / sizeof (expect_data[0]); i++) + { + IN_T *op_1 = op_1_data[i]; + IN_T op_2 = op_2_data[i]; + OUT_T *expect = expect_data[i]; + + RUN_VEC_SAT_BINARY (OUT_T, IN_T, out, op_1, op_2, N); + + for (k = 0; k < N; k++) + if (out[k] != expect[k]) + __builtin_abort (); + } + + return 0; +} + +#endif + diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_binary_vx_run.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_binary_vx_run.h new file mode 100644 index 000000000000..10c08e0bd8c2 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_binary_vx_run.h @@ -0,0 +1,23 @@ +#ifndef HAVE_DEFINED_VEC_SAT_BINARY_VX_RUN_H +#define HAVE_DEFINED_VEC_SAT_BINARY_VX_RUN_H + +int +main () +{ + unsigned i, k; + T d; + + for (i = 0; i < sizeof (DATA) / sizeof (DATA[0]); i++) + { + d = DATA[i]; + RUN_BINARY_VX (&d.x[N], d.b, N); + + for (k = 0; k < N; k++) + if (d.x[k] != d.expect[k]) + __builtin_abort (); + } + + return 0; +} + +#endif diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_data.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_data.h new file mode 100644 index 000000000000..bcb4a3f3f1d6 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_data.h @@ -0,0 +1,1105 @@ +#ifndef HAVE_DEFINE_VEC_SAT_DATA_H +#define HAVE_DEFINE_VEC_SAT_DATA_H + +#define N 16 +#define TEST_UNARY_DATA(T, NAME) test_##T##_##NAME##_data +#define TEST_UNARY_DATA_WRAP(T, NAME) TEST_UNARY_DATA(T, NAME) + +uint8_t TEST_UNARY_DATA(uint8_t, sat_u_add_imm)[][2][N] = +{ + { /* For add imm 0 */ + { + 0, 1, 5, 255, + 0, 1, 5, 255, + 0, 1, 5, 255, + 0, 1, 5, 255, + }, + { + 0, 1, 5, 255, + 0, 1, 5, 255, + 0, 1, 5, 255, + 0, 1, 5, 255, + }, + }, + { /* For add imm 1 */ + { + 0, 1, 0, 8, + 0, 1, 0, 8, + 0, 1, 0, 8, + 0, 1, 0, 8, + }, + { + 1, 2, 1, 9, + 1, 2, 1, 9, + 1, 2, 1, 9, + 1, 2, 1, 9, + }, + }, + { /* For add imm 254 */ + { + 0, 1, 0, 8, + 0, 1, 0, 8, + 0, 1, 0, 8, + 0, 1, 0, 8, + }, + { + 254, 255, 254, 255, + 254, 255, 254, 255, + 254, 255, 254, 255, + 254, 255, 254, 255, + }, + }, + { /* For add imm 255 */ + { + 0, 1, 0, 8, + 0, 1, 0, 8, + 0, 1, 0, 8, + 0, 1, 0, 8, + }, + { + 255, 255, 255, 255, + 255, 255, 255, 255, + 255, 255, 255, 255, + 255, 255, 255, 255, + }, + }, +}; + +uint16_t TEST_UNARY_DATA(uint16_t, sat_u_add_imm)[][2][N] = +{ + { /* For add imm 0 */ + { + 0, 1, 5, 65535, + 0, 1, 5, 65535, + 0, 1, 5, 65535, + 0, 1, 5, 65535, + }, + { + 0, 1, 5, 65535, + 0, 1, 5, 65535, + 0, 1, 5, 65535, + 0, 1, 5, 65535, + }, + }, + { /* For add imm 1 */ + { + 0, 1, 0, 8, + 0, 1, 0, 8, + 0, 1, 0, 8, + 0, 1, 0, 8, + }, + { + 1, 2, 1, 9, + 1, 2, 1, 9, + 1, 2, 1, 9, + 1, 2, 1, 9, + }, + }, + { /* For add imm 65534 */ + { + 0, 1, 0, 8, + 0, 1, 0, 8, + 0, 1, 0, 8, + 0, 1, 0, 8, + }, + { + 65534, 65535, 65534, 65535, + 65534, 65535, 65534, 65535, + 65534, 65535, 65534, 65535, + 65534, 65535, 65534, 65535, + }, + }, + { /* For add imm 65535 */ + { + 0, 1, 0, 8, + 0, 1, 0, 8, + 0, 1, 0, 8, + 0, 1, 0, 8, + }, + { + 65535, 65535, 65535, 65535, + 65535, 65535, 65535, 65535, + 65535, 65535, 65535, 65535, + 65535, 65535, 65535, 65535, + }, + }, +}; + +uint32_t TEST_UNARY_DATA(uint32_t, sat_u_add_imm)[][2][N] = +{ + { /* For add imm 0 */ + { + 0, 1, 5, 4294967295, + 0, 1, 5, 4294967295, + 0, 1, 5, 4294967295, + 0, 1, 5, 4294967295, + }, + { + 0, 1, 5, 4294967295, + 0, 1, 5, 4294967295, + 0, 1, 5, 4294967295, + 0, 1, 5, 4294967295, + }, + }, + { /* For add imm 1 */ + { + 0, 1, 0, 8, + 0, 1, 0, 8, + 0, 1, 0, 8, + 0, 1, 0, 8, + }, + { + 1, 2, 1, 9, + 1, 2, 1, 9, + 1, 2, 1, 9, + 1, 2, 1, 9, + }, + }, + { /* For add imm 4294967294 */ + { + 0, 1, 0, 8, + 0, 1, 0, 8, + 0, 1, 0, 8, + 0, 1, 0, 8, + }, + { + 4294967294, 4294967295, 4294967294, 4294967295, + 4294967294, 4294967295, 4294967294, 4294967295, + 4294967294, 4294967295, 4294967294, 4294967295, + 4294967294, 4294967295, 4294967294, 4294967295, + }, + }, + { /* For add imm 4294967295 */ + { + 0, 1, 0, 8, + 0, 1, 0, 8, + 0, 1, 0, 8, + 0, 1, 0, 8, + }, + { + 4294967295, 4294967295, 4294967295, 4294967295, + 4294967295, 4294967295, 4294967295, 4294967295, + 4294967295, 4294967295, 4294967295, 4294967295, + 4294967295, 4294967295, 4294967295, 4294967295, + }, + }, +}; + +uint64_t TEST_UNARY_DATA(uint64_t, sat_u_add_imm)[][2][N] = +{ + { /* For add imm 0 */ + { + 0, 1, 5, 18446744073709551615u, + 0, 1, 5, 18446744073709551615u, + 0, 1, 5, 18446744073709551615u, + 0, 1, 5, 18446744073709551615u, + }, + { + 0, 1, 5, 18446744073709551615u, + 0, 1, 5, 18446744073709551615u, + 0, 1, 5, 18446744073709551615u, + 0, 1, 5, 18446744073709551615u, + }, + }, + { /* For add imm 1 */ + { + 0, 1, 0, 8, + 0, 1, 0, 8, + 0, 1, 0, 8, + 0, 1, 0, 8, + }, + { + 1, 2, 1, 9, + 1, 2, 1, 9, + 1, 2, 1, 9, + 1, 2, 1, 9, + }, + }, + { /* For add imm 18446744073709551614 */ + { + 0, 1, 0, 8, + 0, 1, 0, 8, + 0, 1, 0, 8, + 0, 1, 0, 8, + }, + { + 18446744073709551614u, 18446744073709551615u, + 18446744073709551614u, 18446744073709551615u, + 18446744073709551614u, 18446744073709551615u, + 18446744073709551614u, 18446744073709551615u, + 18446744073709551614u, 18446744073709551615u, + 18446744073709551614u, 18446744073709551615u, + 18446744073709551614u, 18446744073709551615u, + 18446744073709551614u, 18446744073709551615u, + }, + }, + { /* For add imm 18446744073709551615 */ + { + 0, 1, 0, 8, + 0, 1, 0, 8, + 0, 1, 0, 8, + 0, 1, 0, 8, + }, + { + 18446744073709551615u, 18446744073709551615u, + 18446744073709551615u, 18446744073709551615u, + 18446744073709551615u, 18446744073709551615u, + 18446744073709551615u, 18446744073709551615u, + 18446744073709551615u, 18446744073709551615u, + 18446744073709551615u, 18446744073709551615u, + 18446744073709551615u, 18446744073709551615u, + 18446744073709551615u, 18446744073709551615u, + }, + }, +}; + +uint8_t TEST_UNARY_DATA(uint8_t, sat_u_sub_imm)[][2][N] = +{ + { /* For sub imm 0 */ + { + 0, 1, 5, 255, + 0, 1, 5, 255, + 0, 1, 5, 255, + 0, 1, 5, 255, + }, + { + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + }, + }, + { /* For sub imm 1 */ + { + 0, 1, 2, 8, + 0, 1, 2, 8, + 0, 1, 2, 8, + 0, 1, 2, 8, + }, + { + 1, 0, 0, 0, + 1, 0, 0, 0, + 1, 0, 0, 0, + 1, 0, 0, 0, + }, + }, + { /* For sub imm 254 */ + { + 0, 1, 254, 255, + 0, 1, 254, 255, + 0, 1, 254, 255, + 0, 1, 254, 255, + }, + { + 254, 253, 0, 0, + 254, 253, 0, 0, + 254, 253, 0, 0, + 254, 253, 0, 0, + }, + }, + { /* For sub imm 255 */ + { + 0, 1, 5, 255, + 0, 1, 5, 255, + 0, 1, 5, 255, + 0, 1, 5, 255, + }, + { + 255, 254, 250, 0, + 255, 254, 250, 0, + 255, 254, 250, 0, + 255, 254, 250, 0, + }, + }, +}; + +uint16_t TEST_UNARY_DATA(uint16_t, sat_u_sub_imm)[][2][N] = +{ + { /* For sub imm 0 */ + { + 0, 1, 5, 65535, + 0, 1, 5, 65535, + 0, 1, 5, 65535, + 0, 1, 5, 65535, + }, + { + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + }, + }, + { /* For sub imm 1 */ + { + 0, 1, 5, 8, + 0, 1, 5, 8, + 0, 1, 5, 8, + 0, 1, 5, 8, + }, + { + 1, 0, 0, 0, + 1, 0, 0, 0, + 1, 0, 0, 0, + 1, 0, 0, 0, + }, + }, + { /* For sub imm 65534 */ + { + 0, 1, 65534, 65535, + 0, 1, 65534, 65535, + 0, 1, 65534, 65535, + 0, 1, 65534, 65535, + }, + { + 65534, 65533, 0, 0, + 65534, 65533, 0, 0, + 65534, 65533, 0, 0, + 65534, 65533, 0, 0, + }, + }, + { /* For sub imm 65535 */ + { + 0, 1, 65534, 65535, + 0, 1, 65534, 65535, + 0, 1, 65534, 65535, + 0, 1, 65534, 65535, + }, + { + 65535, 65534, 1, 0, + 65535, 65534, 1, 0, + 65535, 65534, 1, 0, + 65535, 65534, 1, 0, + }, + }, +}; + +uint32_t TEST_UNARY_DATA(uint32_t, sat_u_sub_imm)[][2][N] = +{ + { /* For sub imm 0 */ + { + 0, 1, 5, 4294967295, + 0, 1, 5, 4294967295, + 0, 1, 5, 4294967295, + 0, 1, 5, 4294967295, + }, + { + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + }, + }, + { /* For sub imm 1 */ + { + 0, 1, 5, 8, + 0, 1, 5, 8, + 0, 1, 5, 8, + 0, 1, 5, 8, + }, + { + 1, 0, 0, 0, + 1, 0, 0, 0, + 1, 0, 0, 0, + 1, 0, 0, 0, + }, + }, + { /* For sub imm 4294967294 */ + { + 0, 1, 4294967294, 4294967295, + 0, 1, 4294967294, 4294967295, + 0, 1, 4294967294, 4294967295, + 0, 1, 4294967294, 4294967295, + }, + { + 4294967294, 4294967293, 0, 0, + 4294967294, 4294967293, 0, 0, + 4294967294, 4294967293, 0, 0, + 4294967294, 4294967293, 0, 0, + }, + }, + { /* For sub imm 4294967295 */ + { + 0, 1, 4294967294, 4294967295, + 0, 1, 4294967294, 4294967295, + 0, 1, 4294967294, 4294967295, + 0, 1, 4294967294, 4294967295, + }, + { + 4294967295, 4294967294, 1, 0, + 4294967295, 4294967294, 1, 0, + 4294967295, 4294967294, 1, 0, + 4294967295, 4294967294, 1, 0, + }, + }, +}; + +uint64_t TEST_UNARY_DATA(uint64_t, sat_u_sub_imm)[][2][N] = +{ + { /* For sub imm 0 */ + { + 0, 1, 5, 18446744073709551615u, + 0, 1, 5, 18446744073709551615u, + 0, 1, 5, 18446744073709551615u, + 0, 1, 5, 18446744073709551615u, + }, + { + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + }, + }, + { /* For sub imm 1 */ + { + 0, 1, 5, 8, + 0, 1, 5, 8, + 0, 1, 5, 8, + 0, 1, 5, 8, + }, + { + 1, 0, 0, 0, + 1, 0, 0, 0, + 1, 0, 0, 0, + 1, 0, 0, 0, + }, + }, + { /* For sub imm 18446744073709551614 */ + { + 0, 1, 18446744073709551614u, 18446744073709551615u, + 0, 1, 18446744073709551614u, 18446744073709551615u, + 0, 1, 18446744073709551614u, 18446744073709551615u, + 0, 1, 18446744073709551614u, 18446744073709551615u, + }, + { + 18446744073709551614u, 18446744073709551613u, 0, 0, + 18446744073709551614u, 18446744073709551613u, 0, 0, + 18446744073709551614u, 18446744073709551613u, 0, 0, + 18446744073709551614u, 18446744073709551613u, 0, 0, + }, + }, + { /* For sub imm 18446744073709551615 */ + { + 0, 1, 18446744073709551614u, 18446744073709551615u, + 0, 1, 18446744073709551614u, 18446744073709551615u, + 0, 1, 18446744073709551614u, 18446744073709551615u, + 0, 1, 18446744073709551614u, 18446744073709551615u, + }, + { + 18446744073709551615u, 18446744073709551614u, 1, 0, + 18446744073709551615u, 18446744073709551614u, 1, 0, + 18446744073709551615u, 18446744073709551614u, 1, 0, + 18446744073709551615u, 18446744073709551614u, 1, 0, + }, + }, +}; + +#define TEST_BINARY_DATA_NAME(T1, T2, NAME) test_bin_##T1##_##T2##_##NAME##_data +#define TEST_BINARY_DATA_NAME_WRAP(T1, T2, NAME) \ + TEST_BINARY_DATA_NAME(T1, T2, NAME) + +#define TEST_ZIP_STRUCT_NAME(T1, T2) test_##T1##_##T2##_zip_s +#define TEST_ZIP_STRUCT_DECL(T1, T2) struct TEST_ZIP_STRUCT_NAME(T1, T2) +#define TEST_ZIP_STRUCT(T1, T2) \ + TEST_ZIP_STRUCT_DECL(T1, T2) \ + { \ + T1 x[N]; \ + T2 b; \ + T1 expect[N]; \ + }; + +TEST_ZIP_STRUCT (uint16_t, uint32_t) + +TEST_ZIP_STRUCT_DECL(uint16_t, uint32_t) \ + TEST_BINARY_DATA_NAME(uint16_t, uint32_t, zip)[] = +{ + { + { /* x. */ + 1, 1, 1, 1, + 1, 1, 1, 1, + 1, 1, 1, 1, + 0, 0, 0, 0, + }, + 1, /* b. */ + { /* expect. */ + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + }, + }, + { + { /* x. */ + 65535, 1, 2, 8, + 65535, 1, 2, 8, + 65535, 1, 2, 8, + 65535, 1, 2, 8, + }, + 65536, /* b. */ + { /* expect. */ + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + }, + }, + { + { /* x. */ + 65535, 16, 8, 1, + 65535, 16, 8, 1, + 65535, 16, 8, 1, + 65535, 16, 8, 1, + }, + 65535, /* b. */ + { /* expect. */ + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + }, + }, + { + { /* x. */ + 65535, 16, 8, 1, + 65535, 16, 8, 1, + 65535, 16, 8, 1, + 65535, 16, 8, 1, + }, + 65500, /* b. */ + { /* expect. */ + 35, 0, 0, 0, + 35, 0, 0, 0, + 35, 0, 0, 0, + 35, 0, 0, 0, + }, + }, +}; + +int8_t TEST_BINARY_DATA_NAME(int8_t, int8_t, ssadd)[][3][N] = +{ + { + { + 0, 0, 0, 0, + 2, 2, 2, 2, + 126, 126, 126, 126, + 127, 127, 127, 127, + }, + { + 0, 0, 0, 0, + 2, 2, 2, 2, + 1, 1, 1, 1, + 1, 1, 1, 1, + }, + { + 0, 0, 0, 0, + 4, 4, 4, 4, + 127, 127, 127, 127, + 127, 127, 127, 127, + }, + }, + + { + { + -7, -7, -7, -7, + -128, -128, -128, -128, + -127, -127, -127, -127, + -128, -128, -128, -128, + }, + { + -4, -4, -4, -4, + -1, -1, -1, -1, + -1, -1, -1, -1, + -128, -128, -128, -128, + }, + { + -11, -11, -11, -11, + -128, -128, -128, -128, + -128, -128, -128, -128, + -128, -128, -128, -128, + }, + }, + + { + { + -128, -128, -128, -128, + -127, -127, -127, -127, + -122, -122, -122, -122, + -122, -122, -122, -122, + }, + { + 127, 127, 127, 127, + 127, 127, 127, 127, + 105, 105, 105, 105, + 125, 125, 125, 125, + }, + { + -1, -1, -1, -1, + 0, 0, 0, 0, + -17, -17, -17, -17, + 3, 3, 3, 3, + }, + }, +}; + +int16_t TEST_BINARY_DATA_NAME(int16_t, int16_t, ssadd)[][3][N] = +{ + { + { + 0, 0, 0, 0, + 2, 2, 2, 2, + 32766, 32766, 32766, 32766, + 32767, 32767, 32767, 32767, + }, + { + 0, 0, 0, 0, + 2, 2, 2, 2, + 1, 1, 1, 1, + 1, 1, 1, 1, + }, + { + 0, 0, 0, 0, + 4, 4, 4, 4, + 32767, 32767, 32767, 32767, + 32767, 32767, 32767, 32767, + }, + }, + + { + { + -7, -7, -7, -7, + -32768, -32768, -32768, -32768, + -32767, -32767, -32767, -32767, + -32768, -32768, -32768, -32768, + }, + { + -4, -4, -4, -4, + -1, -1, -1, -1, + -1, -1, -1, -1, + -32768, -32768, -32768, -32768, + }, + { + -11, -11, -11, -11, + -32768, -32768, -32768, -32768, + -32768, -32768, -32768, -32768, + -32768, -32768, -32768, -32768, + }, + }, + + { + { + -32768, -32768, -32768, -32768, + -32767, -32767, -32767, -32767, + -32762, -32762, -32762, -32762, + -32762, -32762, -32762, -32762, + }, + { + 32767, 32767, 32767, 32767, + 32767, 32767, 32767, 32767, + 32745, 32745, 32745, 32745, + 32765, 32765, 32765, 32765, + }, + { + -1, -1, -1, -1, + 0, 0, 0, 0, + -17, -17, -17, -17, + 3, 3, 3, 3, + }, + }, +}; + +int32_t TEST_BINARY_DATA_NAME(int32_t, int32_t, ssadd)[][3][N] = +{ + { + { + 0, 0, 0, 0, + 2, 2, 2, 2, + 2147483646, 2147483646, 2147483646, 2147483646, + 2147483647, 2147483647, 2147483647, 2147483647, + }, + { + 0, 0, 0, 0, + 2, 2, 2, 2, + 1, 1, 1, 1, + 1, 1, 1, 1, + }, + { + 0, 0, 0, 0, + 4, 4, 4, 4, + 2147483647, 2147483647, 2147483647, 2147483647, + 2147483647, 2147483647, 2147483647, 2147483647, + }, + }, + + { + { + -7, -7, -7, -7, + -2147483648, -2147483648, -2147483648, -2147483648, + -2147483647, -2147483647, -2147483647, -2147483647, + -2147483648, -2147483648, -2147483648, -2147483648, + }, + { + -4, -4, -4, -4, + -1, -1, -1, -1, + -1, -1, -1, -1, + -2147483648, -2147483648, -2147483648, -2147483648, + }, + { + -11, -11, -11, -11, + -2147483648, -2147483648, -2147483648, -2147483648, + -2147483648, -2147483648, -2147483648, -2147483648, + -2147483648, -2147483648, -2147483648, -2147483648, + }, + }, + + { + { + -2147483648, -2147483648, -2147483648, -2147483648, + -2147483647, -2147483647, -2147483647, -2147483647, + -2147483642, -2147483642, -2147483642, -2147483642, + -2147483642, -2147483642, -2147483642, -2147483642, + }, + { + 2147483647, 2147483647, 2147483647, 2147483647, + 2147483647, 2147483647, 2147483647, 2147483647, + 2147483625, 2147483625, 2147483625, 2147483625, + 2147483645, 2147483645, 2147483645, 2147483645, + }, + { + -1, -1, -1, -1, + 0, 0, 0, 0, + -17, -17, -17, -17, + 3, 3, 3, 3, + }, + }, +}; + +int64_t TEST_BINARY_DATA_NAME(int64_t, int64_t, ssadd)[][3][N] = +{ + { + { + 0, 0, 0, 0, + 2, 2, 2, 2, + 9223372036854775806ll, 9223372036854775806ll, 9223372036854775806ll, 9223372036854775806ll, + 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, + }, + { + 0, 0, 0, 0, + 2, 2, 2, 2, + 1, 1, 1, 1, + 1, 1, 1, 1, + }, + { + 0, 0, 0, 0, + 4, 4, 4, 4, + 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, + 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, + }, + }, + + { + { + -7, -7, -7, -7, + -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, + -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll, + -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, + }, + { + -4, -4, -4, -4, + -1, -1, -1, -1, + -1, -1, -1, -1, + -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, + }, + { + -11, -11, -11, -11, + -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, + -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, + -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, + }, + }, + + { + { + -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, + -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll, + -9223372036854775802ll, -9223372036854775802ll, -9223372036854775802ll, -9223372036854775802ll, + -9223372036854775802ll, -9223372036854775802ll, -9223372036854775802ll, -9223372036854775802ll, + }, + { + 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, + 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, + 9223372036854775785ll, 9223372036854775785ll, 9223372036854775785ll, 9223372036854775785ll, + 9223372036854775805ll, 9223372036854775805ll, 9223372036854775805ll, 9223372036854775805ll, + }, + { + -1, -1, -1, -1, + 0, 0, 0, 0, + -17, -17, -17, -17, + 3, 3, 3, 3, + }, + }, +}; + +int8_t TEST_BINARY_DATA_NAME(int8_t, int8_t, sssub)[][3][N] = +{ + { + { + 0, 0, 0, 0, + 2, 2, 2, 2, + 126, 126, 126, 126, + 127, 127, 127, 127, + }, + { + 0, 0, 0, 0, + 4, 4, 4, 4, + -2, -2, -2, -2, + -127, -127, -127, -127, + }, + { + 0, 0, 0, 0, + -2, -2, -2, -2, + 127, 127, 127, 127, + 127, 127, 127, 127, + }, + }, + + { + { + -7, -7, -7, -7, + -128, -128, -128, -128, + -127, -127, -127, -127, + -128, -128, -128, -128, + }, + { + -4, -4, -4, -4, + 1, 1, 1, 1, + 1, 1, 1, 1, + 127, 127, 127, 127, + }, + { + -3, -3, -3, -3, + -128, -128, -128, -128, + -128, -128, -128, -128, + -128, -128, -128, -128, + }, + }, + + { + { + -128, -128, -128, -128, + 127, 127, 127, 127, + -125, -125, -125, -125, + 126, 126, 126, 126, + }, + { + 127, 127, 127, 127, + -127, -127, -127, -127, + -127, -127, -127, -127, + 127, 127, 127, 127, + }, + { + -128, -128, -128, -128, + 127, 127, 127, 127, + 2, 2, 2, 2, + -1, -1, -1, -1, + }, + }, +}; + +int16_t TEST_BINARY_DATA_NAME(int16_t, int16_t, sssub)[][3][N] = +{ + { + { + 0, 0, 0, 0, + 2, 2, 2, 2, + 32766, 32766, 32766, 32766, + 32767, 32767, 32767, 32767, + }, + { + 0, 0, 0, 0, + 4, 4, 4, 4, + -2, -2, -2, -2, + -32767, -32767, -32767, -32767, + }, + { + 0, 0, 0, 0, + -2, -2, -2, -2, + 32767, 32767, 32767, 32767, + 32767, 32767, 32767, 32767, + }, + }, + + { + { + -7, -7, -7, -7, + -32768, -32768, -32768, -32768, + -32767, -32767, -32767, -32767, + -32768, -32768, -32768, -32768, + }, + { + -4, -4, -4, -4, + 1, 1, 1, 1, + 1, 1, 1, 1, + 32767, 32767, 32767, 32767, + }, + { + -3, -3, -3, -3, + -32768, -32768, -32768, -32768, + -32768, -32768, -32768, -32768, + -32768, -32768, -32768, -32768, + }, + }, + + { + { + -32768, -32768, -32768, -32768, + 32767, 32767, 32767, 32767, + -32765, -32765, -32765, -32765, + 32766, 32766, 32766, 32766, + }, + { + 32767, 32767, 32767, 32767, + -32767, -32767, -32767, -32767, + -32767, -32767, -32767, -32767, + 32767, 32767, 32767, 32767, + }, + { + -32768, -32768, -32768, -32768, + 32767, 32767, 32767, 32767, + 2, 2, 2, 2, + -1, -1, -1, -1, + }, + }, +}; + +int32_t TEST_BINARY_DATA_NAME(int32_t, int32_t, sssub)[][3][N] = +{ + { + { + 0, 0, 0, 0, + 2, 2, 2, 2, + 2147483646, 2147483646, 2147483646, 2147483646, + 2147483647, 2147483647, 2147483647, 2147483647, + }, + { + 0, 0, 0, 0, + 4, 4, 4, 4, + -2, -2, -2, -2, + -2147483647, -2147483647, -2147483647, -2147483647, + }, + { + 0, 0, 0, 0, + -2, -2, -2, -2, + 2147483647, 2147483647, 2147483647, 2147483647, + 2147483647, 2147483647, 2147483647, 2147483647, + }, + }, + + { + { + -7, -7, -7, -7, + -2147483648, -2147483648, -2147483648, -2147483648, + -2147483647, -2147483647, -2147483647, -2147483647, + -2147483648, -2147483648, -2147483648, -2147483648, + }, + { + -4, -4, -4, -4, + 1, 1, 1, 1, + 1, 1, 1, 1, + 2147483647, 2147483647, 2147483647, 2147483647, + }, + { + -3, -3, -3, -3, + -2147483648, -2147483648, -2147483648, -2147483648, + -2147483648, -2147483648, -2147483648, -2147483648, + -2147483648, -2147483648, -2147483648, -2147483648, + }, + }, + + { + { + -2147483648, -2147483648, -2147483648, -2147483648, + 2147483647, 2147483647, 2147483647, 2147483647, + -2147483645, -2147483645, -2147483645, -2147483645, + 2147483646, 2147483646, 2147483646, 2147483646, + }, + { + 2147483647, 2147483647, 2147483647, 2147483647, + -2147483647, -2147483647, -2147483647, -2147483647, + -2147483647, -2147483647, -2147483647, -2147483647, + 2147483647, 2147483647, 2147483647, 2147483647, + }, + { + -2147483648, -2147483648, -2147483648, -2147483648, + 2147483647, 2147483647, 2147483647, 2147483647, + 2, 2, 2, 2, + -1, -1, -1, -1, + }, + }, +}; + +int64_t TEST_BINARY_DATA_NAME(int64_t, int64_t, sssub)[][3][N] = +{ + { + { + 0, 0, 0, 0, + 2, 2, 2, 2, + 9223372036854775806ll, 9223372036854775806ll, 9223372036854775806ll, 9223372036854775806ll, + 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, + }, + { + 0, 0, 0, 0, + 4, 4, 4, 4, + -2, -2, -2, -2, + -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll, + }, + { + 0, 0, 0, 0, + -2, -2, -2, -2, + 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, + 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, + }, + }, + + { + { + -7, -7, -7, -7, + -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, + -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll, + -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, + }, + { + -4, -4, -4, -4, + 1, 1, 1, 1, + 1, 1, 1, 1, + 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, + }, + { + -3, -3, -3, -3, + -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, + -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, + -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, + }, + }, + + { + { + -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, + 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, + -9223372036854775805ll, -9223372036854775805ll, -9223372036854775805ll, -9223372036854775805ll, + 9223372036854775806ll, 9223372036854775806ll, 9223372036854775806ll, 9223372036854775806ll, + }, + { + 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, + -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll, + -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll, + 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, + }, + { + -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, + 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, + 2, 2, 2, 2, + -1, -1, -1, -1, + }, + }, +}; + +#endif diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-1-s16.c similarity index 100% rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-2.c rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-1-s16.c diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-1-s32.c similarity index 100% rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-3.c rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-1-s32.c diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-1-s64.c similarity index 100% rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-4.c rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-1-s64.c diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-1-s8.c similarity index 100% rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-1.c rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-1-s8.c diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-2-s16.c similarity index 100% rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-6.c rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-2-s16.c diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-2-s32.c similarity index 100% rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-7.c rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-2-s32.c diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-2-s64.c similarity index 100% rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-8.c rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-2-s64.c diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-2-s8.c similarity index 100% rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-5.c rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-2-s8.c diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-10.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-3-s16.c similarity index 100% rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-10.c rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-3-s16.c diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-11.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-3-s32.c similarity index 100% rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-11.c rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-3-s32.c diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-12.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-3-s64.c similarity index 100% rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-12.c rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-3-s64.c diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-9.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-3-s8.c similarity index 100% rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-9.c rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-3-s8.c diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-14.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-4-s16.c similarity index 100% rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-14.c rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-4-s16.c diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-15.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-4-s32.c similarity index 100% rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-15.c rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-4-s32.c diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-4-s64.c similarity index 100% rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-16.c rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-4-s64.c diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-13.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-4-s8.c similarity index 100% rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-13.c rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-4-s8.c diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-run-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-1-s16.c similarity index 100% rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-run-2.c rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-1-s16.c diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-run-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-1-s32.c similarity index 100% rename from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-run-3.c rename to gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-1-s32.c diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_add-run-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-1-s64.c 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