From: Greg Kroah-Hartman Date: Fri, 25 Jun 2021 10:24:29 +0000 (+0200) Subject: 4.14-stable patches X-Git-Tag: v5.12.14~46 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=44200e9d7f89e8af8487e77e1cac8a4f7316e71c;p=thirdparty%2Fkernel%2Fstable-queue.git 4.14-stable patches added patches: arm64-perf-disable-pmu-while-processing-counter-overflows.patch mips-generic-update-node-names-to-avoid-unit-addresses.patch --- diff --git a/queue-4.14/arm64-perf-disable-pmu-while-processing-counter-overflows.patch b/queue-4.14/arm64-perf-disable-pmu-while-processing-counter-overflows.patch new file mode 100644 index 00000000000..bf919a7f10e --- /dev/null +++ b/queue-4.14/arm64-perf-disable-pmu-while-processing-counter-overflows.patch @@ -0,0 +1,112 @@ +From 3cce50dfec4a5b0414c974190940f47dd32c6dee Mon Sep 17 00:00:00 2001 +From: Suzuki K Poulose +Date: Tue, 10 Jul 2018 09:58:03 +0100 +Subject: arm64: perf: Disable PMU while processing counter overflows + +From: Suzuki K Poulose + +commit 3cce50dfec4a5b0414c974190940f47dd32c6dee upstream. + +The arm64 PMU updates the event counters and reprograms the +counters in the overflow IRQ handler without disabling the +PMU. This could potentially cause skews in for group counters, +where the overflowed counters may potentially loose some event +counts, while they are reprogrammed. To prevent this, disable +the PMU while we process the counter overflows and enable it +right back when we are done. + +This patch also moves the PMU stop/start routines to avoid a +forward declaration. + +Suggested-by: Mark Rutland +Cc: Will Deacon +Acked-by: Mark Rutland +Signed-off-by: Suzuki K Poulose +Signed-off-by: Will Deacon +Signed-off-by: Aman Priyadarshi +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm64/kernel/perf_event.c | 50 ++++++++++++++++++++++------------------- + 1 file changed, 28 insertions(+), 22 deletions(-) + +--- a/arch/arm64/kernel/perf_event.c ++++ b/arch/arm64/kernel/perf_event.c +@@ -670,6 +670,28 @@ static void armv8pmu_disable_event(struc + raw_spin_unlock_irqrestore(&events->pmu_lock, flags); + } + ++static void armv8pmu_start(struct arm_pmu *cpu_pmu) ++{ ++ unsigned long flags; ++ struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events); ++ ++ raw_spin_lock_irqsave(&events->pmu_lock, flags); ++ /* Enable all counters */ ++ armv8pmu_pmcr_write(armv8pmu_pmcr_read() | ARMV8_PMU_PMCR_E); ++ raw_spin_unlock_irqrestore(&events->pmu_lock, flags); ++} ++ ++static void armv8pmu_stop(struct arm_pmu *cpu_pmu) ++{ ++ unsigned long flags; ++ struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events); ++ ++ raw_spin_lock_irqsave(&events->pmu_lock, flags); ++ /* Disable all counters */ ++ armv8pmu_pmcr_write(armv8pmu_pmcr_read() & ~ARMV8_PMU_PMCR_E); ++ raw_spin_unlock_irqrestore(&events->pmu_lock, flags); ++} ++ + static irqreturn_t armv8pmu_handle_irq(int irq_num, void *dev) + { + u32 pmovsr; +@@ -695,6 +717,11 @@ static irqreturn_t armv8pmu_handle_irq(i + */ + regs = get_irq_regs(); + ++ /* ++ * Stop the PMU while processing the counter overflows ++ * to prevent skews in group events. ++ */ ++ armv8pmu_stop(cpu_pmu); + for (idx = 0; idx < cpu_pmu->num_events; ++idx) { + struct perf_event *event = cpuc->events[idx]; + struct hw_perf_event *hwc; +@@ -719,6 +746,7 @@ static irqreturn_t armv8pmu_handle_irq(i + if (perf_event_overflow(event, &data, regs)) + cpu_pmu->disable(event); + } ++ armv8pmu_start(cpu_pmu); + + /* + * Handle the pending perf events. +@@ -732,28 +760,6 @@ static irqreturn_t armv8pmu_handle_irq(i + return IRQ_HANDLED; + } + +-static void armv8pmu_start(struct arm_pmu *cpu_pmu) +-{ +- unsigned long flags; +- struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events); +- +- raw_spin_lock_irqsave(&events->pmu_lock, flags); +- /* Enable all counters */ +- armv8pmu_pmcr_write(armv8pmu_pmcr_read() | ARMV8_PMU_PMCR_E); +- raw_spin_unlock_irqrestore(&events->pmu_lock, flags); +-} +- +-static void armv8pmu_stop(struct arm_pmu *cpu_pmu) +-{ +- unsigned long flags; +- struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events); +- +- raw_spin_lock_irqsave(&events->pmu_lock, flags); +- /* Disable all counters */ +- armv8pmu_pmcr_write(armv8pmu_pmcr_read() & ~ARMV8_PMU_PMCR_E); +- raw_spin_unlock_irqrestore(&events->pmu_lock, flags); +-} +- + static int armv8pmu_get_event_idx(struct pmu_hw_events *cpuc, + struct perf_event *event) + { diff --git a/queue-4.14/mips-generic-update-node-names-to-avoid-unit-addresses.patch b/queue-4.14/mips-generic-update-node-names-to-avoid-unit-addresses.patch new file mode 100644 index 00000000000..cba9f86b2c6 --- /dev/null +++ b/queue-4.14/mips-generic-update-node-names-to-avoid-unit-addresses.patch @@ -0,0 +1,132 @@ +From foo@baz Fri Jun 25 12:18:15 PM CEST 2021 +From: Nathan Chancellor +Date: Fri, 9 Apr 2021 12:21:28 -0700 +Subject: MIPS: generic: Update node names to avoid unit addresses + +From: Nathan Chancellor + +commit e607ff630c6053ecc67502677c0e50053d7892d4 upstream. + +With the latest mkimage from U-Boot 2021.04, the generic defconfigs no +longer build, failing with: + +/usr/bin/mkimage: verify_header failed for FIT Image support with exit code 1 + +This is expected after the linked U-Boot commits because '@' is +forbidden in the node names due to the way that libfdt treats nodes with +the same prefix but different unit addresses. + +Switch the '@' in the node name to '-'. Drop the unit addresses from the +hash and kernel child nodes because there is only one node so they do +not need to have a number to differentiate them. + +Cc: stable@vger.kernel.org +Link: https://source.denx.de/u-boot/u-boot/-/commit/79af75f7776fc20b0d7eb6afe1e27c00fdb4b9b4 +Link: https://source.denx.de/u-boot/u-boot/-/commit/3f04db891a353f4b127ed57279279f851c6b4917 +Suggested-by: Simon Glass +Signed-off-by: Nathan Chancellor +Reviewed-by: Tom Rini +Signed-off-by: Thomas Bogendoerfer +[nathan: Backport to 4.14, only apply to .its.S files that exist] +Signed-off-by: Nathan Chancellor +Signed-off-by: Greg Kroah-Hartman +--- + arch/mips/generic/board-boston.its.S | 10 +++++----- + arch/mips/generic/board-ni169445.its.S | 10 +++++----- + arch/mips/generic/vmlinux.its.S | 10 +++++----- + 3 files changed, 15 insertions(+), 15 deletions(-) + +--- a/arch/mips/generic/board-boston.its.S ++++ b/arch/mips/generic/board-boston.its.S +@@ -1,22 +1,22 @@ + / { + images { +- fdt@boston { ++ fdt-boston { + description = "img,boston Device Tree"; + data = /incbin/("boot/dts/img/boston.dtb"); + type = "flat_dt"; + arch = "mips"; + compression = "none"; +- hash@0 { ++ hash { + algo = "sha1"; + }; + }; + }; + + configurations { +- conf@boston { ++ conf-boston { + description = "Boston Linux kernel"; +- kernel = "kernel@0"; +- fdt = "fdt@boston"; ++ kernel = "kernel"; ++ fdt = "fdt-boston"; + }; + }; + }; +--- a/arch/mips/generic/board-ni169445.its.S ++++ b/arch/mips/generic/board-ni169445.its.S +@@ -1,22 +1,22 @@ + / { + images { +- fdt@ni169445 { ++ fdt-ni169445 { + description = "NI 169445 device tree"; + data = /incbin/("boot/dts/ni/169445.dtb"); + type = "flat_dt"; + arch = "mips"; + compression = "none"; +- hash@0 { ++ hash { + algo = "sha1"; + }; + }; + }; + + configurations { +- conf@ni169445 { ++ conf-ni169445 { + description = "NI 169445 Linux Kernel"; +- kernel = "kernel@0"; +- fdt = "fdt@ni169445"; ++ kernel = "kernel"; ++ fdt = "fdt-ni169445"; + }; + }; + }; +--- a/arch/mips/generic/vmlinux.its.S ++++ b/arch/mips/generic/vmlinux.its.S +@@ -6,7 +6,7 @@ + #address-cells = ; + + images { +- kernel@0 { ++ kernel { + description = KERNEL_NAME; + data = /incbin/(VMLINUX_BINARY); + type = "kernel"; +@@ -15,18 +15,18 @@ + compression = VMLINUX_COMPRESSION; + load = /bits/ ADDR_BITS ; + entry = /bits/ ADDR_BITS ; +- hash@0 { ++ hash { + algo = "sha1"; + }; + }; + }; + + configurations { +- default = "conf@default"; ++ default = "conf-default"; + +- conf@default { ++ conf-default { + description = "Generic Linux kernel"; +- kernel = "kernel@0"; ++ kernel = "kernel"; + }; + }; + }; diff --git a/queue-4.14/series b/queue-4.14/series index cde935be4d8..d4184f25435 100644 --- a/queue-4.14/series +++ b/queue-4.14/series @@ -66,3 +66,5 @@ drm-nouveau-wait-for-moving-fence-after-pinning-v2.patch drm-radeon-wait-for-moving-fence-after-pinning.patch arm-9081-1-fix-gcc-10-thumb2-kernel-regression.patch makefile-move-wno-unused-but-set-variable-out-of-gcc-only-block.patch +mips-generic-update-node-names-to-avoid-unit-addresses.patch +arm64-perf-disable-pmu-while-processing-counter-overflows.patch