From: Greg Kroah-Hartman Date: Fri, 11 Jun 2021 07:46:40 +0000 (+0200) Subject: 4.19-stable patches X-Git-Tag: v4.4.273~53 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=445827b2cb956e17de4a9f068870de785ebb7c3b;p=thirdparty%2Fkernel%2Fstable-queue.git 4.19-stable patches added patches: arm-dts-imx6q-dhcom-add-pu-vdd1p1-vdd2p5-regulators.patch arm-dts-imx6qdl-sabresd-assign-corresponding-power-supply-for-ldos.patch --- diff --git a/queue-4.19/arm-dts-imx6q-dhcom-add-pu-vdd1p1-vdd2p5-regulators.patch b/queue-4.19/arm-dts-imx6q-dhcom-add-pu-vdd1p1-vdd2p5-regulators.patch new file mode 100644 index 00000000000..0a130f7f5e1 --- /dev/null +++ b/queue-4.19/arm-dts-imx6q-dhcom-add-pu-vdd1p1-vdd2p5-regulators.patch @@ -0,0 +1,54 @@ +From 8967b27a6c1c19251989c7ab33c058d16e4a5f53 Mon Sep 17 00:00:00 2001 +From: Marek Vasut +Date: Mon, 26 Apr 2021 12:23:21 +0200 +Subject: ARM: dts: imx6q-dhcom: Add PU,VDD1P1,VDD2P5 regulators + +From: Marek Vasut + +commit 8967b27a6c1c19251989c7ab33c058d16e4a5f53 upstream. + +Per schematic, both PU and SOC regulator are supplied from LTC3676 SW1 +via VDDSOC_IN rail, add the PU input. Both VDD1P1, VDD2P5 are supplied +from LTC3676 SW2 via VDDHIGH_IN rail, add both inputs. + +While no instability or problems are currently observed, the regulators +should be fully described in DT and that description should fully match +the hardware, else this might lead to unforseen issues later. Fix this. + +Fixes: 52c7a088badd ("ARM: dts: imx6q: Add support for the DHCOM iMX6 SoM and PDK2") +Reviewed-by: Fabio Estevam +Signed-off-by: Marek Vasut +Cc: Christoph Niedermaier +Cc: Fabio Estevam +Cc: Ludwig Zenz +Cc: NXP Linux Team +Cc: Shawn Guo +Cc: stable@vger.kernel.org +Reviewed-by: Christoph Niedermaier +Signed-off-by: Shawn Guo +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm/boot/dts/imx6q-dhcom-som.dtsi | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +--- a/arch/arm/boot/dts/imx6q-dhcom-som.dtsi ++++ b/arch/arm/boot/dts/imx6q-dhcom-som.dtsi +@@ -407,6 +407,18 @@ + vin-supply = <&sw1_reg>; + }; + ++®_pu { ++ vin-supply = <&sw1_reg>; ++}; ++ ++®_vdd1p1 { ++ vin-supply = <&sw2_reg>; ++}; ++ ++®_vdd2p5 { ++ vin-supply = <&sw2_reg>; ++}; ++ + &uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; diff --git a/queue-4.19/arm-dts-imx6qdl-sabresd-assign-corresponding-power-supply-for-ldos.patch b/queue-4.19/arm-dts-imx6qdl-sabresd-assign-corresponding-power-supply-for-ldos.patch new file mode 100644 index 00000000000..fb2a5ae72f6 --- /dev/null +++ b/queue-4.19/arm-dts-imx6qdl-sabresd-assign-corresponding-power-supply-for-ldos.patch @@ -0,0 +1,81 @@ +From 93385546ba369182220436f60ceb3beabe4b7de1 Mon Sep 17 00:00:00 2001 +From: Anson Huang +Date: Sun, 12 May 2019 09:57:20 +0000 +Subject: ARM: dts: imx6qdl-sabresd: Assign corresponding power supply for LDOs + +From: Anson Huang + +commit 93385546ba369182220436f60ceb3beabe4b7de1 upstream. + +On i.MX6Q/DL SabreSD board, vgen5 supplies vdd1p1/vdd2p5 LDO and +sw2 supplies vdd3p0 LDO, this patch assigns corresponding power +supply for vdd1p1/vdd2p5/vdd3p0 to avoid confusion by below log: + +vdd1p1: supplied by regulator-dummy +vdd3p0: supplied by regulator-dummy +vdd2p5: supplied by regulator-dummy + +With this patch, the power supply is more accurate: + +vdd1p1: supplied by VGEN5 +vdd3p0: supplied by SW2 +vdd2p5: supplied by VGEN5 + +Signed-off-by: Anson Huang +Signed-off-by: Shawn Guo +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 12 ++++++++++++ + arch/arm/boot/dts/imx6qdl.dtsi | 6 +++--- + 2 files changed, 15 insertions(+), 3 deletions(-) + +--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi +@@ -671,6 +671,18 @@ + vin-supply = <&sw1c_reg>; + }; + ++®_vdd1p1 { ++ vin-supply = <&vgen5_reg>; ++}; ++ ++®_vdd3p0 { ++ vin-supply = <&sw2_reg>; ++}; ++ ++®_vdd2p5 { ++ vin-supply = <&vgen5_reg>; ++}; ++ + &snvs_poweroff { + status = "okay"; + }; +--- a/arch/arm/boot/dts/imx6qdl.dtsi ++++ b/arch/arm/boot/dts/imx6qdl.dtsi +@@ -686,7 +686,7 @@ + <0 54 IRQ_TYPE_LEVEL_HIGH>, + <0 127 IRQ_TYPE_LEVEL_HIGH>; + +- regulator-1p1 { ++ reg_vdd1p1: regulator-1p1 { + compatible = "fsl,anatop-regulator"; + regulator-name = "vdd1p1"; + regulator-min-microvolt = <1000000>; +@@ -701,7 +701,7 @@ + anatop-enable-bit = <0>; + }; + +- regulator-3p0 { ++ reg_vdd3p0: regulator-3p0 { + compatible = "fsl,anatop-regulator"; + regulator-name = "vdd3p0"; + regulator-min-microvolt = <2800000>; +@@ -716,7 +716,7 @@ + anatop-enable-bit = <0>; + }; + +- regulator-2p5 { ++ reg_vdd2p5: regulator-2p5 { + compatible = "fsl,anatop-regulator"; + regulator-name = "vdd2p5"; + regulator-min-microvolt = <2250000>; diff --git a/queue-4.19/series b/queue-4.19/series index 16a4ded8272..3f225dc728e 100644 --- a/queue-4.19/series +++ b/queue-4.19/series @@ -24,3 +24,5 @@ powerpc-fsl-set-fsl-i2c-erratum-a004447-flag-for-p20.patch powerpc-fsl-set-fsl-i2c-erratum-a004447-flag-for-p10.patch i2c-mpc-make-use-of-i2c_recover_bus.patch i2c-mpc-implement-erratum-a-004447-workaround.patch +arm-dts-imx6qdl-sabresd-assign-corresponding-power-supply-for-ldos.patch +arm-dts-imx6q-dhcom-add-pu-vdd1p1-vdd2p5-regulators.patch