From: Fabrizio Castro Date: Mon, 30 Sep 2024 14:52:42 +0000 (+0100) Subject: clk: renesas: r9a09g057: Add clock and reset entries for ICU X-Git-Tag: v6.13-rc1~110^2~2^5~1^2~1 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=44d13e198cbf031fdb8cb20b6bbbe82adcb951ca;p=thirdparty%2Flinux.git clk: renesas: r9a09g057: Add clock and reset entries for ICU Add clock and reset entries for the Renesas RZ/V2H(P) ICU IP block. Signed-off-by: Lad Prabhakar Signed-off-by: Fabrizio Castro Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/20240930145244.356565-4-fabrizio.castro.jz@renesas.com Signed-off-by: Geert Uytterhoeven --- diff --git a/drivers/clk/renesas/r9a09g057-cpg.c b/drivers/clk/renesas/r9a09g057-cpg.c index a426d0aa45924..7c4507fd34e6a 100644 --- a/drivers/clk/renesas/r9a09g057-cpg.c +++ b/drivers/clk/renesas/r9a09g057-cpg.c @@ -94,6 +94,7 @@ static const struct cpg_core_clk r9a09g057_core_clks[] __initconst = { }; static const struct rzv2h_mod_clk r9a09g057_mod_clks[] __initconst = { + DEF_MOD_CRITICAL("icu_0_pclk_i", CLK_PLLCM33_DIV16, 0, 5, 0, 5), DEF_MOD("gtm_0_pclk", CLK_PLLCM33_DIV16, 4, 3, 2, 3), DEF_MOD("gtm_1_pclk", CLK_PLLCM33_DIV16, 4, 4, 2, 4), DEF_MOD("gtm_2_pclk", CLK_PLLCLN_DIV16, 4, 5, 2, 5), @@ -135,6 +136,7 @@ static const struct rzv2h_mod_clk r9a09g057_mod_clks[] __initconst = { }; static const struct rzv2h_reset r9a09g057_resets[] __initconst = { + DEF_RST(3, 6, 1, 7), /* ICU_0_PRESETN_I */ DEF_RST(6, 13, 2, 30), /* GTM_0_PRESETZ */ DEF_RST(6, 14, 2, 31), /* GTM_1_PRESETZ */ DEF_RST(6, 15, 3, 0), /* GTM_2_PRESETZ */