From: Bibo Mao <maobibo@loongson.cn>
Date: Sat, 14 Sep 2024 06:46:45 +0000 (+0800)
Subject: target/loongarch: Avoid bits shift exceeding width of bool type
X-Git-Tag: v9.2.0-rc0~45^2~2
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=4521167f5783eca168d7480adbc634c3654d419d;p=thirdparty%2Fqemu.git

target/loongarch: Avoid bits shift exceeding width of bool type

Variable env->cf[i] is defined as bool type, it is treated as int type
with shift operation. However the max possible width is 56 for the shift
operation, exceeding the width of int type. And there is existing api
read_fcc() which is converted to u64 type with bitwise shift, it can be
used to dump fp registers into coredump note segment.

Resolves: Coverity CID 1561133
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20240914064645.2099169-1-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---

diff --git a/target/loongarch/arch_dump.c b/target/loongarch/arch_dump.c
index 4986db970ec..d9e1120333c 100644
--- a/target/loongarch/arch_dump.c
+++ b/target/loongarch/arch_dump.c
@@ -97,11 +97,7 @@ static int loongarch_write_elf64_fprpreg(WriteCoreDumpFunction f,
 
     loongarch_note_init(&note, s, "CORE", 5, NT_PRFPREG, sizeof(note.fpu));
     note.fpu.fcsr = cpu_to_dump64(s, env->fcsr0);
-
-    for (i = 0; i < 8; i++) {
-        note.fpu.fcc |= env->cf[i] << (8 * i);
-    }
-    note.fpu.fcc = cpu_to_dump64(s, note.fpu.fcc);
+    note.fpu.fcc = cpu_to_dump64(s, read_fcc(env));
 
     for (i = 0; i < 32; ++i) {
         note.fpu.fpr[i] = cpu_to_dump64(s, env->fpr[i].vreg.UD[0]);