From: Jouni Högander <jouni.hogander@intel.com>
Date: Thu, 13 Feb 2025 06:47:59 +0000 (+0200)
Subject: drm/i915/display: Warn on use_dsb in non-dsb pipe update functions
X-Git-Tag: v6.15-rc1~120^2~16^2~52
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=452c3fb857f8fe35544335d336eb6ee379ef9b30;p=thirdparty%2Fkernel%2Flinux.git

drm/i915/display: Warn on use_dsb in non-dsb pipe update functions

Add drm_WARN_ON(use_dsb) into commit_pipe_{pre,post}_planes() and
intel_pipe_update_{start,end}() as they are not supposed to get called on
non-dsb updates.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250213064804.2077127-9-jouni.hogander@intel.com
---

diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
index d075f6d2961b0..5b2603ef2ff75 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc.c
@@ -522,6 +522,8 @@ void intel_pipe_update_start(struct intel_atomic_state *state,
 	struct intel_vblank_evade_ctx evade;
 	int scanline;
 
+	drm_WARN_ON(display->drm, new_crtc_state->use_dsb);
+
 	intel_psr_lock(new_crtc_state);
 
 	if (new_crtc_state->do_async_flip) {
@@ -660,6 +662,8 @@ void intel_pipe_update_end(struct intel_atomic_state *state,
 	ktime_t end_vbl_time = ktime_get();
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 
+	drm_WARN_ON(display->drm, new_crtc_state->use_dsb);
+
 	if (new_crtc_state->do_async_flip)
 		goto out;
 
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index aea18c7ef63fc..00a552d75be2e 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7136,11 +7136,13 @@ static void commit_pipe_pre_planes(struct intel_atomic_state *state,
 		intel_atomic_get_new_crtc_state(state, crtc);
 	bool modeset = intel_crtc_needs_modeset(new_crtc_state);
 
+	drm_WARN_ON(&dev_priv->drm, new_crtc_state->use_dsb);
+
 	/*
 	 * During modesets pipe configuration was programmed as the
 	 * CRTC was enabled.
 	 */
-	if (!modeset && !new_crtc_state->use_dsb) {
+	if (!modeset) {
 		if (intel_crtc_needs_color_update(new_crtc_state))
 			intel_color_commit_arm(NULL, new_crtc_state);
 
@@ -7163,6 +7165,8 @@ static void commit_pipe_post_planes(struct intel_atomic_state *state,
 	const struct intel_crtc_state *new_crtc_state =
 		intel_atomic_get_new_crtc_state(state, crtc);
 
+	drm_WARN_ON(&dev_priv->drm, new_crtc_state->use_dsb);
+
 	/*
 	 * Disable the scaler(s) after the plane(s) so that we don't
 	 * get a catastrophic underrun even if the two operations