From: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Date: Tue, 21 May 2024 14:41:52 +0000 (-0400)
Subject: drm/amd/display: Guard reading 3DLUT registers for dcn32/dcn35
X-Git-Tag: v6.11-rc1~141^2~18^2~165
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=470679ef332e7ebceb05d11e602d101a627e5200;p=thirdparty%2Fkernel%2Flinux.git

drm/amd/display: Guard reading 3DLUT registers for dcn32/dcn35

[Why]
3DLUT is not part of the DPP on DCN32/DCN35 ASIC and these registers
now exist in MCM state.

[How]
Add guards when reading DPP state based on whether the register has a
valid offset.

Reviewed-by: Sung joon Kim <sungjoon.kim@amd.com>
Acked-by: Zaeem Mohamed <zaeem.mohamed@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---

diff --git a/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c b/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
index f8c0cee340801..abdf6a132e665 100644
--- a/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
+++ b/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
@@ -64,22 +64,23 @@ void dpp30_read_state(struct dpp *dpp_base, struct dcn_dpp_state *s)
 	}
 
 	// Shaper LUT (RAM), 3D LUT (mode, bit-depth, size)
-	REG_GET(CM_SHAPER_CONTROL,
-		CM_SHAPER_LUT_MODE, &s->shaper_lut_mode);
-	REG_GET(CM_3DLUT_MODE,
-		CM_3DLUT_MODE_CURRENT, &s->lut3d_mode);
-	REG_GET(CM_3DLUT_READ_WRITE_CONTROL,
-		CM_3DLUT_30BIT_EN, &s->lut3d_bit_depth);
-	REG_GET(CM_3DLUT_MODE,
-		CM_3DLUT_SIZE, &s->lut3d_size);
+	if (REG(CM_SHAPER_CONTROL))
+		REG_GET(CM_SHAPER_CONTROL, CM_SHAPER_LUT_MODE, &s->shaper_lut_mode);
+	if (REG(CM_3DLUT_MODE))
+		REG_GET(CM_3DLUT_MODE, CM_3DLUT_MODE_CURRENT, &s->lut3d_mode);
+	if (REG(CM_3DLUT_READ_WRITE_CONTROL))
+		REG_GET(CM_3DLUT_READ_WRITE_CONTROL, CM_3DLUT_30BIT_EN, &s->lut3d_bit_depth);
+	if (REG(CM_3DLUT_MODE))
+		REG_GET(CM_3DLUT_MODE, CM_3DLUT_SIZE, &s->lut3d_size);
 
 	// Blend/Out Gamma (RAM)
-	REG_GET(CM_BLNDGAM_CONTROL,
-		CM_BLNDGAM_MODE_CURRENT, &s->rgam_lut_mode);
-	if (s->rgam_lut_mode){
-		REG_GET(CM_BLNDGAM_CONTROL, CM_BLNDGAM_SELECT_CURRENT, &rgam_lut_mode);
-		if (!rgam_lut_mode)
-			s->rgam_lut_mode = LUT_RAM_A; // Otherwise, LUT_RAM_B
+	if (REG(CM_BLNDGAM_CONTROL)) {
+		REG_GET(CM_BLNDGAM_CONTROL, CM_BLNDGAM_MODE_CURRENT, &s->rgam_lut_mode);
+		if (s->rgam_lut_mode) {
+			REG_GET(CM_BLNDGAM_CONTROL, CM_BLNDGAM_SELECT_CURRENT, &rgam_lut_mode);
+			if (!rgam_lut_mode)
+				s->rgam_lut_mode = LUT_RAM_A; // Otherwise, LUT_RAM_B
+		}
 	}
 }