From: claziss Date: Mon, 13 Mar 2017 12:55:50 +0000 (+0000) Subject: [ARC] Fix conditional move contstraint X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=47b6455f27426c906bba9e7ca7571223c09cad92;p=thirdparty%2Fgcc.git [ARC] Fix conditional move contstraint Move pattern (movsi_insn) allows predicated instructions to be instructions which can hold all registers. However, the conditional variant doesn't. This patch fixes this problem. 2017-03-13 Claudiu Zissulescu * config/arc/arc.md (movsi_cond_exec): Update constraint. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@246088 138bc75d-0d04-0410-961f-82ee72b054a4 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f6435046c13d..6c6676e4d95c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2017-03-13 Claudiu Zissulescu + + * config/arc/arc.md (movsi_cond_exec): Update constraint. + 2017-03-13 Claudiu Zissulescu * config/arc/arc.c (arc_legitimize_pic_address): Handle PIC diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md index 786febc9ebd7..df039e6b7fa2 100644 --- a/gcc/config/arc/arc.md +++ b/gcc/config/arc/arc.md @@ -3646,7 +3646,7 @@ (match_operator 3 "proper_comparison_operator" [(match_operand 2 "cc_register" "Rcc,Rcc") (const_int 0)]) (set (match_operand:SI 0 "dest_reg_operand" "=w,w") - (match_operand:SI 1 "nonmemory_operand" "Lc,?Cal")))] + (match_operand:SI 1 "nonmemory_operand" "LRac,?Cal")))] "" "mov.%d3 %0,%S1" [(set_attr "type" "cmove")