From: Claudiu Beznea Date: Sat, 19 Oct 2024 08:47:27 +0000 (+0300) Subject: dt-bindings: clock: r9a08g045-cpg: Add power domain ID for RTC X-Git-Tag: v6.13-rc1~110^2~2^5^2~5^2 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=49991cca67d584a59cb10d48825cce3d11f7d843;p=thirdparty%2Flinux.git dt-bindings: clock: r9a08g045-cpg: Add power domain ID for RTC The RTC and VBATTB don't share the MSTOP control bit (but only the bus clock and the reset signal). As the MSTOP control is modeled though power domains add power domain ID for the RTC device available on the Renesas RZ/G3S SoC. Signed-off-by: Claudiu Beznea Acked-by: Krzysztof Kozlowski Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/20241019084738.3370489-2-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- diff --git a/include/dt-bindings/clock/r9a08g045-cpg.h b/include/dt-bindings/clock/r9a08g045-cpg.h index 8281e9caf3a9e..311521fe4b59c 100644 --- a/include/dt-bindings/clock/r9a08g045-cpg.h +++ b/include/dt-bindings/clock/r9a08g045-cpg.h @@ -308,5 +308,6 @@ #define R9A08G045_PD_DDR 64 #define R9A08G045_PD_TZCDDR 65 #define R9A08G045_PD_OTFDE_DDR 66 +#define R9A08G045_PD_RTC 67 #endif /* __DT_BINDINGS_CLOCK_R9A08G045_CPG_H__ */