From: Borislav Petkov Date: Mon, 24 Mar 2025 16:06:17 +0000 (+0100) Subject: KVM: x86: Sort CPUID_8000_0021_EAX leaf bits properly X-Git-Tag: v6.16-rc1~78^2~9^2~9 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=49c140d5af127ef4faf19f06a89a0714edf0316f;p=thirdparty%2Flinux.git KVM: x86: Sort CPUID_8000_0021_EAX leaf bits properly WRMSR_XX_BASE_NS is bit 1 so put it there, add some new bits as comments only. Signed-off-by: Borislav Petkov (AMD) Link: https://lore.kernel.org/r/20250324160617.15379-1-bp@kernel.org [sean: skip the FSRS/FSRC placeholders to avoid confusion] Signed-off-by: Sean Christopherson --- diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index 3e7a8d5813c25..5d4de19b7c221 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -1152,6 +1152,7 @@ void kvm_set_cpu_caps(void) kvm_cpu_cap_init(CPUID_8000_0021_EAX, F(NO_NESTED_DATA_BP), + F(WRMSR_XX_BASE_NS), /* * Synthesize "LFENCE is serializing" into the AMD-defined entry * in KVM's supported CPUID, i.e. if the feature is reported as @@ -1165,10 +1166,12 @@ void kvm_set_cpu_caps(void) SYNTHESIZED_F(LFENCE_RDTSC), /* SmmPgCfgLock */ F(NULL_SEL_CLR_BASE), + /* UpperAddressIgnore */ F(AUTOIBRS), EMULATED_F(NO_SMM_CTL_MSR), /* PrefetchCtlMsr */ - F(WRMSR_XX_BASE_NS), + /* GpOnUserCpuid */ + /* EPSF */ SYNTHESIZED_F(SBPB), SYNTHESIZED_F(IBPB_BRTYPE), SYNTHESIZED_F(SRSO_NO),