From: Greg Kroah-Hartman Date: Wed, 23 Sep 2015 04:35:43 +0000 (-0700) Subject: 3.14-stable patches X-Git-Tag: v4.1.9~50 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=4a9234b6e456fb2fd7cf96684c6964dcf1578b8c;p=thirdparty%2Fkernel%2Fstable-queue.git 3.14-stable patches added patches: alsa-hda-enable-headphone-jack-detect-on-old-fujitsu-laptops.patch alsa-hda-use-alc880_fixup_fujitsu-for-fsc-amilo-m1437.patch arm64-compat-fix-vfp-save-restore-across-signal-handlers-in-big-endian.patch arm64-errata-add-module-build-workaround-for-erratum-843419.patch arm64-head.s-initialise-mdcr_el2-in-el2_setup.patch arm64-kconfig-move-list_poison-to-a-safe-value.patch arm64-kvm-disable-virtual-timer-even-if-the-guest-is-not-using-it.patch input-evdev-do-not-report-errors-form-flush.patch input-synaptics-fix-handling-of-disabling-gesture-mode.patch --- diff --git a/queue-3.14/alsa-hda-enable-headphone-jack-detect-on-old-fujitsu-laptops.patch b/queue-3.14/alsa-hda-enable-headphone-jack-detect-on-old-fujitsu-laptops.patch new file mode 100644 index 00000000000..ad3eb483676 --- /dev/null +++ b/queue-3.14/alsa-hda-enable-headphone-jack-detect-on-old-fujitsu-laptops.patch @@ -0,0 +1,42 @@ +From bb148bdeb0ab16fc0ae8009799471e4d7180073b Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Thu, 13 Aug 2015 18:02:39 +0200 +Subject: ALSA: hda - Enable headphone jack detect on old Fujitsu laptops + +From: Takashi Iwai + +commit bb148bdeb0ab16fc0ae8009799471e4d7180073b upstream. + +According to the bug report, FSC Amilo laptops with ALC880 can detect +the headphone jack but currently the driver disables it. It's partly +intentionally, as non-working jack detect was reported in the past. +Let's enable now. + +Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=102501 +Signed-off-by: Takashi Iwai +Signed-off-by: Greg Kroah-Hartman + +--- + sound/pci/hda/patch_realtek.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/sound/pci/hda/patch_realtek.c ++++ b/sound/pci/hda/patch_realtek.c +@@ -1193,7 +1193,7 @@ static const struct hda_fixup alc880_fix + /* override all pins as BIOS on old Amilo is broken */ + .type = HDA_FIXUP_PINS, + .v.pins = (const struct hda_pintbl[]) { +- { 0x14, 0x0121411f }, /* HP */ ++ { 0x14, 0x0121401f }, /* HP */ + { 0x15, 0x99030120 }, /* speaker */ + { 0x16, 0x99030130 }, /* bass speaker */ + { 0x17, 0x411111f0 }, /* N/A */ +@@ -1213,7 +1213,7 @@ static const struct hda_fixup alc880_fix + /* almost compatible with FUJITSU, but no bass and SPDIF */ + .type = HDA_FIXUP_PINS, + .v.pins = (const struct hda_pintbl[]) { +- { 0x14, 0x0121411f }, /* HP */ ++ { 0x14, 0x0121401f }, /* HP */ + { 0x15, 0x99030120 }, /* speaker */ + { 0x16, 0x411111f0 }, /* N/A */ + { 0x17, 0x411111f0 }, /* N/A */ diff --git a/queue-3.14/alsa-hda-use-alc880_fixup_fujitsu-for-fsc-amilo-m1437.patch b/queue-3.14/alsa-hda-use-alc880_fixup_fujitsu-for-fsc-amilo-m1437.patch new file mode 100644 index 00000000000..268c824754a --- /dev/null +++ b/queue-3.14/alsa-hda-use-alc880_fixup_fujitsu-for-fsc-amilo-m1437.patch @@ -0,0 +1,31 @@ +From a161574e200ae63a5042120e0d8c36830e81bde3 Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Thu, 13 Aug 2015 18:05:06 +0200 +Subject: ALSA: hda - Use ALC880_FIXUP_FUJITSU for FSC Amilo M1437 + +From: Takashi Iwai + +commit a161574e200ae63a5042120e0d8c36830e81bde3 upstream. + +It turned out that the machine has a bass speaker, so take a correct +fixup entry. + +Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=102501 +Signed-off-by: Takashi Iwai +Signed-off-by: Greg Kroah-Hartman + +--- + sound/pci/hda/patch_realtek.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/sound/pci/hda/patch_realtek.c ++++ b/sound/pci/hda/patch_realtek.c +@@ -1421,7 +1421,7 @@ static const struct snd_pci_quirk alc880 + SND_PCI_QUIRK(0x161f, 0x203d, "W810", ALC880_FIXUP_W810), + SND_PCI_QUIRK(0x161f, 0x205d, "Medion Rim 2150", ALC880_FIXUP_MEDION_RIM), + SND_PCI_QUIRK(0x1631, 0xe011, "PB 13201056", ALC880_FIXUP_6ST_AUTOMUTE), +- SND_PCI_QUIRK(0x1734, 0x107c, "FSC F1734", ALC880_FIXUP_F1734), ++ SND_PCI_QUIRK(0x1734, 0x107c, "FSC Amilo M1437", ALC880_FIXUP_FUJITSU), + SND_PCI_QUIRK(0x1734, 0x1094, "FSC Amilo M1451G", ALC880_FIXUP_FUJITSU), + SND_PCI_QUIRK(0x1734, 0x10ac, "FSC AMILO Xi 1526", ALC880_FIXUP_F1734), + SND_PCI_QUIRK(0x1734, 0x10b0, "FSC Amilo Pi1556", ALC880_FIXUP_FUJITSU), diff --git a/queue-3.14/arm64-compat-fix-vfp-save-restore-across-signal-handlers-in-big-endian.patch b/queue-3.14/arm64-compat-fix-vfp-save-restore-across-signal-handlers-in-big-endian.patch new file mode 100644 index 00000000000..b136fe272ff --- /dev/null +++ b/queue-3.14/arm64-compat-fix-vfp-save-restore-across-signal-handlers-in-big-endian.patch @@ -0,0 +1,119 @@ +From bdec97a855ef1e239f130f7a11584721c9a1bf04 Mon Sep 17 00:00:00 2001 +From: Will Deacon +Date: Tue, 15 Sep 2015 12:07:06 +0100 +Subject: arm64: compat: fix vfp save/restore across signal handlers in big-endian + +From: Will Deacon + +commit bdec97a855ef1e239f130f7a11584721c9a1bf04 upstream. + +When saving/restoring the VFP registers from a compat (AArch32) +signal frame, we rely on the compat registers forming a prefix of the +native register file and therefore make use of copy_{to,from}_user to +transfer between the native fpsimd_state and the compat_vfp_sigframe. + +Unfortunately, this doesn't work so well in a big-endian environment. +Our fpsimd save/restore code operates directly on 128-bit quantities +(Q registers) whereas the compat_vfp_sigframe represents the registers +as an array of 64-bit (D) registers. The architecture packs the compat D +registers into the Q registers, with the least significant bytes holding +the lower register. Consequently, we need to swap the 64-bit halves when +converting between these two representations on a big-endian machine. + +This patch replaces the __copy_{to,from}_user invocations in our +compat VFP signal handling code with explicit __put_user loops that +operate on 64-bit values and swap them accordingly. + +Reviewed-by: Catalin Marinas +Signed-off-by: Will Deacon +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm64/kernel/signal32.c | 47 ++++++++++++++++++++++++++++++++----------- + 1 file changed, 36 insertions(+), 11 deletions(-) + +--- a/arch/arm64/kernel/signal32.c ++++ b/arch/arm64/kernel/signal32.c +@@ -203,14 +203,32 @@ int copy_siginfo_from_user32(siginfo_t * + + /* + * VFP save/restore code. ++ * ++ * We have to be careful with endianness, since the fpsimd context-switch ++ * code operates on 128-bit (Q) register values whereas the compat ABI ++ * uses an array of 64-bit (D) registers. Consequently, we need to swap ++ * the two halves of each Q register when running on a big-endian CPU. + */ ++union __fpsimd_vreg { ++ __uint128_t raw; ++ struct { ++#ifdef __AARCH64EB__ ++ u64 hi; ++ u64 lo; ++#else ++ u64 lo; ++ u64 hi; ++#endif ++ }; ++}; ++ + static int compat_preserve_vfp_context(struct compat_vfp_sigframe __user *frame) + { + struct fpsimd_state *fpsimd = ¤t->thread.fpsimd_state; + compat_ulong_t magic = VFP_MAGIC; + compat_ulong_t size = VFP_STORAGE_SIZE; + compat_ulong_t fpscr, fpexc; +- int err = 0; ++ int i, err = 0; + + /* + * Save the hardware registers to the fpsimd_state structure. +@@ -226,10 +244,15 @@ static int compat_preserve_vfp_context(s + /* + * Now copy the FP registers. Since the registers are packed, + * we can copy the prefix we want (V0-V15) as it is. +- * FIXME: Won't work if big endian. + */ +- err |= __copy_to_user(&frame->ufp.fpregs, fpsimd->vregs, +- sizeof(frame->ufp.fpregs)); ++ for (i = 0; i < ARRAY_SIZE(frame->ufp.fpregs); i += 2) { ++ union __fpsimd_vreg vreg = { ++ .raw = fpsimd->vregs[i >> 1], ++ }; ++ ++ __put_user_error(vreg.lo, &frame->ufp.fpregs[i], err); ++ __put_user_error(vreg.hi, &frame->ufp.fpregs[i + 1], err); ++ } + + /* Create an AArch32 fpscr from the fpsr and the fpcr. */ + fpscr = (fpsimd->fpsr & VFP_FPSCR_STAT_MASK) | +@@ -254,7 +277,7 @@ static int compat_restore_vfp_context(st + compat_ulong_t magic = VFP_MAGIC; + compat_ulong_t size = VFP_STORAGE_SIZE; + compat_ulong_t fpscr; +- int err = 0; ++ int i, err = 0; + + __get_user_error(magic, &frame->magic, err); + __get_user_error(size, &frame->size, err); +@@ -264,12 +287,14 @@ static int compat_restore_vfp_context(st + if (magic != VFP_MAGIC || size != VFP_STORAGE_SIZE) + return -EINVAL; + +- /* +- * Copy the FP registers into the start of the fpsimd_state. +- * FIXME: Won't work if big endian. +- */ +- err |= __copy_from_user(fpsimd.vregs, frame->ufp.fpregs, +- sizeof(frame->ufp.fpregs)); ++ /* Copy the FP registers into the start of the fpsimd_state. */ ++ for (i = 0; i < ARRAY_SIZE(frame->ufp.fpregs); i += 2) { ++ union __fpsimd_vreg vreg; ++ ++ __get_user_error(vreg.lo, &frame->ufp.fpregs[i], err); ++ __get_user_error(vreg.hi, &frame->ufp.fpregs[i + 1], err); ++ fpsimd.vregs[i >> 1] = vreg.raw; ++ } + + /* Extract the fpsr and the fpcr from the fpscr */ + __get_user_error(fpscr, &frame->ufp.fpscr, err); diff --git a/queue-3.14/arm64-errata-add-module-build-workaround-for-erratum-843419.patch b/queue-3.14/arm64-errata-add-module-build-workaround-for-erratum-843419.patch new file mode 100644 index 00000000000..7330eae477e --- /dev/null +++ b/queue-3.14/arm64-errata-add-module-build-workaround-for-erratum-843419.patch @@ -0,0 +1,88 @@ +From df057cc7b4fa59e9b55f07ffdb6c62bf02e99a00 Mon Sep 17 00:00:00 2001 +From: Will Deacon +Date: Tue, 17 Mar 2015 12:15:02 +0000 +Subject: arm64: errata: add module build workaround for erratum #843419 + +From: Will Deacon + +commit df057cc7b4fa59e9b55f07ffdb6c62bf02e99a00 upstream. + +Cortex-A53 processors <= r0p4 are affected by erratum #843419 which can +lead to a memory access using an incorrect address in certain sequences +headed by an ADRP instruction. + +There is a linker fix to generate veneers for ADRP instructions, but +this doesn't work for kernel modules which are built as unlinked ELF +objects. + +This patch adds a new config option for the erratum which, when enabled, +builds kernel modules with the mcmodel=large flag. This uses absolute +addressing for all kernel symbols, thereby removing the use of ADRP as +a PC-relative form of addressing. The ADRP relocs are removed from the +module loader so that we fail to load any potentially affected modules. + +Acked-by: Catalin Marinas +Signed-off-by: Will Deacon +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm64/Kconfig | 16 ++++++++++++++++ + arch/arm64/Makefile | 4 ++++ + arch/arm64/kernel/module.c | 2 ++ + 3 files changed, 22 insertions(+) + +--- a/arch/arm64/Kconfig ++++ b/arch/arm64/Kconfig +@@ -306,6 +306,22 @@ menu "CPU Power Management" + + source "drivers/cpuidle/Kconfig" + ++config ARM64_ERRATUM_843419 ++ bool "Cortex-A53: 843419: A load or store might access an incorrect address" ++ depends on MODULES ++ default y ++ help ++ This option builds kernel modules using the large memory model in ++ order to avoid the use of the ADRP instruction, which can cause ++ a subsequent memory access to use an incorrect address on Cortex-A53 ++ parts up to r0p4. ++ ++ Note that the kernel itself must be linked with a version of ld ++ which fixes potentially affected ADRP instructions through the ++ use of veneers. ++ ++ If unsure, say Y. ++ + endmenu + + source "net/Kconfig" +--- a/arch/arm64/Makefile ++++ b/arch/arm64/Makefile +@@ -34,6 +34,10 @@ comma = , + + CHECKFLAGS += -D__aarch64__ + ++ifeq ($(CONFIG_ARM64_ERRATUM_843419), y) ++CFLAGS_MODULE += -mcmodel=large ++endif ++ + # Default value + head-y := arch/arm64/kernel/head.o + +--- a/arch/arm64/kernel/module.c ++++ b/arch/arm64/kernel/module.c +@@ -330,12 +330,14 @@ int apply_relocate_add(Elf64_Shdr *sechd + ovf = reloc_insn_imm(RELOC_OP_PREL, loc, val, 0, 21, + AARCH64_INSN_IMM_ADR); + break; ++#ifndef CONFIG_ARM64_ERRATUM_843419 + case R_AARCH64_ADR_PREL_PG_HI21_NC: + overflow_check = false; + case R_AARCH64_ADR_PREL_PG_HI21: + ovf = reloc_insn_imm(RELOC_OP_PAGE, loc, val, 12, 21, + AARCH64_INSN_IMM_ADR); + break; ++#endif + case R_AARCH64_ADD_ABS_LO12_NC: + case R_AARCH64_LDST8_ABS_LO12_NC: + overflow_check = false; diff --git a/queue-3.14/arm64-head.s-initialise-mdcr_el2-in-el2_setup.patch b/queue-3.14/arm64-head.s-initialise-mdcr_el2-in-el2_setup.patch new file mode 100644 index 00000000000..2cabba20321 --- /dev/null +++ b/queue-3.14/arm64-head.s-initialise-mdcr_el2-in-el2_setup.patch @@ -0,0 +1,38 @@ +From d10bcd473301888f957ec4b6b12aa3621be78d59 Mon Sep 17 00:00:00 2001 +From: Will Deacon +Date: Wed, 2 Sep 2015 18:49:28 +0100 +Subject: arm64: head.S: initialise mdcr_el2 in el2_setup + +From: Will Deacon + +commit d10bcd473301888f957ec4b6b12aa3621be78d59 upstream. + +When entering the kernel at EL2, we fail to initialise the MDCR_EL2 +register which controls debug access and PMU capabilities at EL1. + +This patch ensures that the register is initialised so that all traps +are disabled and all the PMU counters are available to the host. When a +guest is scheduled, KVM takes care to configure trapping appropriately. + +Acked-by: Marc Zyngier +Signed-off-by: Will Deacon +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm64/kernel/head.S | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/arch/arm64/kernel/head.S ++++ b/arch/arm64/kernel/head.S +@@ -203,6 +203,11 @@ CPU_LE( movk x0, #0x30d0, lsl #16 ) // C + msr hstr_el2, xzr // Disable CP15 traps to EL2 + #endif + ++ /* EL2 debug */ ++ mrs x0, pmcr_el0 // Disable debug access traps ++ ubfx x0, x0, #11, #5 // to EL2 and allow access to ++ msr mdcr_el2, x0 // all PMU counters from EL1 ++ + /* Stage-2 translation */ + msr vttbr_el2, xzr + diff --git a/queue-3.14/arm64-kconfig-move-list_poison-to-a-safe-value.patch b/queue-3.14/arm64-kconfig-move-list_poison-to-a-safe-value.patch new file mode 100644 index 00000000000..4a97b084363 --- /dev/null +++ b/queue-3.14/arm64-kconfig-move-list_poison-to-a-safe-value.patch @@ -0,0 +1,35 @@ +From bf0c4e04732479f650ff59d1ee82de761c0071f0 Mon Sep 17 00:00:00 2001 +From: Jeff Vander Stoep +Date: Tue, 18 Aug 2015 20:50:10 +0100 +Subject: arm64: kconfig: Move LIST_POISON to a safe value + +From: Jeff Vander Stoep + +commit bf0c4e04732479f650ff59d1ee82de761c0071f0 upstream. + +Move the poison pointer offset to 0xdead000000000000, a +recognized value that is not mappable by user-space exploits. + +Acked-by: Catalin Marinas +Signed-off-by: Thierry Strudel +Signed-off-by: Jeff Vander Stoep +Signed-off-by: Will Deacon +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm64/Kconfig | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/arch/arm64/Kconfig ++++ b/arch/arm64/Kconfig +@@ -68,6 +68,10 @@ config NO_IOPORT + config STACKTRACE_SUPPORT + def_bool y + ++config ILLEGAL_POINTER_VALUE ++ hex ++ default 0xdead000000000000 ++ + config LOCKDEP_SUPPORT + def_bool y + diff --git a/queue-3.14/arm64-kvm-disable-virtual-timer-even-if-the-guest-is-not-using-it.patch b/queue-3.14/arm64-kvm-disable-virtual-timer-even-if-the-guest-is-not-using-it.patch new file mode 100644 index 00000000000..95889c213cb --- /dev/null +++ b/queue-3.14/arm64-kvm-disable-virtual-timer-even-if-the-guest-is-not-using-it.patch @@ -0,0 +1,46 @@ +From c4cbba9fa078f55d9f6d081dbb4aec7cf969e7c7 Mon Sep 17 00:00:00 2001 +From: Marc Zyngier +Date: Wed, 16 Sep 2015 16:18:59 +0100 +Subject: arm64: KVM: Disable virtual timer even if the guest is not using it + +From: Marc Zyngier + +commit c4cbba9fa078f55d9f6d081dbb4aec7cf969e7c7 upstream. + +When running a guest with the architected timer disabled (with QEMU and +the kernel_irqchip=off option, for example), it is important to make +sure the timer gets turned off. Otherwise, the guest may try to +enable it anyway, leading to a screaming HW interrupt. + +The fix is to unconditionally turn off the virtual timer on guest +exit. + +Reviewed-by: Christoffer Dall +Signed-off-by: Marc Zyngier +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm64/kvm/hyp.S | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +--- a/arch/arm64/kvm/hyp.S ++++ b/arch/arm64/kvm/hyp.S +@@ -485,8 +485,6 @@ CPU_BE( rev w5, w5 ) + mrs x3, cntv_ctl_el0 + and x3, x3, #3 + str w3, [x0, #VCPU_TIMER_CNTV_CTL] +- bic x3, x3, #1 // Clear Enable +- msr cntv_ctl_el0, x3 + + isb + +@@ -494,6 +492,9 @@ CPU_BE( rev w5, w5 ) + str x3, [x0, #VCPU_TIMER_CNTV_CVAL] + + 1: ++ // Disable the virtual timer ++ msr cntv_ctl_el0, xzr ++ + // Allow physical timer/counter access for the host + mrs x2, cnthctl_el2 + orr x2, x2, #3 diff --git a/queue-3.14/input-evdev-do-not-report-errors-form-flush.patch b/queue-3.14/input-evdev-do-not-report-errors-form-flush.patch new file mode 100644 index 00000000000..8d4cb3e87da --- /dev/null +++ b/queue-3.14/input-evdev-do-not-report-errors-form-flush.patch @@ -0,0 +1,64 @@ +From eb38f3a4f6e86f8bb10a3217ebd85ecc5d763aae Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Thu, 3 Sep 2015 22:20:00 -0700 +Subject: Input: evdev - do not report errors form flush() + +From: Takashi Iwai + +commit eb38f3a4f6e86f8bb10a3217ebd85ecc5d763aae upstream. + +We've got bug reports showing the old systemd-logind (at least +system-210) aborting unexpectedly, and this turned out to be because +of an invalid error code from close() call to evdev devices. close() +is supposed to return only either EINTR or EBADFD, while the device +returned ENODEV. logind was overreacting to it and decided to kill +itself when an unexpected error code was received. What a tragedy. + +The bad error code comes from flush fops, and actually evdev_flush() +returns ENODEV when device is disconnected or client's access to it is +revoked. But in these cases the fact that flush did not actually happen is +not an error, but rather normal behavior. For non-disconnected devices +result of flush is also not that interesting as there is no potential of +data loss and even if it fails application has no way of handling the +error. Because of that we are better off always returning success from +evdev_flush(). + +Also returning EINTR from flush()/close() is discouraged (as it is not +clear how application should handle this error), so let's stop taking +evdev->mutex interruptibly. + +Bugzilla: http://bugzilla.suse.com/show_bug.cgi?id=939834 +Signed-off-by: Takashi Iwai +Signed-off-by: Dmitry Torokhov +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/input/evdev.c | 13 ++++--------- + 1 file changed, 4 insertions(+), 9 deletions(-) + +--- a/drivers/input/evdev.c ++++ b/drivers/input/evdev.c +@@ -240,19 +240,14 @@ static int evdev_flush(struct file *file + { + struct evdev_client *client = file->private_data; + struct evdev *evdev = client->evdev; +- int retval; + +- retval = mutex_lock_interruptible(&evdev->mutex); +- if (retval) +- return retval; ++ mutex_lock(&evdev->mutex); + +- if (!evdev->exist || client->revoked) +- retval = -ENODEV; +- else +- retval = input_flush_device(&evdev->handle, file); ++ if (evdev->exist && !client->revoked) ++ input_flush_device(&evdev->handle, file); + + mutex_unlock(&evdev->mutex); +- return retval; ++ return 0; + } + + static void evdev_free(struct device *dev) diff --git a/queue-3.14/input-synaptics-fix-handling-of-disabling-gesture-mode.patch b/queue-3.14/input-synaptics-fix-handling-of-disabling-gesture-mode.patch new file mode 100644 index 00000000000..727c3e5e719 --- /dev/null +++ b/queue-3.14/input-synaptics-fix-handling-of-disabling-gesture-mode.patch @@ -0,0 +1,57 @@ +From e51e38494a8ecc18650efb0c840600637891de2c Mon Sep 17 00:00:00 2001 +From: Dmitry Torokhov +Date: Thu, 20 Aug 2015 14:28:48 -0700 +Subject: Input: synaptics - fix handling of disabling gesture mode + +From: Dmitry Torokhov + +commit e51e38494a8ecc18650efb0c840600637891de2c upstream. + +Bit 2 of the mode byte has dual meaning: it can disable reporting of +gestures when touchpad works in Relative mode or normal Absolute mode, +or it can enable so called Extended W-Mode when touchpad uses enhanced +Absolute mode (W-mode). The extended W-Mode confuses our driver and +causes missing button presses on some Thinkpads (x250, T450s), so let's +make sure we do not enable it. + +Also, according to the spec W mode "... bit is defined only in Absolute +mode on pads whose capExtended capability bit is set. In Relative mode and +in TouchPads without this capability, the bit is reserved and should be +left at 0.", so let's make sure we respect this requirement as well. + +Reported-by: Nick Bowler +Suggested-by: Gabor Balla +Tested-by: Gabor Balla +Tested-by: Nick Bowler +Signed-off-by: Dmitry Torokhov +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/input/mouse/synaptics.c | 12 ++++++++---- + 1 file changed, 8 insertions(+), 4 deletions(-) + +--- a/drivers/input/mouse/synaptics.c ++++ b/drivers/input/mouse/synaptics.c +@@ -447,14 +447,18 @@ static int synaptics_set_mode(struct psm + struct synaptics_data *priv = psmouse->private; + + priv->mode = 0; +- if (priv->absolute_mode) ++ ++ if (priv->absolute_mode) { + priv->mode |= SYN_BIT_ABSOLUTE_MODE; +- if (priv->disable_gesture) ++ if (SYN_CAP_EXTENDED(priv->capabilities)) ++ priv->mode |= SYN_BIT_W_MODE; ++ } ++ ++ if (!SYN_MODE_WMODE(priv->mode) && priv->disable_gesture) + priv->mode |= SYN_BIT_DISABLE_GESTURE; ++ + if (psmouse->rate >= 80) + priv->mode |= SYN_BIT_HIGH_RATE; +- if (SYN_CAP_EXTENDED(priv->capabilities)) +- priv->mode |= SYN_BIT_W_MODE; + + if (synaptics_mode_cmd(psmouse, priv->mode)) + return -1; diff --git a/queue-3.14/series b/queue-3.14/series index d1230ef554d..38c943d0624 100644 --- a/queue-3.14/series +++ b/queue-3.14/series @@ -3,3 +3,12 @@ unshare-unsharing-a-thread-does-not-require-unsharing-a-vm.patch rtlwifi-rtl8192cu-add-new-device-id.patch tg3-fix-temperature-reporting.patch mac80211-enable-assoc-check-for-mesh-interfaces.patch +arm64-kconfig-move-list_poison-to-a-safe-value.patch +arm64-compat-fix-vfp-save-restore-across-signal-handlers-in-big-endian.patch +arm64-head.s-initialise-mdcr_el2-in-el2_setup.patch +arm64-errata-add-module-build-workaround-for-erratum-843419.patch +arm64-kvm-disable-virtual-timer-even-if-the-guest-is-not-using-it.patch +input-synaptics-fix-handling-of-disabling-gesture-mode.patch +input-evdev-do-not-report-errors-form-flush.patch +alsa-hda-enable-headphone-jack-detect-on-old-fujitsu-laptops.patch +alsa-hda-use-alc880_fixup_fujitsu-for-fsc-amilo-m1437.patch