From: Joao Martins Date: Tue, 19 Jul 2022 17:00:04 +0000 (+0100) Subject: hw/i386: add 4g boundary start to X86MachineState X-Git-Tag: v7.1.0-rc0~1^2~11 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=4ab4c33014b4876bc6d7888efecd6bfcca0d045a;p=thirdparty%2Fqemu.git hw/i386: add 4g boundary start to X86MachineState Rather than hardcoding the 4G boundary everywhere, introduce a X86MachineState field @above_4g_mem_start and use it accordingly. This is in preparation for relocating ram-above-4g to be dynamically start at 1T on AMD platforms. Signed-off-by: Joao Martins Reviewed-by: Igor Mammedov Message-Id: <20220719170014.27028-2-joao.m.martins@oracle.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index cad6f5ac41e..0355bd3ddaa 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -2024,7 +2024,7 @@ build_srat(GArray *table_data, BIOSLinker *linker, MachineState *machine) build_srat_memory(table_data, mem_base, mem_len, i - 1, MEM_AFFINITY_ENABLED); } - mem_base = 1ULL << 32; + mem_base = x86ms->above_4g_mem_start; mem_len = next_base - x86ms->below_4g_mem_size; next_base = mem_base + mem_len; } diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 46ab1dcb47b..13b68307beb 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -850,9 +850,10 @@ void pc_memory_init(PCMachineState *pcms, machine->ram, x86ms->below_4g_mem_size, x86ms->above_4g_mem_size); - memory_region_add_subregion(system_memory, 0x100000000ULL, + memory_region_add_subregion(system_memory, x86ms->above_4g_mem_start, ram_above_4g); - e820_add_entry(0x100000000ULL, x86ms->above_4g_mem_size, E820_RAM); + e820_add_entry(x86ms->above_4g_mem_start, x86ms->above_4g_mem_size, + E820_RAM); } if (pcms->sgx_epc.size != 0) { @@ -893,7 +894,7 @@ void pc_memory_init(PCMachineState *pcms, machine->device_memory->base = sgx_epc_above_4g_end(&pcms->sgx_epc); } else { machine->device_memory->base = - 0x100000000ULL + x86ms->above_4g_mem_size; + x86ms->above_4g_mem_start + x86ms->above_4g_mem_size; } machine->device_memory->base = @@ -927,7 +928,7 @@ void pc_memory_init(PCMachineState *pcms, } else if (pcms->sgx_epc.size != 0) { cxl_base = sgx_epc_above_4g_end(&pcms->sgx_epc); } else { - cxl_base = 0x100000000ULL + x86ms->above_4g_mem_size; + cxl_base = x86ms->above_4g_mem_start + x86ms->above_4g_mem_size; } e820_add_entry(cxl_base, cxl_size, E820_RESERVED); @@ -1035,7 +1036,7 @@ uint64_t pc_pci_hole64_start(void) } else if (pcms->sgx_epc.size != 0) { hole64_start = sgx_epc_above_4g_end(&pcms->sgx_epc); } else { - hole64_start = 0x100000000ULL + x86ms->above_4g_mem_size; + hole64_start = x86ms->above_4g_mem_start + x86ms->above_4g_mem_size; } return ROUND_UP(hole64_start, 1 * GiB); diff --git a/hw/i386/sgx.c b/hw/i386/sgx.c index a44d66ba2af..09d9c7c73d9 100644 --- a/hw/i386/sgx.c +++ b/hw/i386/sgx.c @@ -295,7 +295,7 @@ void pc_machine_init_sgx_epc(PCMachineState *pcms) return; } - sgx_epc->base = 0x100000000ULL + x86ms->above_4g_mem_size; + sgx_epc->base = x86ms->above_4g_mem_start + x86ms->above_4g_mem_size; memory_region_init(&sgx_epc->mr, OBJECT(pcms), "sgx-epc", UINT64_MAX); memory_region_add_subregion(get_system_memory(), sgx_epc->base, diff --git a/hw/i386/x86.c b/hw/i386/x86.c index ecea25d2497..050eedc0c8e 100644 --- a/hw/i386/x86.c +++ b/hw/i386/x86.c @@ -1391,6 +1391,7 @@ static void x86_machine_initfn(Object *obj) x86ms->oem_id = g_strndup(ACPI_BUILD_APPNAME6, 6); x86ms->oem_table_id = g_strndup(ACPI_BUILD_APPNAME8, 8); x86ms->bus_lock_ratelimit = 0; + x86ms->above_4g_mem_start = 4 * GiB; } static void x86_machine_class_init(ObjectClass *oc, void *data) diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h index 6bdf1f6ab2d..62fa5774f84 100644 --- a/include/hw/i386/x86.h +++ b/include/hw/i386/x86.h @@ -56,6 +56,9 @@ struct X86MachineState { /* RAM information (sizes, addresses, configuration): */ ram_addr_t below_4g_mem_size, above_4g_mem_size; + /* Start address of the initial RAM above 4G */ + uint64_t above_4g_mem_start; + /* CPU and apic information: */ bool apic_xrupt_override; unsigned pci_irq_mask;