From: Sasha Levin Date: Wed, 11 Dec 2024 18:37:01 +0000 (-0500) Subject: Fixes for 6.12 X-Git-Tag: v5.4.287~69 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=4b4ccc7607169dd7892142fefc668da5e64f6ac0;p=thirdparty%2Fkernel%2Fstable-queue.git Fixes for 6.12 Signed-off-by: Sasha Levin --- diff --git a/queue-6.12/drm-amd-display-add-option-to-retrieve-detile-buffer.patch b/queue-6.12/drm-amd-display-add-option-to-retrieve-detile-buffer.patch new file mode 100644 index 00000000000..e9d81968763 --- /dev/null +++ b/queue-6.12/drm-amd-display-add-option-to-retrieve-detile-buffer.patch @@ -0,0 +1,193 @@ +From c83631c637e5b2e527eb9003a5398fb4706a5b8a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 14 Nov 2024 14:18:13 -0500 +Subject: drm/amd/display: Add option to retrieve detile buffer size + +From: Sung Lee + +[ Upstream commit 6a7fd76b949efe40fb6d6677f480e624e0cb6e40 ] + +[WHY] +For better power profiling knowing the detile +buffer size at a given point in time +would be useful. + +[HOW] +Add interface to retrieve detile buffer from +dc state. + +Cc: Mario Limonciello +Cc: Alex Deucher +Cc: stable@vger.kernel.org +Reviewed-by: Aric Cyr +Signed-off-by: Sung Lee +Signed-off-by: Alex Hung +Tested-by: Daniel Wheeler +Signed-off-by: Alex Deucher +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/amd/display/dc/core/dc.c | 18 ++++++++++++++++++ + drivers/gpu/drm/amd/display/dc/dc.h | 2 ++ + .../gpu/drm/amd/display/dc/inc/core_types.h | 1 + + .../display/dc/resource/dcn31/dcn31_resource.c | 7 +++++++ + .../display/dc/resource/dcn31/dcn31_resource.h | 3 +++ + .../dc/resource/dcn314/dcn314_resource.c | 1 + + .../dc/resource/dcn315/dcn315_resource.c | 1 + + .../dc/resource/dcn316/dcn316_resource.c | 1 + + .../display/dc/resource/dcn35/dcn35_resource.c | 1 + + .../dc/resource/dcn351/dcn351_resource.c | 1 + + 10 files changed, 36 insertions(+) + +diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c +index 1d99ab233765f..dbf6724c34777 100644 +--- a/drivers/gpu/drm/amd/display/dc/core/dc.c ++++ b/drivers/gpu/drm/amd/display/dc/core/dc.c +@@ -6013,3 +6013,21 @@ struct dc_power_profile dc_get_power_profile_for_dc_state(const struct dc_state + + return profile; + } ++ ++/* ++ ********************************************************************************** ++ * dc_get_det_buffer_size_from_state() - extracts detile buffer size from dc state ++ * ++ * Called when DM wants to log detile buffer size from dc_state ++ * ++ ********************************************************************************** ++ */ ++unsigned int dc_get_det_buffer_size_from_state(const struct dc_state *context) ++{ ++ struct dc *dc = context->clk_mgr->ctx->dc; ++ ++ if (dc->res_pool->funcs->get_det_buffer_size) ++ return dc->res_pool->funcs->get_det_buffer_size(context); ++ else ++ return 0; ++} +diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h +index 25385aa09ed5d..7c163aa7e8bd2 100644 +--- a/drivers/gpu/drm/amd/display/dc/dc.h ++++ b/drivers/gpu/drm/amd/display/dc/dc.h +@@ -2544,6 +2544,8 @@ struct dc_power_profile { + + struct dc_power_profile dc_get_power_profile_for_dc_state(const struct dc_state *context); + ++unsigned int dc_get_det_buffer_size_from_state(const struct dc_state *context); ++ + /* DSC Interfaces */ + #include "dc_dsc.h" + +diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h b/drivers/gpu/drm/amd/display/dc/inc/core_types.h +index 8597e866bfe6b..3061dca47dd2f 100644 +--- a/drivers/gpu/drm/amd/display/dc/inc/core_types.h ++++ b/drivers/gpu/drm/amd/display/dc/inc/core_types.h +@@ -219,6 +219,7 @@ struct resource_funcs { + * Get indicator of power from a context that went through full validation + */ + int (*get_power_profile)(const struct dc_state *context); ++ unsigned int (*get_det_buffer_size)(const struct dc_state *context); + }; + + struct audio_support{ +diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c +index ac8cb20e2e3b6..80386f698ae4d 100644 +--- a/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c +@@ -1721,6 +1721,12 @@ int dcn31_populate_dml_pipes_from_context( + return pipe_cnt; + } + ++unsigned int dcn31_get_det_buffer_size( ++ const struct dc_state *context) ++{ ++ return context->bw_ctx.dml.ip.det_buffer_size_kbytes; ++} ++ + void dcn31_calculate_wm_and_dlg( + struct dc *dc, struct dc_state *context, + display_e2e_pipe_params_st *pipes, +@@ -1843,6 +1849,7 @@ static struct resource_funcs dcn31_res_pool_funcs = { + .update_bw_bounding_box = dcn31_update_bw_bounding_box, + .patch_unknown_plane_state = dcn20_patch_unknown_plane_state, + .get_panel_config_defaults = dcn31_get_panel_config_defaults, ++ .get_det_buffer_size = dcn31_get_det_buffer_size, + }; + + static struct clock_source *dcn30_clock_source_create( +diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.h b/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.h +index 901436591ed45..551ad912f7bea 100644 +--- a/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.h ++++ b/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.h +@@ -63,6 +63,9 @@ struct resource_pool *dcn31_create_resource_pool( + const struct dc_init_data *init_data, + struct dc *dc); + ++unsigned int dcn31_get_det_buffer_size( ++ const struct dc_state *context); ++ + /*temp: B0 specific before switch to dcn313 headers*/ + #ifndef regPHYPLLF_PIXCLK_RESYNC_CNTL + #define regPHYPLLF_PIXCLK_RESYNC_CNTL 0x007e +diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c +index 169924d0a8393..01d95108ce662 100644 +--- a/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c +@@ -1778,6 +1778,7 @@ static struct resource_funcs dcn314_res_pool_funcs = { + .patch_unknown_plane_state = dcn20_patch_unknown_plane_state, + .get_panel_config_defaults = dcn314_get_panel_config_defaults, + .get_preferred_eng_id_dpia = dcn314_get_preferred_eng_id_dpia, ++ .get_det_buffer_size = dcn31_get_det_buffer_size, + }; + + static struct clock_source *dcn30_clock_source_create( +diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c +index f6b840f046a5d..d85356b7fe419 100644 +--- a/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c +@@ -1846,6 +1846,7 @@ static struct resource_funcs dcn315_res_pool_funcs = { + .patch_unknown_plane_state = dcn20_patch_unknown_plane_state, + .get_panel_config_defaults = dcn315_get_panel_config_defaults, + .get_power_profile = dcn315_get_power_profile, ++ .get_det_buffer_size = dcn31_get_det_buffer_size, + }; + + static bool dcn315_resource_construct( +diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c +index 5fd52c5fcee45..af82e13029c9e 100644 +--- a/drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c +@@ -1720,6 +1720,7 @@ static struct resource_funcs dcn316_res_pool_funcs = { + .update_bw_bounding_box = dcn316_update_bw_bounding_box, + .patch_unknown_plane_state = dcn20_patch_unknown_plane_state, + .get_panel_config_defaults = dcn316_get_panel_config_defaults, ++ .get_det_buffer_size = dcn31_get_det_buffer_size, + }; + + static bool dcn316_resource_construct( +diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c +index ed3238edaf791..d0c4693c12241 100644 +--- a/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c +@@ -1779,6 +1779,7 @@ static struct resource_funcs dcn35_res_pool_funcs = { + .patch_unknown_plane_state = dcn20_patch_unknown_plane_state, + .get_panel_config_defaults = dcn35_get_panel_config_defaults, + .get_preferred_eng_id_dpia = dcn35_get_preferred_eng_id_dpia, ++ .get_det_buffer_size = dcn31_get_det_buffer_size, + }; + + static bool dcn35_resource_construct( +diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c +index c274861e83c73..575c0aa12229c 100644 +--- a/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c +@@ -1758,6 +1758,7 @@ static struct resource_funcs dcn351_res_pool_funcs = { + .patch_unknown_plane_state = dcn20_patch_unknown_plane_state, + .get_panel_config_defaults = dcn35_get_panel_config_defaults, + .get_preferred_eng_id_dpia = dcn351_get_preferred_eng_id_dpia, ++ .get_det_buffer_size = dcn31_get_det_buffer_size, + }; + + static bool dcn351_resource_construct( +-- +2.43.0 + diff --git a/queue-6.12/drm-amd-display-update-interface-to-check-uclk-dpm.patch b/queue-6.12/drm-amd-display-update-interface-to-check-uclk-dpm.patch new file mode 100644 index 00000000000..685e45b9de5 --- /dev/null +++ b/queue-6.12/drm-amd-display-update-interface-to-check-uclk-dpm.patch @@ -0,0 +1,144 @@ +From 10d5cb645fd0f484fe66b807af6f0a5bf312a5f0 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 10 Sep 2024 16:41:20 -0400 +Subject: drm/amd/display: Update Interface to Check UCLK DPM + +From: Austin Zheng + +[ Upstream commit b8d046985c2dc41a0e264a391da4606099f8d44f ] + +[Why] +Videos using YUV420 format may result in high power being used. +Disabling MPO may result in lower power usage. +Update interface that can be used to check power profile of a dc_state. + +[How] +Allow pstate switching in VBlank as last entry in strategy candidates. +Add helper functions that can be used to determine power level: +-get power profile after a dc_state has undergone full validation + +Reviewed-by: Aric Cyr +Signed-off-by: Austin Zheng +Signed-off-by: Aurabindo Pillai +Tested-by: Daniel Wheeler +Signed-off-by: Alex Deucher +Stable-dep-of: 6a7fd76b949e ("drm/amd/display: Add option to retrieve detile buffer size") +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/amd/display/dc/core/dc.c | 9 ++++++++- + .../dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c | 1 + + drivers/gpu/drm/amd/display/dc/inc/core_types.h | 4 ++++ + .../dc/resource/dcn315/dcn315_resource.c | 6 ++++++ + .../dc/resource/dcn401/dcn401_resource.c | 17 +++++++++++++++++ + 5 files changed, 36 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c +index a6911bb2cf0c6..1d99ab233765f 100644 +--- a/drivers/gpu/drm/amd/display/dc/core/dc.c ++++ b/drivers/gpu/drm/amd/display/dc/core/dc.c +@@ -6001,8 +6001,15 @@ void dc_set_edp_power(const struct dc *dc, struct dc_link *edp_link, + struct dc_power_profile dc_get_power_profile_for_dc_state(const struct dc_state *context) + { + struct dc_power_profile profile = { 0 }; ++ struct dc *dc = NULL; + +- profile.power_level += !context->bw_ctx.bw.dcn.clk.p_state_change_support; ++ if (!context || !context->clk_mgr || !context->clk_mgr->ctx || !context->clk_mgr->ctx->dc) ++ return profile; ++ ++ dc = context->clk_mgr->ctx->dc; ++ ++ if (dc->res_pool->funcs->get_power_profile) ++ profile.power_level = dc->res_pool->funcs->get_power_profile(context); + + return profile; + } +diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c +index dd9971867f749..720ecede3a4c0 100644 +--- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c ++++ b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c +@@ -1799,6 +1799,7 @@ bool pmo_dcn4_fams2_init_for_pstate_support(struct dml2_pmo_init_for_pstate_supp + } + + if (s->pmo_dcn4.num_pstate_candidates > 0) { ++ s->pmo_dcn4.pstate_strategy_candidates[s->pmo_dcn4.num_pstate_candidates-1].allow_state_increase = true; + s->pmo_dcn4.cur_pstate_candidate = -1; + return true; + } else { +diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h b/drivers/gpu/drm/amd/display/dc/inc/core_types.h +index bfb8b8502d202..8597e866bfe6b 100644 +--- a/drivers/gpu/drm/amd/display/dc/inc/core_types.h ++++ b/drivers/gpu/drm/amd/display/dc/inc/core_types.h +@@ -215,6 +215,10 @@ struct resource_funcs { + + void (*get_panel_config_defaults)(struct dc_panel_config *panel_config); + void (*build_pipe_pix_clk_params)(struct pipe_ctx *pipe_ctx); ++ /* ++ * Get indicator of power from a context that went through full validation ++ */ ++ int (*get_power_profile)(const struct dc_state *context); + }; + + struct audio_support{ +diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c +index 3f4b9dba41124..f6b840f046a5d 100644 +--- a/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c +@@ -1812,6 +1812,11 @@ static void dcn315_get_panel_config_defaults(struct dc_panel_config *panel_confi + *panel_config = panel_config_defaults; + } + ++static int dcn315_get_power_profile(const struct dc_state *context) ++{ ++ return !context->bw_ctx.bw.dcn.clk.p_state_change_support; ++} ++ + static struct dc_cap_funcs cap_funcs = { + .get_dcc_compression_cap = dcn20_get_dcc_compression_cap + }; +@@ -1840,6 +1845,7 @@ static struct resource_funcs dcn315_res_pool_funcs = { + .update_bw_bounding_box = dcn315_update_bw_bounding_box, + .patch_unknown_plane_state = dcn20_patch_unknown_plane_state, + .get_panel_config_defaults = dcn315_get_panel_config_defaults, ++ .get_power_profile = dcn315_get_power_profile, + }; + + static bool dcn315_resource_construct( +diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c +index 4aa975418fb18..6bcc6c400b386 100644 +--- a/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c +@@ -1688,6 +1688,22 @@ static void dcn401_build_pipe_pix_clk_params(struct pipe_ctx *pipe_ctx) + } + } + ++static int dcn401_get_power_profile(const struct dc_state *context) ++{ ++ int uclk_mhz = context->bw_ctx.bw.dcn.clk.dramclk_khz / 1000; ++ int dpm_level = 0; ++ ++ for (int i = 0; i < context->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_memclk_levels; i++) { ++ if (context->clk_mgr->bw_params->clk_table.entries[i].memclk_mhz == 0 || ++ uclk_mhz < context->clk_mgr->bw_params->clk_table.entries[i].memclk_mhz) ++ break; ++ if (uclk_mhz > context->clk_mgr->bw_params->clk_table.entries[i].memclk_mhz) ++ dpm_level++; ++ } ++ ++ return dpm_level; ++} ++ + static struct resource_funcs dcn401_res_pool_funcs = { + .destroy = dcn401_destroy_resource_pool, + .link_enc_create = dcn401_link_encoder_create, +@@ -1714,6 +1730,7 @@ static struct resource_funcs dcn401_res_pool_funcs = { + .prepare_mcache_programming = dcn401_prepare_mcache_programming, + .build_pipe_pix_clk_params = dcn401_build_pipe_pix_clk_params, + .calculate_mall_ways_from_bytes = dcn32_calculate_mall_ways_from_bytes, ++ .get_power_profile = dcn401_get_power_profile, + }; + + static uint32_t read_pipe_fuses(struct dc_context *ctx) +-- +2.43.0 + diff --git a/queue-6.12/drm-xe-devcoredump-add-ascii85-dump-helper-function.patch b/queue-6.12/drm-xe-devcoredump-add-ascii85-dump-helper-function.patch new file mode 100644 index 00000000000..dcb8d6b51a1 --- /dev/null +++ b/queue-6.12/drm-xe-devcoredump-add-ascii85-dump-helper-function.patch @@ -0,0 +1,159 @@ +From 72af0090315faf08d7b55017c7f1eca92781896e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 2 Oct 2024 17:46:04 -0700 +Subject: drm/xe/devcoredump: Add ASCII85 dump helper function + +From: John Harrison + +[ Upstream commit ec1455ce7e35a31289d2dbc1070b980538698921 ] + +There is a need to include the GuC log and other large binary objects +in core dumps and via dmesg. So add a helper for dumping to a printer +function via conversion to ASCII85 encoding. + +Another issue with dumping such a large buffer is that it can be slow, +especially if dumping to dmesg over a serial port. So add a yield to +prevent the 'task has been stuck for 120s' kernel hang check feature +from firing. + +v2: Add a prefix to the output string. Fix memory allocation bug. +v3: Correct a string size calculation and clean up a define (review +feedback from Julia F). + +Signed-off-by: John Harrison +Reviewed-by: Julia Filipchuk +Link: https://patchwork.freedesktop.org/patch/msgid/20241003004611.2323493-5-John.C.Harrison@Intel.com +Stable-dep-of: 5dce85fecb87 ("drm/xe: Move the coredump registration to the worker thread") +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/xe/xe_devcoredump.c | 87 +++++++++++++++++++++++++++++ + drivers/gpu/drm/xe/xe_devcoredump.h | 6 ++ + 2 files changed, 93 insertions(+) + +diff --git a/drivers/gpu/drm/xe/xe_devcoredump.c b/drivers/gpu/drm/xe/xe_devcoredump.c +index 2690f1d1cde4c..0884c49942fe6 100644 +--- a/drivers/gpu/drm/xe/xe_devcoredump.c ++++ b/drivers/gpu/drm/xe/xe_devcoredump.c +@@ -6,6 +6,7 @@ + #include "xe_devcoredump.h" + #include "xe_devcoredump_types.h" + ++#include + #include + #include + +@@ -315,3 +316,89 @@ int xe_devcoredump_init(struct xe_device *xe) + } + + #endif ++ ++/** ++ * xe_print_blob_ascii85 - print a BLOB to some useful location in ASCII85 ++ * ++ * The output is split to multiple lines because some print targets, e.g. dmesg ++ * cannot handle arbitrarily long lines. Note also that printing to dmesg in ++ * piece-meal fashion is not possible, each separate call to drm_puts() has a ++ * line-feed automatically added! Therefore, the entire output line must be ++ * constructed in a local buffer first, then printed in one atomic output call. ++ * ++ * There is also a scheduler yield call to prevent the 'task has been stuck for ++ * 120s' kernel hang check feature from firing when printing to a slow target ++ * such as dmesg over a serial port. ++ * ++ * TODO: Add compression prior to the ASCII85 encoding to shrink huge buffers down. ++ * ++ * @p: the printer object to output to ++ * @prefix: optional prefix to add to output string ++ * @blob: the Binary Large OBject to dump out ++ * @offset: offset in bytes to skip from the front of the BLOB, must be a multiple of sizeof(u32) ++ * @size: the size in bytes of the BLOB, must be a multiple of sizeof(u32) ++ */ ++void xe_print_blob_ascii85(struct drm_printer *p, const char *prefix, ++ const void *blob, size_t offset, size_t size) ++{ ++ const u32 *blob32 = (const u32 *)blob; ++ char buff[ASCII85_BUFSZ], *line_buff; ++ size_t line_pos = 0; ++ ++#define DMESG_MAX_LINE_LEN 800 ++#define MIN_SPACE (ASCII85_BUFSZ + 2) /* 85 + "\n\0" */ ++ ++ if (size & 3) ++ drm_printf(p, "Size not word aligned: %zu", size); ++ if (offset & 3) ++ drm_printf(p, "Offset not word aligned: %zu", size); ++ ++ line_buff = kzalloc(DMESG_MAX_LINE_LEN, GFP_KERNEL); ++ if (IS_ERR_OR_NULL(line_buff)) { ++ drm_printf(p, "Failed to allocate line buffer: %pe", line_buff); ++ return; ++ } ++ ++ blob32 += offset / sizeof(*blob32); ++ size /= sizeof(*blob32); ++ ++ if (prefix) { ++ strscpy(line_buff, prefix, DMESG_MAX_LINE_LEN - MIN_SPACE - 2); ++ line_pos = strlen(line_buff); ++ ++ line_buff[line_pos++] = ':'; ++ line_buff[line_pos++] = ' '; ++ } ++ ++ while (size--) { ++ u32 val = *(blob32++); ++ ++ strscpy(line_buff + line_pos, ascii85_encode(val, buff), ++ DMESG_MAX_LINE_LEN - line_pos); ++ line_pos += strlen(line_buff + line_pos); ++ ++ if ((line_pos + MIN_SPACE) >= DMESG_MAX_LINE_LEN) { ++ line_buff[line_pos++] = '\n'; ++ line_buff[line_pos++] = 0; ++ ++ drm_puts(p, line_buff); ++ ++ line_pos = 0; ++ ++ /* Prevent 'stuck thread' time out errors */ ++ cond_resched(); ++ } ++ } ++ ++ if (line_pos) { ++ line_buff[line_pos++] = '\n'; ++ line_buff[line_pos++] = 0; ++ ++ drm_puts(p, line_buff); ++ } ++ ++ kfree(line_buff); ++ ++#undef MIN_SPACE ++#undef DMESG_MAX_LINE_LEN ++} +diff --git a/drivers/gpu/drm/xe/xe_devcoredump.h b/drivers/gpu/drm/xe/xe_devcoredump.h +index e2fa65ce09322..a4eebc285fc83 100644 +--- a/drivers/gpu/drm/xe/xe_devcoredump.h ++++ b/drivers/gpu/drm/xe/xe_devcoredump.h +@@ -6,6 +6,9 @@ + #ifndef _XE_DEVCOREDUMP_H_ + #define _XE_DEVCOREDUMP_H_ + ++#include ++ ++struct drm_printer; + struct xe_device; + struct xe_sched_job; + +@@ -23,4 +26,7 @@ static inline int xe_devcoredump_init(struct xe_device *xe) + } + #endif + ++void xe_print_blob_ascii85(struct drm_printer *p, const char *prefix, ++ const void *blob, size_t offset, size_t size); ++ + #endif +-- +2.43.0 + diff --git a/queue-6.12/drm-xe-devcoredump-improve-section-headings-and-add-.patch b/queue-6.12/drm-xe-devcoredump-improve-section-headings-and-add-.patch new file mode 100644 index 00000000000..1268588b1b5 --- /dev/null +++ b/queue-6.12/drm-xe-devcoredump-improve-section-headings-and-add-.patch @@ -0,0 +1,111 @@ +From cf1a7927f65ee9962e8de9edcc9059d5d1f5d006 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 2 Oct 2024 17:46:03 -0700 +Subject: drm/xe/devcoredump: Improve section headings and add tile info + +From: John Harrison + +[ Upstream commit c28fd6c358db44c87a1408f27ba412c94e25e6c2 ] + +The xe_guc_exec_queue_snapshot is not really a GuC internal thing and +is definitely not a GuC CT thing. So give it its own section heading. +The snapshot itself is really a capture of the submission backend's +internal state. Although all it currently prints out is the submission +contexts. So label it as 'Contexts'. If more general state is added +later then it could be change to 'Submission backend' or some such. + +Further, everything from the GuC CT section onwards is GT specific but +there was no indication of which GT it was related to (and that is +impossible to work out from the other fields that are given). So add a +GT section heading. Also include the tile id of the GT, because again +significant information. + +Lastly, drop a couple of unnecessary line feeds within sections. + +v2: Add GT section heading, add tile id to device section. + +Signed-off-by: John Harrison +Reviewed-by: Julia Filipchuk +Link: https://patchwork.freedesktop.org/patch/msgid/20241003004611.2323493-4-John.C.Harrison@Intel.com +Stable-dep-of: 5dce85fecb87 ("drm/xe: Move the coredump registration to the worker thread") +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/xe/xe_devcoredump.c | 5 +++++ + drivers/gpu/drm/xe/xe_devcoredump_types.h | 3 ++- + drivers/gpu/drm/xe/xe_device.c | 1 + + drivers/gpu/drm/xe/xe_guc_submit.c | 2 +- + drivers/gpu/drm/xe/xe_hw_engine.c | 1 - + 5 files changed, 9 insertions(+), 3 deletions(-) + +diff --git a/drivers/gpu/drm/xe/xe_devcoredump.c b/drivers/gpu/drm/xe/xe_devcoredump.c +index d23719d5c2a3d..2690f1d1cde4c 100644 +--- a/drivers/gpu/drm/xe/xe_devcoredump.c ++++ b/drivers/gpu/drm/xe/xe_devcoredump.c +@@ -96,8 +96,13 @@ static ssize_t __xe_devcoredump_read(char *buffer, size_t count, + drm_printf(&p, "Process: %s\n", ss->process_name); + xe_device_snapshot_print(xe, &p); + ++ drm_printf(&p, "\n**** GT #%d ****\n", ss->gt->info.id); ++ drm_printf(&p, "\tTile: %d\n", ss->gt->tile->id); ++ + drm_puts(&p, "\n**** GuC CT ****\n"); + xe_guc_ct_snapshot_print(ss->ct, &p); ++ ++ drm_puts(&p, "\n**** Contexts ****\n"); + xe_guc_exec_queue_snapshot_print(ss->ge, &p); + + drm_puts(&p, "\n**** Job ****\n"); +diff --git a/drivers/gpu/drm/xe/xe_devcoredump_types.h b/drivers/gpu/drm/xe/xe_devcoredump_types.h +index 440d05d77a5af..3cc2f095fdfbd 100644 +--- a/drivers/gpu/drm/xe/xe_devcoredump_types.h ++++ b/drivers/gpu/drm/xe/xe_devcoredump_types.h +@@ -37,7 +37,8 @@ struct xe_devcoredump_snapshot { + /* GuC snapshots */ + /** @ct: GuC CT snapshot */ + struct xe_guc_ct_snapshot *ct; +- /** @ge: Guc Engine snapshot */ ++ ++ /** @ge: GuC Submission Engine snapshot */ + struct xe_guc_submit_exec_queue_snapshot *ge; + + /** @hwe: HW Engine snapshot array */ +diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c +index a1987b554a8d2..bb85208cf1a94 100644 +--- a/drivers/gpu/drm/xe/xe_device.c ++++ b/drivers/gpu/drm/xe/xe_device.c +@@ -919,6 +919,7 @@ void xe_device_snapshot_print(struct xe_device *xe, struct drm_printer *p) + + for_each_gt(gt, xe, id) { + drm_printf(p, "GT id: %u\n", id); ++ drm_printf(p, "\tTile: %u\n", gt->tile->id); + drm_printf(p, "\tType: %s\n", + gt->info.type == XE_GT_TYPE_MAIN ? "main" : "media"); + drm_printf(p, "\tIP ver: %u.%u.%u\n", +diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c +index 2927745d68954..fed23304e4da5 100644 +--- a/drivers/gpu/drm/xe/xe_guc_submit.c ++++ b/drivers/gpu/drm/xe/xe_guc_submit.c +@@ -2193,7 +2193,7 @@ xe_guc_exec_queue_snapshot_print(struct xe_guc_submit_exec_queue_snapshot *snaps + if (!snapshot) + return; + +- drm_printf(p, "\nGuC ID: %d\n", snapshot->guc.id); ++ drm_printf(p, "GuC ID: %d\n", snapshot->guc.id); + drm_printf(p, "\tName: %s\n", snapshot->name); + drm_printf(p, "\tClass: %d\n", snapshot->class); + drm_printf(p, "\tLogical mask: 0x%x\n", snapshot->logical_mask); +diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c +index c9c3beb3ce8d0..547919e8ce9e4 100644 +--- a/drivers/gpu/drm/xe/xe_hw_engine.c ++++ b/drivers/gpu/drm/xe/xe_hw_engine.c +@@ -1053,7 +1053,6 @@ void xe_hw_engine_snapshot_print(struct xe_hw_engine_snapshot *snapshot, + if (snapshot->hwe->class == XE_ENGINE_CLASS_COMPUTE) + drm_printf(p, "\tRCU_MODE: 0x%08x\n", + snapshot->reg.rcu_mode); +- drm_puts(p, "\n"); + } + + /** +-- +2.43.0 + diff --git a/queue-6.12/drm-xe-devcoredump-update-handling-of-xe_force_wake_.patch b/queue-6.12/drm-xe-devcoredump-update-handling-of-xe_force_wake_.patch new file mode 100644 index 00000000000..8b38c1bc4e0 --- /dev/null +++ b/queue-6.12/drm-xe-devcoredump-update-handling-of-xe_force_wake_.patch @@ -0,0 +1,97 @@ +From baeaf1cd62d92588c9aa541a2fcba4ded872a0ef Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 14 Oct 2024 13:25:46 +0530 +Subject: drm/xe/devcoredump: Update handling of xe_force_wake_get return + +From: Himal Prasad Ghimiray + +[ Upstream commit 9ffd6ec2de08ef4ac5f17f6131d1db57613493f9 ] + +xe_force_wake_get() now returns the reference count-incremented domain +mask. If it fails for individual domains, the return value will always +be 0. However, for XE_FORCEWAKE_ALL, it may return a non-zero value even +in the event of failure. Use helper xe_force_wake_ref_has_domain to +verify all domains are initialized or not. Update the return handling of +xe_force_wake_get() to reflect this behavior, and ensure that the return +value is passed as input to xe_force_wake_put(). + +v3 +- return xe_wakeref_t instead of int in xe_force_wake_get() + +v5 +- return unsigned int for xe_force_wake_get() + +v6 +- use helper xe_force_wake_ref_has_domain() + +v7 +- Fix commit message + +Cc: Rodrigo Vivi +Cc: Lucas De Marchi +Signed-off-by: Himal Prasad Ghimiray +Reviewed-by: Nirmoy Das +Reviewed-by: Badal Nilawar +Link: https://patchwork.freedesktop.org/patch/msgid/20241014075601.2324382-12-himal.prasad.ghimiray@intel.com +Signed-off-by: Rodrigo Vivi +Stable-dep-of: 5dce85fecb87 ("drm/xe: Move the coredump registration to the worker thread") +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/xe/xe_devcoredump.c | 14 ++++++++------ + 1 file changed, 8 insertions(+), 6 deletions(-) + +diff --git a/drivers/gpu/drm/xe/xe_devcoredump.c b/drivers/gpu/drm/xe/xe_devcoredump.c +index 0884c49942fe6..5221ee3f12149 100644 +--- a/drivers/gpu/drm/xe/xe_devcoredump.c ++++ b/drivers/gpu/drm/xe/xe_devcoredump.c +@@ -147,13 +147,15 @@ static void xe_devcoredump_deferred_snap_work(struct work_struct *work) + { + struct xe_devcoredump_snapshot *ss = container_of(work, typeof(*ss), work); + struct xe_devcoredump *coredump = container_of(ss, typeof(*coredump), snapshot); ++ unsigned int fw_ref; + + /* keep going if fw fails as we still want to save the memory and SW data */ +- if (xe_force_wake_get(gt_to_fw(ss->gt), XE_FORCEWAKE_ALL)) ++ fw_ref = xe_force_wake_get(gt_to_fw(ss->gt), XE_FORCEWAKE_ALL); ++ if (!xe_force_wake_ref_has_domain(fw_ref, XE_FORCEWAKE_ALL)) + xe_gt_info(ss->gt, "failed to get forcewake for coredump capture\n"); + xe_vm_snapshot_capture_delayed(ss->vm); + xe_guc_exec_queue_snapshot_capture_delayed(ss->ge); +- xe_force_wake_put(gt_to_fw(ss->gt), XE_FORCEWAKE_ALL); ++ xe_force_wake_put(gt_to_fw(ss->gt), fw_ref); + + /* Calculate devcoredump size */ + ss->read.size = __xe_devcoredump_read(NULL, INT_MAX, coredump); +@@ -226,8 +228,9 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump, + u32 width_mask = (0x1 << q->width) - 1; + const char *process_name = "no process"; + +- int i; ++ unsigned int fw_ref; + bool cookie; ++ int i; + + ss->snapshot_time = ktime_get_real(); + ss->boot_time = ktime_get_boottime(); +@@ -250,8 +253,7 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump, + } + + /* keep going if fw fails as we still want to save the memory and SW data */ +- if (xe_force_wake_get(gt_to_fw(q->gt), XE_FORCEWAKE_ALL)) +- xe_gt_info(ss->gt, "failed to get forcewake for coredump capture\n"); ++ fw_ref = xe_force_wake_get(gt_to_fw(q->gt), XE_FORCEWAKE_ALL); + + ss->ct = xe_guc_ct_snapshot_capture(&guc->ct, true); + ss->ge = xe_guc_exec_queue_snapshot_capture(q); +@@ -269,7 +271,7 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump, + + queue_work(system_unbound_wq, &ss->work); + +- xe_force_wake_put(gt_to_fw(q->gt), XE_FORCEWAKE_ALL); ++ xe_force_wake_put(gt_to_fw(q->gt), fw_ref); + dma_fence_end_signalling(cookie); + } + +-- +2.43.0 + diff --git a/queue-6.12/drm-xe-devcoredump-use-drm_puts-and-already-cached-l.patch b/queue-6.12/drm-xe-devcoredump-use-drm_puts-and-already-cached-l.patch new file mode 100644 index 00000000000..971bbcf3b9b --- /dev/null +++ b/queue-6.12/drm-xe-devcoredump-use-drm_puts-and-already-cached-l.patch @@ -0,0 +1,102 @@ +From 055175a78901990236f4780e832a05d8e9ff605e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 2 Oct 2024 17:46:02 -0700 +Subject: drm/xe/devcoredump: Use drm_puts and already cached local variables + +From: John Harrison + +[ Upstream commit 9d86d080cfb3ab935c842ac5525a90430a14c998 ] + +There are a bunch of calls to drm_printf with static strings. Switch +them to drm_puts instead. + +There are also a bunch of 'coredump->snapshot.XXX' references when +'coredump->snapshot' has alread been cached locally as 'ss'. So use +'ss->XXX' instead. + +Signed-off-by: John Harrison +Reviewed-by: Julia Filipchuk +Link: https://patchwork.freedesktop.org/patch/msgid/20241003004611.2323493-3-John.C.Harrison@Intel.com +Stable-dep-of: 5dce85fecb87 ("drm/xe: Move the coredump registration to the worker thread") +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/xe/xe_devcoredump.c | 40 ++++++++++++++--------------- + 1 file changed, 20 insertions(+), 20 deletions(-) + +diff --git a/drivers/gpu/drm/xe/xe_devcoredump.c b/drivers/gpu/drm/xe/xe_devcoredump.c +index bdb76e834e4c3..d23719d5c2a3d 100644 +--- a/drivers/gpu/drm/xe/xe_devcoredump.c ++++ b/drivers/gpu/drm/xe/xe_devcoredump.c +@@ -85,9 +85,9 @@ static ssize_t __xe_devcoredump_read(char *buffer, size_t count, + + p = drm_coredump_printer(&iter); + +- drm_printf(&p, "**** Xe Device Coredump ****\n"); +- drm_printf(&p, "kernel: " UTS_RELEASE "\n"); +- drm_printf(&p, "module: " KBUILD_MODNAME "\n"); ++ drm_puts(&p, "**** Xe Device Coredump ****\n"); ++ drm_puts(&p, "kernel: " UTS_RELEASE "\n"); ++ drm_puts(&p, "module: " KBUILD_MODNAME "\n"); + + ts = ktime_to_timespec64(ss->snapshot_time); + drm_printf(&p, "Snapshot time: %lld.%09ld\n", ts.tv_sec, ts.tv_nsec); +@@ -96,20 +96,20 @@ static ssize_t __xe_devcoredump_read(char *buffer, size_t count, + drm_printf(&p, "Process: %s\n", ss->process_name); + xe_device_snapshot_print(xe, &p); + +- drm_printf(&p, "\n**** GuC CT ****\n"); +- xe_guc_ct_snapshot_print(coredump->snapshot.ct, &p); +- xe_guc_exec_queue_snapshot_print(coredump->snapshot.ge, &p); ++ drm_puts(&p, "\n**** GuC CT ****\n"); ++ xe_guc_ct_snapshot_print(ss->ct, &p); ++ xe_guc_exec_queue_snapshot_print(ss->ge, &p); + +- drm_printf(&p, "\n**** Job ****\n"); +- xe_sched_job_snapshot_print(coredump->snapshot.job, &p); ++ drm_puts(&p, "\n**** Job ****\n"); ++ xe_sched_job_snapshot_print(ss->job, &p); + +- drm_printf(&p, "\n**** HW Engines ****\n"); ++ drm_puts(&p, "\n**** HW Engines ****\n"); + for (i = 0; i < XE_NUM_HW_ENGINES; i++) +- if (coredump->snapshot.hwe[i]) +- xe_hw_engine_snapshot_print(coredump->snapshot.hwe[i], +- &p); +- drm_printf(&p, "\n**** VM state ****\n"); +- xe_vm_snapshot_print(coredump->snapshot.vm, &p); ++ if (ss->hwe[i]) ++ xe_hw_engine_snapshot_print(ss->hwe[i], &p); ++ ++ drm_puts(&p, "\n**** VM state ****\n"); ++ xe_vm_snapshot_print(ss->vm, &p); + + return count - iter.remain; + } +@@ -247,18 +247,18 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump, + if (xe_force_wake_get(gt_to_fw(q->gt), XE_FORCEWAKE_ALL)) + xe_gt_info(ss->gt, "failed to get forcewake for coredump capture\n"); + +- coredump->snapshot.ct = xe_guc_ct_snapshot_capture(&guc->ct, true); +- coredump->snapshot.ge = xe_guc_exec_queue_snapshot_capture(q); +- coredump->snapshot.job = xe_sched_job_snapshot_capture(job); +- coredump->snapshot.vm = xe_vm_snapshot_capture(q->vm); ++ ss->ct = xe_guc_ct_snapshot_capture(&guc->ct, true); ++ ss->ge = xe_guc_exec_queue_snapshot_capture(q); ++ ss->job = xe_sched_job_snapshot_capture(job); ++ ss->vm = xe_vm_snapshot_capture(q->vm); + + for_each_hw_engine(hwe, q->gt, id) { + if (hwe->class != q->hwe->class || + !(BIT(hwe->logical_instance) & adj_logical_mask)) { +- coredump->snapshot.hwe[id] = NULL; ++ ss->hwe[id] = NULL; + continue; + } +- coredump->snapshot.hwe[id] = xe_hw_engine_snapshot_capture(hwe); ++ ss->hwe[id] = xe_hw_engine_snapshot_capture(hwe); + } + + queue_work(system_unbound_wq, &ss->work); +-- +2.43.0 + diff --git a/queue-6.12/drm-xe-forcewake-add-a-helper-xe_force_wake_ref_has_.patch b/queue-6.12/drm-xe-forcewake-add-a-helper-xe_force_wake_ref_has_.patch new file mode 100644 index 00000000000..5b72d0e7daf --- /dev/null +++ b/queue-6.12/drm-xe-forcewake-add-a-helper-xe_force_wake_ref_has_.patch @@ -0,0 +1,58 @@ +From 4edc411449743717e042d52181742d4c1bd84c5b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 14 Oct 2024 13:25:38 +0530 +Subject: drm/xe/forcewake: Add a helper xe_force_wake_ref_has_domain() + +From: Himal Prasad Ghimiray + +[ Upstream commit 9d62b07027f0710b7af03d78780d0a6c2425bc1e ] + +The helper xe_force_wake_ref_has_domain() checks if the input domain +has been successfully reference-counted and awakened in the reference. + +v2 +- Fix commit message and kernel-doc (Michal) +- Remove unnecessary paranthesis (Michal) + +Cc: Michal Wajdeczko +Cc: Badal Nilawar +Cc: Rodrigo Vivi +Signed-off-by: Himal Prasad Ghimiray +Reviewed-by: Badal Nilawar +Reviewed-by: Michal Wajdeczko +Link: https://patchwork.freedesktop.org/patch/msgid/20241014075601.2324382-4-himal.prasad.ghimiray@intel.com +Signed-off-by: Rodrigo Vivi +Stable-dep-of: 5dce85fecb87 ("drm/xe: Move the coredump registration to the worker thread") +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/xe/xe_force_wake.h | 16 ++++++++++++++++ + 1 file changed, 16 insertions(+) + +diff --git a/drivers/gpu/drm/xe/xe_force_wake.h b/drivers/gpu/drm/xe/xe_force_wake.h +index a2577672f4e3e..1608a55edc846 100644 +--- a/drivers/gpu/drm/xe/xe_force_wake.h ++++ b/drivers/gpu/drm/xe/xe_force_wake.h +@@ -46,4 +46,20 @@ xe_force_wake_assert_held(struct xe_force_wake *fw, + xe_gt_assert(fw->gt, fw->awake_domains & domain); + } + ++/** ++ * xe_force_wake_ref_has_domain - verifies if the domains are in fw_ref ++ * @fw_ref : the force_wake reference ++ * @domain : forcewake domain to verify ++ * ++ * This function confirms whether the @fw_ref includes a reference to the ++ * specified @domain. ++ * ++ * Return: true if domain is refcounted. ++ */ ++static inline bool ++xe_force_wake_ref_has_domain(unsigned int fw_ref, enum xe_force_wake_domains domain) ++{ ++ return fw_ref & domain; ++} ++ + #endif +-- +2.43.0 + diff --git a/queue-6.12/drm-xe-guc-copy-guc-log-prior-to-dumping.patch b/queue-6.12/drm-xe-guc-copy-guc-log-prior-to-dumping.patch new file mode 100644 index 00000000000..98aacc22409 --- /dev/null +++ b/queue-6.12/drm-xe-guc-copy-guc-log-prior-to-dumping.patch @@ -0,0 +1,104 @@ +From b3e9f5e7e67a2ebb1fe184e1dd9c6f38358ffc03 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 2 Oct 2024 17:46:05 -0700 +Subject: drm/xe/guc: Copy GuC log prior to dumping + +From: John Harrison + +[ Upstream commit a59a403419aa03d5e44c8cf014e415490395b17f ] + +Add an extra stage to the GuC log print to copy the log buffer into +regular host memory first, rather than printing the live GPU buffer +object directly. Doing so helps prevent inconsistencies due to the log +being updated as it is being dumped. It also allows the use of the +ASCII85 helper function for printing the log in a more compact form +than a straight hex dump. + +v2: Use %zx instead of %lx for size_t prints. +v3: Replace hexdump code with ascii85 call (review feedback from +Matthew B). Move chunking code into next patch as that reduces the +deltas of both. +v4: Add a prefix to the ASCII85 output to aid tool parsing. + +Signed-off-by: John Harrison +Reviewed-by: Julia Filipchuk +Link: https://patchwork.freedesktop.org/patch/msgid/20241003004611.2323493-6-John.C.Harrison@Intel.com +Stable-dep-of: 5dce85fecb87 ("drm/xe: Move the coredump registration to the worker thread") +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/xe/xe_guc_log.c | 40 +++++++++++++++++++-------------- + 1 file changed, 23 insertions(+), 17 deletions(-) + +diff --git a/drivers/gpu/drm/xe/xe_guc_log.c b/drivers/gpu/drm/xe/xe_guc_log.c +index a37ee34194284..be47780ec2a7e 100644 +--- a/drivers/gpu/drm/xe/xe_guc_log.c ++++ b/drivers/gpu/drm/xe/xe_guc_log.c +@@ -6,9 +6,12 @@ + #include "xe_guc_log.h" + + #include ++#include + + #include "xe_bo.h" ++#include "xe_devcoredump.h" + #include "xe_gt.h" ++#include "xe_gt_printk.h" + #include "xe_map.h" + #include "xe_module.h" + +@@ -49,32 +52,35 @@ static size_t guc_log_size(void) + CAPTURE_BUFFER_SIZE; + } + ++/** ++ * xe_guc_log_print - dump a copy of the GuC log to some useful location ++ * @log: GuC log structure ++ * @p: the printer object to output to ++ */ + void xe_guc_log_print(struct xe_guc_log *log, struct drm_printer *p) + { + struct xe_device *xe = log_to_xe(log); + size_t size; +- int i, j; ++ void *copy; + +- xe_assert(xe, log->bo); ++ if (!log->bo) { ++ drm_puts(p, "GuC log buffer not allocated"); ++ return; ++ } + + size = log->bo->size; + +-#define DW_PER_READ 128 +- xe_assert(xe, !(size % (DW_PER_READ * sizeof(u32)))); +- for (i = 0; i < size / sizeof(u32); i += DW_PER_READ) { +- u32 read[DW_PER_READ]; +- +- xe_map_memcpy_from(xe, read, &log->bo->vmap, i * sizeof(u32), +- DW_PER_READ * sizeof(u32)); +-#define DW_PER_PRINT 4 +- for (j = 0; j < DW_PER_READ / DW_PER_PRINT; ++j) { +- u32 *print = read + j * DW_PER_PRINT; +- +- drm_printf(p, "0x%08x 0x%08x 0x%08x 0x%08x\n", +- *(print + 0), *(print + 1), +- *(print + 2), *(print + 3)); +- } ++ copy = vmalloc(size); ++ if (!copy) { ++ drm_printf(p, "Failed to allocate %zu", size); ++ return; + } ++ ++ xe_map_memcpy_from(xe, copy, &log->bo->vmap, 0, size); ++ ++ xe_print_blob_ascii85(p, "Log data", copy, 0, size); ++ ++ vfree(copy); + } + + int xe_guc_log_init(struct xe_guc_log *log) +-- +2.43.0 + diff --git a/queue-6.12/scsi-ufs-pltfrm-dellocate-hba-during-ufshcd_pltfrm_r.patch b/queue-6.12/scsi-ufs-pltfrm-dellocate-hba-during-ufshcd_pltfrm_r.patch new file mode 100644 index 00000000000..58bc1ac5a22 --- /dev/null +++ b/queue-6.12/scsi-ufs-pltfrm-dellocate-hba-during-ufshcd_pltfrm_r.patch @@ -0,0 +1,40 @@ +From 00ef21d42b84a2e81cd79818749a8760d10df876 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 11 Nov 2024 23:18:34 +0530 +Subject: scsi: ufs: pltfrm: Dellocate HBA during ufshcd_pltfrm_remove() + +From: Manivannan Sadhasivam + +[ Upstream commit 897df60c16d54ad515a3d0887edab5c63da06d1f ] + +This will ensure that the scsi host is cleaned up properly using +scsi_host_dev_release(). Otherwise, it may lead to memory leaks. + +Cc: stable@vger.kernel.org # 4.4 +Fixes: 03b1781aa978 ("[SCSI] ufs: Add Platform glue driver for ufshcd") +Signed-off-by: Manivannan Sadhasivam +Link: https://lore.kernel.org/r/20241111-ufs_bug_fix-v1-5-45ad8b62f02e@linaro.org +Reviewed-by: Peter Wang +Reviewed-by: Bean Huo +Reviewed-by: Bart Van Assche +Signed-off-by: Martin K. Petersen +Signed-off-by: Sasha Levin +--- + drivers/ufs/host/ufshcd-pltfrm.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/ufs/host/ufshcd-pltfrm.c b/drivers/ufs/host/ufshcd-pltfrm.c +index b8dadd0a2f4c0..505572d4fa878 100644 +--- a/drivers/ufs/host/ufshcd-pltfrm.c ++++ b/drivers/ufs/host/ufshcd-pltfrm.c +@@ -534,6 +534,7 @@ void ufshcd_pltfrm_remove(struct platform_device *pdev) + + pm_runtime_get_sync(&pdev->dev); + ufshcd_remove(hba); ++ ufshcd_dealloc_host(hba); + pm_runtime_disable(&pdev->dev); + pm_runtime_put_noidle(&pdev->dev); + } +-- +2.43.0 + diff --git a/queue-6.12/series b/queue-6.12/series index 80b98ff66e4..1b9c6e01f07 100644 --- a/queue-6.12/series +++ b/queue-6.12/series @@ -429,3 +429,12 @@ irqchip-gicv3-its-add-workaround-for-hip09-its-errat.patch smb-client-don-t-try-following-dfs-links-in-cifs_tre.patch setlocalversion-work-around-git-describe-performance.patch io_uring-tctx-work-around-xa_store-allocation-error-.patch +scsi-ufs-pltfrm-dellocate-hba-during-ufshcd_pltfrm_r.patch +drm-xe-devcoredump-use-drm_puts-and-already-cached-l.patch +drm-xe-devcoredump-improve-section-headings-and-add-.patch +drm-xe-devcoredump-add-ascii85-dump-helper-function.patch +drm-xe-guc-copy-guc-log-prior-to-dumping.patch +drm-xe-forcewake-add-a-helper-xe_force_wake_ref_has_.patch +drm-xe-devcoredump-update-handling-of-xe_force_wake_.patch +drm-amd-display-update-interface-to-check-uclk-dpm.patch +drm-amd-display-add-option-to-retrieve-detile-buffer.patch