From: Xi Ruoyao <xry111@xry111.site>
Date: Tue, 19 Aug 2025 03:01:56 +0000 (+0800)
Subject: testsuite: LoongArch: Enable 16B atomic tests if the test machine supports LSX and SCQ
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=4bed08beba397d53ccd7784efe507b5eb74b3803;p=thirdparty%2Fgcc.git

testsuite: LoongArch: Enable 16B atomic tests if the test machine supports LSX and SCQ

Enable those tests so we won't make too stupid mistakes in 16B atomic
implementation anymore.

All these test passed on a Loongson 3C6000/S except
atomic-other-int128.c.  With GDB patched to support sc.q
(https://sourceware.org/pipermail/gdb-patches/2025-August/220034.html)
this test also XPASS.

gcc/testsuite/ChangeLog:

	* lib/target-supports.exp
	(check_effective_target_loongarch_scq_hw): New.
	(check_effective_target_sync_int_128_runtime): Return 1 on
	loongarch64-*-* if hardware supports both LSX and SCQ.
	* gcc.dg/atomic-compare-exchange-5.c: Pass -mlsx -mscq for
	loongarch64-*-*.
	* gcc.dg/atomic-exchange-5.c: Likewise.
	* gcc.dg/atomic-load-5.c: Likewise.
	* gcc.dg/atomic-op-5.c: Likewise.
	* gcc.dg/atomic-store-5.c: Likewise.
	* gcc.dg/atomic-store-6.c: Likewise.
	* gcc.dg/simulate-thread/atomic-load-int128.c: Likewise.
	* gcc.dg/simulate-thread/atomic-other-int128.c: Likewise.
	(dg-final): xfail on loongarch64-*-* because  gdb does not
	handle sc.q properly yet.
---

diff --git a/gcc/testsuite/gcc.dg/atomic-compare-exchange-5.c b/gcc/testsuite/gcc.dg/atomic-compare-exchange-5.c
index f5d071affe8f..8d0b46262183 100644
--- a/gcc/testsuite/gcc.dg/atomic-compare-exchange-5.c
+++ b/gcc/testsuite/gcc.dg/atomic-compare-exchange-5.c
@@ -3,6 +3,7 @@
 /* { dg-do run } */
 /* { dg-require-effective-target sync_int_128_runtime } */
 /* { dg-options "-mcx16" { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-options "-mlsx -mscq" { target { loongarch64-*-* } } } */
 
 /* Test the execution of __atomic_compare_exchange_n builtin for an int_128.  */
 
diff --git a/gcc/testsuite/gcc.dg/atomic-exchange-5.c b/gcc/testsuite/gcc.dg/atomic-exchange-5.c
index 190377f0cd55..ec3837dfdcf0 100644
--- a/gcc/testsuite/gcc.dg/atomic-exchange-5.c
+++ b/gcc/testsuite/gcc.dg/atomic-exchange-5.c
@@ -3,6 +3,7 @@
 /* { dg-do run } */
 /* { dg-require-effective-target sync_int_128_runtime } */
 /* { dg-options "-mcx16" { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-options "-mlsx -mscq" { target { loongarch64-*-* } } } */
 
 /* Test the execution of the __atomic_X builtin for a 16 byte value.  */
 
diff --git a/gcc/testsuite/gcc.dg/atomic-load-5.c b/gcc/testsuite/gcc.dg/atomic-load-5.c
index d37d64248927..1cb2baabc7d1 100644
--- a/gcc/testsuite/gcc.dg/atomic-load-5.c
+++ b/gcc/testsuite/gcc.dg/atomic-load-5.c
@@ -3,6 +3,7 @@
 /* { dg-do run } */
 /* { dg-require-effective-target sync_int_128_runtime } */
 /* { dg-options "-mcx16" { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-options "-mlsx -mscq" { target { loongarch64-*-* } } } */
 
 extern void abort(void);
 
diff --git a/gcc/testsuite/gcc.dg/atomic-op-5.c b/gcc/testsuite/gcc.dg/atomic-op-5.c
index 1407f3fe3b24..4c6dcef8bf23 100644
--- a/gcc/testsuite/gcc.dg/atomic-op-5.c
+++ b/gcc/testsuite/gcc.dg/atomic-op-5.c
@@ -3,6 +3,7 @@
 /* { dg-do run } */
 /* { dg-require-effective-target sync_int_128_runtime } */
 /* { dg-options "-mcx16" { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-options "-mlsx -mscq" { target { loongarch64-*-* } } } */
 
 /* Test the execution of the __atomic_*OP builtin routines for an int_128.  */
 
diff --git a/gcc/testsuite/gcc.dg/atomic-store-5.c b/gcc/testsuite/gcc.dg/atomic-store-5.c
index a855182bf49c..4bc379c722b2 100644
--- a/gcc/testsuite/gcc.dg/atomic-store-5.c
+++ b/gcc/testsuite/gcc.dg/atomic-store-5.c
@@ -3,6 +3,7 @@
 /* { dg-do run } */
 /* { dg-require-effective-target sync_int_128_runtime } */
 /* { dg-options "-mcx16" { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-options "-mlsx -mscq" { target { loongarch64-*-* } } } */
 
 /* Test the execution of the __atomic_store_n builtin for a 16 byte value.  */
 
diff --git a/gcc/testsuite/gcc.dg/atomic-store-6.c b/gcc/testsuite/gcc.dg/atomic-store-6.c
index 81499cd716b3..78bf2aa02f5d 100644
--- a/gcc/testsuite/gcc.dg/atomic-store-6.c
+++ b/gcc/testsuite/gcc.dg/atomic-store-6.c
@@ -1,6 +1,7 @@
 /* { dg-do run } */
 /* { dg-require-effective-target sync_int_128_runtime } */
 /* { dg-options "-mcx16" { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-options "-mlsx -mscq" { target { loongarch64-*-* } } } */
 
 __int128_t i;
 
diff --git a/gcc/testsuite/gcc.dg/simulate-thread/atomic-load-int128.c b/gcc/testsuite/gcc.dg/simulate-thread/atomic-load-int128.c
index 759a83d22f76..6adc7d966201 100644
--- a/gcc/testsuite/gcc.dg/simulate-thread/atomic-load-int128.c
+++ b/gcc/testsuite/gcc.dg/simulate-thread/atomic-load-int128.c
@@ -1,6 +1,7 @@
 /* { dg-do link } */
 /* { dg-require-effective-target sync_int_128_runtime } */
 /* { dg-options "-mcx16" { target { x86_64-*-* i?86-*-* } } } */
+/* { dg-options "-mlsx -mscq" { target { loongarch64-*-* } } } */
 /* { dg-final { simulate-thread } } */
 
 #include <stdio.h>
diff --git a/gcc/testsuite/gcc.dg/simulate-thread/atomic-other-int128.c b/gcc/testsuite/gcc.dg/simulate-thread/atomic-other-int128.c
index 6aaaa88ef049..5538fa1ff924 100644
--- a/gcc/testsuite/gcc.dg/simulate-thread/atomic-other-int128.c
+++ b/gcc/testsuite/gcc.dg/simulate-thread/atomic-other-int128.c
@@ -1,7 +1,12 @@
 /* { dg-do link } */
 /* { dg-require-effective-target sync_int_128_runtime } */
 /* { dg-options "-mcx16" { target { x86_64-*-* i?86-*-* } } } */
-/* { dg-final { simulate-thread } } */
+/* { dg-options "-mlsx -mscq" { target { loongarch64-*-* } } } */
+
+/* xfail on loongarch64 until the new GDB versions with
+   https://sourceware.org/pipermail/gdb-patches/2025-August/220034.html
+   is widely used by distros.  */
+/* { dg-final { simulate-thread { xfail loongarch64-*-* } } } */
 
 #include <stdio.h>
 #include "simulate-thread.h"
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 957fa7f3599e..1acfb373bebb 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -10053,7 +10053,13 @@ proc check_effective_target_sync_int_128 { } {
 # This requires support for both compare-and-swap and true atomic loads.
 
 proc check_effective_target_sync_int_128_runtime { } {
-    return 0
+    if { [istarget loongarch64-*-*]
+	 && [check_effective_target_loongarch_sx_hw]
+	 && [check_effective_target_loongarch_scq_hw] } {
+	return 1
+    } else {
+	return 0
+    }
 }
 
 # Return 1 if the target supports atomic operations on "long long".
@@ -14314,6 +14320,18 @@ proc check_effective_target_loongarch_asx_hw { } {
     } "-mlasx"]
 }
 
+proc check_effective_target_loongarch_scq_hw { } {
+    return [check_runtime loongarch_scq_hw {
+	#include <larchintrin.h>
+	int main (void)
+	{
+	  if (__cpucfg (2) & (1 << 30))
+	    return 0;
+	  __builtin_trap ();
+	}
+    } ""]
+}
+
 # Check whether LoongArch binutils supports call36 relocation.
 proc check_effective_target_loongarch_call36_support { } {
   return [check_no_compiler_messages loongarch_call36_support object {