From: Greg Kroah-Hartman Date: Tue, 26 Feb 2013 18:20:23 +0000 (-0800) Subject: 3.8-stable patches X-Git-Tag: v3.7.10~21 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=4d40871b21b490bafaf5b88e1a6d0162b9543cec;p=thirdparty%2Fkernel%2Fstable-queue.git 3.8-stable patches added patches: drm-i915-only-run-idle-processing-from-i915_gem_retire_requests_worker.patch drm-i915-preserve-the-ddi-link-reversal-configuration.patch drm-i915-preserve-the-fdi-line-reversal-override-bit-on-cpt.patch get-rid-of-unprotected-dereferencing-of-mnt-mnt_ns.patch intel-iommu-force-writebuffer-flush-quirk-on-gen-4-chipsets.patch --- diff --git a/queue-3.8/drm-i915-only-run-idle-processing-from-i915_gem_retire_requests_worker.patch b/queue-3.8/drm-i915-only-run-idle-processing-from-i915_gem_retire_requests_worker.patch new file mode 100644 index 00000000000..2b128f79384 --- /dev/null +++ b/queue-3.8/drm-i915-only-run-idle-processing-from-i915_gem_retire_requests_worker.patch @@ -0,0 +1,92 @@ +From 725a5b54028916cd2511a251c5b5b13d1715addc Mon Sep 17 00:00:00 2001 +From: Chris Wilson +Date: Tue, 8 Jan 2013 11:02:57 +0000 +Subject: drm/i915: Only run idle processing from i915_gem_retire_requests_worker + +From: Chris Wilson + +commit 725a5b54028916cd2511a251c5b5b13d1715addc upstream. + +When adding the fb idle detection to mark-inactive, it was forgotten +that userspace can drive the processing of retire-requests. We assumed +that it would be principally driven by the retire requests worker, +running once every second whilst active and so we would get the deferred +timer for free. Instead we spend too many CPU cycles reclocking the LVDS +preventing real work from being done. + +Signed-off-by: Chris Wilson +Reported-and-tested-by: Alexander Lam +Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=58843 +Reviewed-by: Rodrigo Vivi +Signed-off-by: Daniel Vetter +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/i915_gem.c | 3 --- + drivers/gpu/drm/i915/intel_display.c | 12 +++--------- + drivers/gpu/drm/i915/intel_drv.h | 3 +-- + 3 files changed, 4 insertions(+), 14 deletions(-) + +--- a/drivers/gpu/drm/i915/i915_gem.c ++++ b/drivers/gpu/drm/i915/i915_gem.c +@@ -1918,9 +1918,6 @@ i915_gem_object_move_to_inactive(struct + BUG_ON(obj->base.write_domain & ~I915_GEM_GPU_DOMAINS); + BUG_ON(!obj->active); + +- if (obj->pin_count) /* are we a framebuffer? */ +- intel_mark_fb_idle(obj); +- + list_move_tail(&obj->mm_list, &dev_priv->mm.inactive_list); + + list_del_init(&obj->ring_list); +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -6993,11 +6993,6 @@ void intel_mark_busy(struct drm_device * + + void intel_mark_idle(struct drm_device *dev) + { +-} +- +-void intel_mark_fb_busy(struct drm_i915_gem_object *obj) +-{ +- struct drm_device *dev = obj->base.dev; + struct drm_crtc *crtc; + + if (!i915_powersave) +@@ -7007,12 +7002,11 @@ void intel_mark_fb_busy(struct drm_i915_ + if (!crtc->fb) + continue; + +- if (to_intel_framebuffer(crtc->fb)->obj == obj) +- intel_increase_pllclock(crtc); ++ intel_decrease_pllclock(crtc); + } + } + +-void intel_mark_fb_idle(struct drm_i915_gem_object *obj) ++void intel_mark_fb_busy(struct drm_i915_gem_object *obj) + { + struct drm_device *dev = obj->base.dev; + struct drm_crtc *crtc; +@@ -7025,7 +7019,7 @@ void intel_mark_fb_idle(struct drm_i915_ + continue; + + if (to_intel_framebuffer(crtc->fb)->obj == obj) +- intel_decrease_pllclock(crtc); ++ intel_increase_pllclock(crtc); + } + } + +--- a/drivers/gpu/drm/i915/intel_drv.h ++++ b/drivers/gpu/drm/i915/intel_drv.h +@@ -440,9 +440,8 @@ extern bool intel_sdvo_init(struct drm_d + extern void intel_dvo_init(struct drm_device *dev); + extern void intel_tv_init(struct drm_device *dev); + extern void intel_mark_busy(struct drm_device *dev); +-extern void intel_mark_idle(struct drm_device *dev); + extern void intel_mark_fb_busy(struct drm_i915_gem_object *obj); +-extern void intel_mark_fb_idle(struct drm_i915_gem_object *obj); ++extern void intel_mark_idle(struct drm_device *dev); + extern bool intel_lvds_init(struct drm_device *dev); + extern void intel_dp_init(struct drm_device *dev, int output_reg, + enum port port); diff --git a/queue-3.8/drm-i915-preserve-the-ddi-link-reversal-configuration.patch b/queue-3.8/drm-i915-preserve-the-ddi-link-reversal-configuration.patch new file mode 100644 index 00000000000..fb550f3545c --- /dev/null +++ b/queue-3.8/drm-i915-preserve-the-ddi-link-reversal-configuration.patch @@ -0,0 +1,115 @@ +From 876a8cdf92b23d268275cdce4397df0c37dac3fe Mon Sep 17 00:00:00 2001 +From: Damien Lespiau +Date: Tue, 11 Dec 2012 18:48:30 +0000 +Subject: drm/i915: Preserve the DDI link reversal configuration + +From: Damien Lespiau + +commit 876a8cdf92b23d268275cdce4397df0c37dac3fe upstream. + +Similarly to: + + commit 6a0d1df3d3a0d2370541164eb0595fe35dcd6de3 + Author: Damien Lespiau + Date: Tue Dec 11 15:18:28 2012 +0000 + + drm/i915: Preserve the FDI line reversal override bit on CPT + +DDI port support lane reversal to easy the PCB layouting work. Let's +preserve the bit configured by the BIOS (until we find how to correctly +retrieve the information from the VBT, but this does sound more fragile +then just relying on the BIOS that has, hopefully, been validated +already. + +Signed-off-by: Damien Lespiau +Reviewed-by: Paulo Zanoni +Signed-off-by: Daniel Vetter +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/i915_reg.h | 1 + + drivers/gpu/drm/i915/intel_ddi.c | 19 ++++++++++++++++--- + drivers/gpu/drm/i915/intel_drv.h | 1 + + 3 files changed, 18 insertions(+), 3 deletions(-) + +--- a/drivers/gpu/drm/i915/i915_reg.h ++++ b/drivers/gpu/drm/i915/i915_reg.h +@@ -4524,6 +4524,7 @@ + #define DDI_BUF_EMP_800MV_0DB_HSW (7<<24) /* Sel7 */ + #define DDI_BUF_EMP_800MV_3_5DB_HSW (8<<24) /* Sel8 */ + #define DDI_BUF_EMP_MASK (0xf<<24) ++#define DDI_BUF_PORT_REVERSAL (1<<16) + #define DDI_BUF_IS_IDLE (1<<7) + #define DDI_A_4_LANES (1<<4) + #define DDI_PORT_WIDTH_X1 (0<<1) +--- a/drivers/gpu/drm/i915/intel_ddi.c ++++ b/drivers/gpu/drm/i915/intel_ddi.c +@@ -203,7 +203,10 @@ void hsw_fdi_link_train(struct drm_crtc + DP_TP_CTL_LINK_TRAIN_PAT1 | + DP_TP_CTL_ENABLE); + +- /* Configure and enable DDI_BUF_CTL for DDI E with next voltage */ ++ /* Configure and enable DDI_BUF_CTL for DDI E with next voltage. ++ * DDI E does not support port reversal, the functionality is ++ * achieved on the PCH side in FDI_RX_CTL, so no need to set the ++ * port reversal bit */ + I915_WRITE(DDI_BUF_CTL(PORT_E), + DDI_BUF_CTL_ENABLE | + ((intel_crtc->fdi_lanes - 1) << 1) | +@@ -677,8 +680,11 @@ static void intel_ddi_mode_set(struct dr + + if (type == INTEL_OUTPUT_DISPLAYPORT || type == INTEL_OUTPUT_EDP) { + struct intel_dp *intel_dp = enc_to_intel_dp(encoder); ++ struct intel_digital_port *intel_dig_port = ++ enc_to_dig_port(encoder); + +- intel_dp->DP = DDI_BUF_CTL_ENABLE | DDI_BUF_EMP_400MV_0DB_HSW; ++ intel_dp->DP = intel_dig_port->port_reversal | ++ DDI_BUF_CTL_ENABLE | DDI_BUF_EMP_400MV_0DB_HSW; + switch (intel_dp->lane_count) { + case 1: + intel_dp->DP |= DDI_PORT_WIDTH_X1; +@@ -1291,11 +1297,15 @@ static void intel_enable_ddi(struct inte + int type = intel_encoder->type; + + if (type == INTEL_OUTPUT_HDMI) { ++ struct intel_digital_port *intel_dig_port = ++ enc_to_dig_port(encoder); ++ + /* In HDMI/DVI mode, the port width, and swing/emphasis values + * are ignored so nothing special needs to be done besides + * enabling the port. + */ +- I915_WRITE(DDI_BUF_CTL(port), DDI_BUF_CTL_ENABLE); ++ I915_WRITE(DDI_BUF_CTL(port), ++ intel_dig_port->port_reversal | DDI_BUF_CTL_ENABLE); + } else if (type == INTEL_OUTPUT_EDP) { + struct intel_dp *intel_dp = enc_to_intel_dp(encoder); + +@@ -1457,6 +1467,7 @@ static const struct drm_encoder_helper_f + + void intel_ddi_init(struct drm_device *dev, enum port port) + { ++ struct drm_i915_private *dev_priv = dev->dev_private; + struct intel_digital_port *intel_dig_port; + struct intel_encoder *intel_encoder; + struct drm_encoder *encoder; +@@ -1497,6 +1508,8 @@ void intel_ddi_init(struct drm_device *d + intel_encoder->get_hw_state = intel_ddi_get_hw_state; + + intel_dig_port->port = port; ++ intel_dig_port->port_reversal = I915_READ(DDI_BUF_CTL(port)) & ++ DDI_BUF_PORT_REVERSAL; + if (hdmi_connector) + intel_dig_port->hdmi.sdvox_reg = DDI_BUF_CTL(port); + else +--- a/drivers/gpu/drm/i915/intel_drv.h ++++ b/drivers/gpu/drm/i915/intel_drv.h +@@ -377,6 +377,7 @@ struct intel_dp { + struct intel_digital_port { + struct intel_encoder base; + enum port port; ++ u32 port_reversal; + struct intel_dp dp; + struct intel_hdmi hdmi; + }; diff --git a/queue-3.8/drm-i915-preserve-the-fdi-line-reversal-override-bit-on-cpt.patch b/queue-3.8/drm-i915-preserve-the-fdi-line-reversal-override-bit-on-cpt.patch new file mode 100644 index 00000000000..fc83c666bfb --- /dev/null +++ b/queue-3.8/drm-i915-preserve-the-fdi-line-reversal-override-bit-on-cpt.patch @@ -0,0 +1,93 @@ +From 3e68320ef84528604d971afc3cadfbe208bef001 Mon Sep 17 00:00:00 2001 +From: Damien Lespiau +Date: Tue, 11 Dec 2012 18:48:29 +0000 +Subject: drm/i915: Preserve the FDI line reversal override bit on CPT + +From: Damien Lespiau + +commit 3e68320ef84528604d971afc3cadfbe208bef001 upstream. + +The FDI link has supported link reversal to make the PCB layout +engineer's life easier for quite a while and we have always presered +this bit as we programmed FDI_RX_CTL with a read/modify/write sequence. + +We're trying to take a bit more control over what the BIOS leaves in +various register and with the introduction of DDI, started to program +FDI_RX_CTL fully. + +There's a fused bit to indicate DMI link reversal and FDI defaults to +mirroring that configuration. We have a bit to override that behaviour +that we need to preserve from the BIOS. + +Signed-off-by: Damien Lespiau +Reviewed-by: Rodrigo Vivi +Reviewed-by: Paulo Zanoni +Signed-off-by: Daniel Vetter +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/i915_drv.h | 2 +- + drivers/gpu/drm/i915/i915_reg.h | 2 +- + drivers/gpu/drm/i915/intel_crt.c | 14 +++++++++----- + drivers/gpu/drm/i915/intel_ddi.c | 6 ++---- + 4 files changed, 13 insertions(+), 11 deletions(-) + +--- a/drivers/gpu/drm/i915/i915_drv.h ++++ b/drivers/gpu/drm/i915/i915_drv.h +@@ -919,7 +919,7 @@ typedef struct drm_i915_private { + bool hw_contexts_disabled; + uint32_t hw_context_size; + +- bool fdi_rx_polarity_reversed; ++ u32 fdi_rx_config; + + struct i915_suspend_saved_registers regfile; + +--- a/drivers/gpu/drm/i915/i915_reg.h ++++ b/drivers/gpu/drm/i915/i915_reg.h +@@ -3927,7 +3927,7 @@ + #define FDI_10BPC (1<<16) + #define FDI_6BPC (2<<16) + #define FDI_12BPC (3<<16) +-#define FDI_LINK_REVERSE_OVERWRITE (1<<15) ++#define FDI_RX_LINK_REVERSAL_OVERRIDE (1<<15) + #define FDI_DMI_LINK_REVERSE_MASK (1<<14) + #define FDI_RX_PLL_ENABLE (1<<13) + #define FDI_FS_ERR_CORRECT_ENABLE (1<<11) +--- a/drivers/gpu/drm/i915/intel_crt.c ++++ b/drivers/gpu/drm/i915/intel_crt.c +@@ -800,10 +800,14 @@ void intel_crt_init(struct drm_device *d + dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS; + + /* +- * TODO: find a proper way to discover whether we need to set the +- * polarity reversal bit or not, instead of relying on the BIOS. ++ * TODO: find a proper way to discover whether we need to set the the ++ * polarity and link reversal bits or not, instead of relying on the ++ * BIOS. + */ +- if (HAS_PCH_LPT(dev)) +- dev_priv->fdi_rx_polarity_reversed = +- !!(I915_READ(_FDI_RXA_CTL) & FDI_RX_POLARITY_REVERSED_LPT); ++ if (HAS_PCH_LPT(dev)) { ++ u32 fdi_config = FDI_RX_POLARITY_REVERSED_LPT | ++ FDI_RX_LINK_REVERSAL_OVERRIDE; ++ ++ dev_priv->fdi_rx_config = I915_READ(_FDI_RXA_CTL) & fdi_config; ++ } + } +--- a/drivers/gpu/drm/i915/intel_ddi.c ++++ b/drivers/gpu/drm/i915/intel_ddi.c +@@ -178,10 +178,8 @@ void hsw_fdi_link_train(struct drm_crtc + FDI_RX_TP1_TO_TP2_48 | FDI_RX_FDI_DELAY_90); + + /* Enable the PCH Receiver FDI PLL */ +- rx_ctl_val = FDI_RX_PLL_ENABLE | FDI_RX_ENHANCE_FRAME_ENABLE | +- ((intel_crtc->fdi_lanes - 1) << 19); +- if (dev_priv->fdi_rx_polarity_reversed) +- rx_ctl_val |= FDI_RX_POLARITY_REVERSED_LPT; ++ rx_ctl_val = dev_priv->fdi_rx_config | FDI_RX_ENHANCE_FRAME_ENABLE | ++ FDI_RX_PLL_ENABLE | ((intel_crtc->fdi_lanes - 1) << 19); + I915_WRITE(_FDI_RXA_CTL, rx_ctl_val); + POSTING_READ(_FDI_RXA_CTL); + udelay(220); diff --git a/queue-3.8/get-rid-of-unprotected-dereferencing-of-mnt-mnt_ns.patch b/queue-3.8/get-rid-of-unprotected-dereferencing-of-mnt-mnt_ns.patch new file mode 100644 index 00000000000..3cebbb72ba5 --- /dev/null +++ b/queue-3.8/get-rid-of-unprotected-dereferencing-of-mnt-mnt_ns.patch @@ -0,0 +1,114 @@ +From 9b40bc90abd126bcc5da5658059b8e72e285e559 Mon Sep 17 00:00:00 2001 +From: Al Viro +Date: Fri, 22 Feb 2013 22:45:42 -0500 +Subject: get rid of unprotected dereferencing of mnt->mnt_ns + +From: Al Viro + +commit 9b40bc90abd126bcc5da5658059b8e72e285e559 upstream. + +It's safe only under namespace_sem or vfsmount_lock; all places +in fs/namespace.c that want mnt->mnt_ns->user_ns actually want to use +current->nsproxy->mnt_ns->user_ns (note the calls of check_mnt() in +there). + +Signed-off-by: Al Viro +Signed-off-by: Greg Kroah-Hartman + +--- + fs/namespace.c | 29 +++++++++++++++++------------ + 1 file changed, 17 insertions(+), 12 deletions(-) + +--- a/fs/namespace.c ++++ b/fs/namespace.c +@@ -1237,6 +1237,14 @@ static int do_umount(struct mount *mnt, + return retval; + } + ++/* ++ * Is the caller allowed to modify his namespace? ++ */ ++static inline bool may_mount(void) ++{ ++ return ns_capable(current->nsproxy->mnt_ns->user_ns, CAP_SYS_ADMIN); ++} ++ + /* + * Now umount can handle mount points as well as block devices. + * This is important for filesystems which use unnamed block devices. +@@ -1255,6 +1263,9 @@ SYSCALL_DEFINE2(umount, char __user *, n + if (flags & ~(MNT_FORCE | MNT_DETACH | MNT_EXPIRE | UMOUNT_NOFOLLOW)) + return -EINVAL; + ++ if (!may_mount()) ++ return -EPERM; ++ + if (!(flags & UMOUNT_NOFOLLOW)) + lookup_flags |= LOOKUP_FOLLOW; + +@@ -1268,10 +1279,6 @@ SYSCALL_DEFINE2(umount, char __user *, n + if (!check_mnt(mnt)) + goto dput_and_out; + +- retval = -EPERM; +- if (!ns_capable(mnt->mnt_ns->user_ns, CAP_SYS_ADMIN)) +- goto dput_and_out; +- + retval = do_umount(mnt, flags); + dput_and_out: + /* we mustn't call path_put() as that would clear mnt_expiry_mark */ +@@ -1295,7 +1302,7 @@ SYSCALL_DEFINE1(oldumount, char __user * + + static int mount_is_safe(struct path *path) + { +- if (ns_capable(real_mount(path->mnt)->mnt_ns->user_ns, CAP_SYS_ADMIN)) ++ if (may_mount()) + return 0; + return -EPERM; + #ifdef notyet +@@ -1633,7 +1640,7 @@ static int do_change_type(struct path *p + int type; + int err = 0; + +- if (!ns_capable(mnt->mnt_ns->user_ns, CAP_SYS_ADMIN)) ++ if (!may_mount()) + return -EPERM; + + if (path->dentry != path->mnt->mnt_root) +@@ -1797,7 +1804,7 @@ static int do_move_mount(struct path *pa + struct mount *p; + struct mount *old; + int err = 0; +- if (!ns_capable(real_mount(path->mnt)->mnt_ns->user_ns, CAP_SYS_ADMIN)) ++ if (!may_mount()) + return -EPERM; + if (!old_name || !*old_name) + return -EINVAL; +@@ -1933,16 +1940,14 @@ static int do_new_mount(struct path *pat + int mnt_flags, const char *name, void *data) + { + struct file_system_type *type; +- struct user_namespace *user_ns; ++ struct user_namespace *user_ns = current->nsproxy->mnt_ns->user_ns; + struct vfsmount *mnt; + int err; + + if (!fstype) + return -EINVAL; + +- /* we need capabilities... */ +- user_ns = real_mount(path->mnt)->mnt_ns->user_ns; +- if (!ns_capable(user_ns, CAP_SYS_ADMIN)) ++ if (!may_mount()) + return -EPERM; + + type = get_fs_type(fstype); +@@ -2567,7 +2572,7 @@ SYSCALL_DEFINE2(pivot_root, const char _ + struct mount *new_mnt, *root_mnt; + int error; + +- if (!ns_capable(current->nsproxy->mnt_ns->user_ns, CAP_SYS_ADMIN)) ++ if (!may_mount()) + return -EPERM; + + error = user_path_dir(new_root, &new); diff --git a/queue-3.8/intel-iommu-force-writebuffer-flush-quirk-on-gen-4-chipsets.patch b/queue-3.8/intel-iommu-force-writebuffer-flush-quirk-on-gen-4-chipsets.patch new file mode 100644 index 00000000000..e18e914d236 --- /dev/null +++ b/queue-3.8/intel-iommu-force-writebuffer-flush-quirk-on-gen-4-chipsets.patch @@ -0,0 +1,47 @@ +From 210561ffd72d00eccf12c0131b8024d5436bae95 Mon Sep 17 00:00:00 2001 +From: Daniel Vetter +Date: Mon, 21 Jan 2013 19:48:59 +0100 +Subject: intel/iommu: force writebuffer-flush quirk on Gen 4 Chipsets + +From: Daniel Vetter + +commit 210561ffd72d00eccf12c0131b8024d5436bae95 upstream. + +We already have the quirk entry for the mobile platform, but also +reports on some desktop versions. So be paranoid and set it +everywhere. + +References: http://www.mail-archive.com/dri-devel@lists.freedesktop.org/msg33138.html +Reported-and-tested-by: Mihai Moldovan +Cc: David Woodhouse +Cc: "Sankaran, Rajesh" +Signed-off-by: Daniel Vetter +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/iommu/intel-iommu.c | 8 +++++++- + 1 file changed, 7 insertions(+), 1 deletion(-) + +--- a/drivers/iommu/intel-iommu.c ++++ b/drivers/iommu/intel-iommu.c +@@ -4253,13 +4253,19 @@ static void quirk_iommu_rwbf(struct pci_ + { + /* + * Mobile 4 Series Chipset neglects to set RWBF capability, +- * but needs it: ++ * but needs it. Same seems to hold for the desktop versions. + */ + printk(KERN_INFO "DMAR: Forcing write-buffer flush capability\n"); + rwbf_quirk = 1; + } + + DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2a40, quirk_iommu_rwbf); ++DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e00, quirk_iommu_rwbf); ++DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e10, quirk_iommu_rwbf); ++DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e20, quirk_iommu_rwbf); ++DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e30, quirk_iommu_rwbf); ++DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e40, quirk_iommu_rwbf); ++DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e90, quirk_iommu_rwbf); + + #define GGC 0x52 + #define GGC_MEMORY_SIZE_MASK (0xf << 8) diff --git a/queue-3.8/series b/queue-3.8/series index ebabc687699..2a318b60201 100644 --- a/queue-3.8/series +++ b/queue-3.8/series @@ -75,3 +75,8 @@ drm-fill-depth-bits_per_pixel-for-c8-format.patch drm-use-c8-instead-of-rgb332-when-determining-the-format-from-depth-bpp.patch revert-drm-add-edid_quirk_force_reduced_blanking-for-asus-vw222s.patch drm-usb-bind-driver-to-correct-device.patch +intel-iommu-force-writebuffer-flush-quirk-on-gen-4-chipsets.patch +get-rid-of-unprotected-dereferencing-of-mnt-mnt_ns.patch +drm-i915-preserve-the-ddi-link-reversal-configuration.patch +drm-i915-preserve-the-fdi-line-reversal-override-bit-on-cpt.patch +drm-i915-only-run-idle-processing-from-i915_gem_retire_requests_worker.patch