From: Jakub Jelinek <jakub@redhat.com>
Date: Thu, 14 Jun 2012 18:26:53 +0000 (+0200)
Subject: re PR target/53639 (x86_64: redundant 64-bit operations on 32-bit integers)
X-Git-Tag: misc/gccgo-go1_1_2~2364
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=4e534d30ea5d0ed3ed326b34a6c4c18ee7147350;p=thirdparty%2Fgcc.git

re PR target/53639 (x86_64: redundant 64-bit operations on 32-bit integers)

	PR target/53639
	* config/i386/i386.md (*anddi_1 into *andsi_1_zext splitter): New.

From-SVN: r188629
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 112c16364607..dc9135d17fda 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2012-06-14  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/53639
+	* config/i386/i386.md (*anddi_1 into *andsi_1_zext splitter): New.
+
 2012-06-14  Richard Earnshaw  <rearnsha@arm.com>
 
 	* arm.c (arm_cirrus_insn_p): Delete.
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index a2e6a52a8b60..6135de9ce99e 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -7933,6 +7933,18 @@
   [(set_attr "type" "alu1")
    (set_attr "mode" "QI")])
 
+;; Turn *anddi_1 into *andsi_1_zext if possible.
+(define_split
+  [(set (match_operand:DI 0 "register_operand")
+	(and:DI (subreg:DI (match_operand:SI 1 "register_operand") 0)
+		(match_operand:DI 2 "x86_64_zext_immediate_operand")))
+   (clobber (reg:CC FLAGS_REG))]
+  "TARGET_64BIT"
+  [(parallel [(set (match_dup 0)
+		   (zero_extend:DI (and:SI (match_dup 1) (match_dup 2))))
+	      (clobber (reg:CC FLAGS_REG))])]
+  "operands[2] = gen_lowpart (SImode, operands[2]);")
+
 (define_split
   [(set (match_operand:SWI248 0 "register_operand")
 	(and:SWI248 (match_operand:SWI248 1 "nonimmediate_operand")