From: Lorenzo Bianconi Date: Fri, 21 Feb 2025 08:01:15 +0000 (+0100) Subject: arm64: dts: airoha: en7581: Add more nodes to EN7581 SoC evaluation board X-Git-Tag: v6.15-rc1~159^2~31^2~8 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=4fbfe81f92c1a9d7bed09cce0a5c508c341e5e97;p=thirdparty%2Fkernel%2Flinux.git arm64: dts: airoha: en7581: Add more nodes to EN7581 SoC evaluation board Introduce the following nodes to EN7581 SoC and EN7581 evaluation board: - rng controller - pinctrl - i2c controllers Signed-off-by: Lorenzo Bianconi Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20250221-en7581-dts-spi-pinctrl-v3-1-4719e2d01555@kernel.org Signed-off-by: AngeloGioacchino Del Regno --- diff --git a/arch/arm64/boot/dts/airoha/en7581-evb.dts b/arch/arm64/boot/dts/airoha/en7581-evb.dts index a4cdcadd1ae54..d53b72d18242e 100644 --- a/arch/arm64/boot/dts/airoha/en7581-evb.dts +++ b/arch/arm64/boot/dts/airoha/en7581-evb.dts @@ -64,3 +64,7 @@ }; }; }; + +&i2c0 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/airoha/en7581.dtsi b/arch/arm64/boot/dts/airoha/en7581.dtsi index dbd296b049f99..9a419796594d3 100644 --- a/arch/arm64/boot/dts/airoha/en7581.dtsi +++ b/arch/arm64/boot/dts/airoha/en7581.dtsi @@ -3,6 +3,7 @@ #include #include #include +#include / { interrupt-parent = <&gic>; @@ -123,6 +124,12 @@ ; }; + clk20m: clock-20000000 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <20000000>; + }; + soc { compatible = "simple-bus"; #address-cells = <2>; @@ -181,5 +188,58 @@ interrupts = ; clock-frequency = <1843200>; }; + + rng@1faa1000 { + compatible = "airoha,en7581-trng"; + reg = <0x0 0x1faa1000 0x0 0xc04>; + interrupts = ; + }; + + system-controller@1fbf0200 { + compatible = "airoha,en7581-gpio-sysctl", "syscon", + "simple-mfd"; + reg = <0x0 0x1fbf0200 0x0 0xc0>; + + en7581_pinctrl: pinctrl { + compatible = "airoha,en7581-pinctrl"; + + interrupt-parent = <&gic>; + interrupts = ; + + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + i2c0: i2c@1fbf8000 { + compatible = "mediatek,mt7621-i2c"; + reg = <0x0 0x1fbf8000 0x0 0x100>; + + resets = <&scuclk EN7581_I2C2_RST>; + + clocks = <&clk20m>; + clock-frequency = <100000>; + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + }; + + i2c1: i2c@1fbf8100 { + compatible = "mediatek,mt7621-i2c"; + reg = <0x0 0x1fbf8100 0x0 0x100>; + + resets = <&scuclk EN7581_I2C_MASTER_RST>; + + clocks = <&clk20m>; + clock-frequency = <100000>; + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + }; }; };