From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Date: Mon, 22 Jun 2020 15:56:15 +0000 (+0300)
Subject: pinctrl: merrifield: Update pin names in accordance with official list
X-Git-Tag: v5.9-rc1~77^2~13^2~4
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=503a02b72d457f18eccf58296f9b50df6666d7fc;p=thirdparty%2Fkernel%2Flinux.git

pinctrl: merrifield: Update pin names in accordance with official list

Some of the pin names were provided officially to the customers
in different spelling. We update pin names in accordance with
the official list.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---

diff --git a/drivers/pinctrl/intel/pinctrl-merrifield.c b/drivers/pinctrl/intel/pinctrl-merrifield.c
index 04ca8ae95df83..2c213714df30d 100644
--- a/drivers/pinctrl/intel/pinctrl-merrifield.c
+++ b/drivers/pinctrl/intel/pinctrl-merrifield.c
@@ -135,7 +135,7 @@ static const struct pinctrl_pin_desc mrfld_pins[] = {
 	PINCTRL_PIN(43, "GP83_SD_D3"),
 	PINCTRL_PIN(44, "GP84_SD_LS_CLK_FB"),
 	PINCTRL_PIN(45, "GP85_SD_LS_CMD_DIR"),
-	PINCTRL_PIN(46, "GP86_SD_LVL_D_DIR"),
+	PINCTRL_PIN(46, "GP86_SD_LS_D_DIR"),
 	PINCTRL_PIN(47, "GP88_SD_LS_SEL"),
 	PINCTRL_PIN(48, "GP87_SD_PD"),
 	PINCTRL_PIN(49, "GP89_SD_WP"),
@@ -171,28 +171,28 @@ static const struct pinctrl_pin_desc mrfld_pins[] = {
 	PINCTRL_PIN(77, "GP42_I2S_2_RXD"),
 	PINCTRL_PIN(78, "GP43_I2S_2_TXD"),
 	/* Family 6: GP SSP (22 pins) */
-	PINCTRL_PIN(79, "GP120_SPI_3_CLK"),
-	PINCTRL_PIN(80, "GP121_SPI_3_SS"),
-	PINCTRL_PIN(81, "GP122_SPI_3_RXD"),
-	PINCTRL_PIN(82, "GP123_SPI_3_TXD"),
-	PINCTRL_PIN(83, "GP102_SPI_4_CLK"),
-	PINCTRL_PIN(84, "GP103_SPI_4_SS_0"),
-	PINCTRL_PIN(85, "GP104_SPI_4_SS_1"),
-	PINCTRL_PIN(86, "GP105_SPI_4_SS_2"),
-	PINCTRL_PIN(87, "GP106_SPI_4_SS_3"),
-	PINCTRL_PIN(88, "GP107_SPI_4_RXD"),
-	PINCTRL_PIN(89, "GP108_SPI_4_TXD"),
-	PINCTRL_PIN(90, "GP109_SPI_5_CLK"),
-	PINCTRL_PIN(91, "GP110_SPI_5_SS_0"),
-	PINCTRL_PIN(92, "GP111_SPI_5_SS_1"),
-	PINCTRL_PIN(93, "GP112_SPI_5_SS_2"),
-	PINCTRL_PIN(94, "GP113_SPI_5_SS_3"),
-	PINCTRL_PIN(95, "GP114_SPI_5_RXD"),
-	PINCTRL_PIN(96, "GP115_SPI_5_TXD"),
-	PINCTRL_PIN(97, "GP116_SPI_6_CLK"),
-	PINCTRL_PIN(98, "GP117_SPI_6_SS"),
-	PINCTRL_PIN(99, "GP118_SPI_6_RXD"),
-	PINCTRL_PIN(100, "GP119_SPI_6_TXD"),
+	PINCTRL_PIN(79, "GP120_SPI_0_CLK"),
+	PINCTRL_PIN(80, "GP121_SPI_0_SS"),
+	PINCTRL_PIN(81, "GP122_SPI_0_RXD"),
+	PINCTRL_PIN(82, "GP123_SPI_0_TXD"),
+	PINCTRL_PIN(83, "GP102_SPI_1_CLK"),
+	PINCTRL_PIN(84, "GP103_SPI_1_SS0"),
+	PINCTRL_PIN(85, "GP104_SPI_1_SS1"),
+	PINCTRL_PIN(86, "GP105_SPI_1_SS2"),
+	PINCTRL_PIN(87, "GP106_SPI_1_SS3"),
+	PINCTRL_PIN(88, "GP107_SPI_1_RXD"),
+	PINCTRL_PIN(89, "GP108_SPI_1_TXD"),
+	PINCTRL_PIN(90, "GP109_SPI_2_CLK"),
+	PINCTRL_PIN(91, "GP110_SPI_2_SS0"),
+	PINCTRL_PIN(92, "GP111_SPI_2_SS1"),
+	PINCTRL_PIN(93, "GP112_SPI_2_SS2"),
+	PINCTRL_PIN(94, "GP113_SPI_2_SS3"),
+	PINCTRL_PIN(95, "GP114_SPI_2_RXD"),
+	PINCTRL_PIN(96, "GP115_SPI_2_TXD"),
+	PINCTRL_PIN(97, "GP116_SPI_3_CLK"),
+	PINCTRL_PIN(98, "GP117_SPI_3_SS"),
+	PINCTRL_PIN(99, "GP118_SPI_3_RXD"),
+	PINCTRL_PIN(100, "GP119_SPI_3_TXD"),
 	/* Family 7: I2C (14 pins) */
 	PINCTRL_PIN(101, "GP19_I2C_1_SCL"),
 	PINCTRL_PIN(102, "GP20_I2C_1_SDA"),