From: Greg Kroah-Hartman Date: Fri, 6 May 2016 16:30:10 +0000 (-0400) Subject: 4.5-stable patches X-Git-Tag: v3.14.69~30 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=50afa18e46460207a21545e0114d04544109bce8;p=thirdparty%2Fkernel%2Fstable-queue.git 4.5-stable patches added patches: ata-ahci_xgene-dereferencing-uninitialized-pointer-in-probe.patch ath10k-fix-pktlog-in-qca99x0.patch clk-bcm2835-fix-check-of-error-code-returned-by-devm_ioremap_resource.patch clk-divider-make-sure-read-only-dividers-do-not-write-to-their-register.patch clk-meson-fix-meson_clk_register_clks-signature-type-mismatch.patch clk-qcom-msm8960-fix-ce3_core-clk-enable-register.patch clk-qcom-msm8960-fix-ce3_src-register-offset.patch clk-rockchip-fix-wrong-mmc-phase-shift-for-rk3228.patch clk-rockchip-free-memory-in-error-cases-when-registering-clock-branches.patch clk-sunxi-fix-sun8i-a23-apb0-clk-divider-flags.patch clk-versatile-sp810-support-reentrance.patch clk-xgene-add-missing-parenthesis-when-clearing-divider-value.patch clocksource-drivers-tango-xtal-fix-boot-hang-due-to-incorrect-test.patch cns3xxx-fix-pci-cns3xxx_write_config.patch ipvs-correct-initial-offset-of-call-id-header-search-in-sip-persistence-engine.patch ipvs-drop-first-packet-to-redirect-conntrack.patch ipvs-handle-ip_vs_fill_iph_skb_off-failure.patch lightnvm-update-closed-list-outside-of-intr-context.patch lpfc-fix-misleading-indentation.patch mfd-intel-lpss-remove-clock-tree-on-error-path.patch mwifiex-fix-corner-case-association-failure.patch nbd-ratelimit-error-msgs-after-socket-close.patch net-mlx5_core-fix-caching-atomic-endian-mode-capability.patch null_blk-add-lightnvm-null_blk-device-to-the-nullb_list.patch pwm-omap-dmtimer-add-sanity-checking-for-load-and-match-values.patch pwm-omap-dmtimer-fix-inaccurate-period-and-duty-cycle-calculations.patch pwm-omap-dmtimer-round-load-and-match-values-rather-than-truncate.patch rdma-iw_cxgb4-fix-bar2-virt-addr-calculation-for-t4-chips.patch rtlwifi-fix-size-of-wireless-mode-variable.patch soc-rockchip-power-domain-fix-err-handle-while-probing.patch wlcore-fix-error-handling-in-wlcore_event_fw_logger.patch --- diff --git a/queue-3.14/series b/queue-3.14/series new file mode 100644 index 00000000000..88f4f398862 --- /dev/null +++ b/queue-3.14/series @@ -0,0 +1,4 @@ +ipvs-correct-initial-offset-of-call-id-header-search-in-sip-persistence-engine.patch +nbd-ratelimit-error-msgs-after-socket-close.patch +clk-versatile-sp810-support-reentrance.patch +lpfc-fix-misleading-indentation.patch diff --git a/queue-4.4/series b/queue-4.4/series new file mode 100644 index 00000000000..98e8f6c7995 --- /dev/null +++ b/queue-4.4/series @@ -0,0 +1,19 @@ +revert-powerpc-tm-check-for-already-reclaimed-tasks.patch +rdma-iw_cxgb4-fix-bar2-virt-addr-calculation-for-t4-chips.patch +xprtrdma-clean-up-unused-rpcrdma_inline_pad_thresh-macro.patch +ipvs-handle-ip_vs_fill_iph_skb_off-failure.patch +ipvs-correct-initial-offset-of-call-id-header-search-in-sip-persistence-engine.patch +ipvs-drop-first-packet-to-redirect-conntrack.patch +mfd-intel-lpss-remove-clock-tree-on-error-path.patch +nbd-ratelimit-error-msgs-after-socket-close.patch +ata-ahci_xgene-dereferencing-uninitialized-pointer-in-probe.patch +mwifiex-fix-corner-case-association-failure.patch +cns3xxx-fix-pci-cns3xxx_write_config.patch +clk-divider-make-sure-read-only-dividers-do-not-write-to-their-register.patch +soc-rockchip-power-domain-fix-err-handle-while-probing.patch +clk-rockchip-free-memory-in-error-cases-when-registering-clock-branches.patch +clk-meson-fix-meson_clk_register_clks-signature-type-mismatch.patch +clk-qcom-msm8960-fix-ce3_core-clk-enable-register.patch +clk-versatile-sp810-support-reentrance.patch +clk-qcom-msm8960-fix-ce3_src-register-offset.patch +lpfc-fix-misleading-indentation.patch diff --git a/queue-4.5/ata-ahci_xgene-dereferencing-uninitialized-pointer-in-probe.patch b/queue-4.5/ata-ahci_xgene-dereferencing-uninitialized-pointer-in-probe.patch new file mode 100644 index 00000000000..f3613a41454 --- /dev/null +++ b/queue-4.5/ata-ahci_xgene-dereferencing-uninitialized-pointer-in-probe.patch @@ -0,0 +1,36 @@ +From 8134233e8d346aaa1c929dc510e75482ae318bce Mon Sep 17 00:00:00 2001 +From: Dan Carpenter +Date: Thu, 10 Mar 2016 10:45:32 +0300 +Subject: ata: ahci_xgene: dereferencing uninitialized pointer in probe + +From: Dan Carpenter + +commit 8134233e8d346aaa1c929dc510e75482ae318bce upstream. + +If the call to acpi_get_object_info() fails then "info" hasn't been +initialized. In that situation, we already know that "version" should +be XGENE_AHCI_V1 so we don't actually need to dereference "info". + +Fixes: c9802a4be661 ('ata: ahci_xgene: Add AHCI Support for 2nd HW version of APM X-Gene SoC AHCI SATA Host controller.') +Signed-off-by: Dan Carpenter +Signed-off-by: Tejun Heo +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/ata/ahci_xgene.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/ata/ahci_xgene.c ++++ b/drivers/ata/ahci_xgene.c +@@ -821,9 +821,9 @@ static int xgene_ahci_probe(struct platf + dev_warn(&pdev->dev, "%s: Error reading device info. Assume version1\n", + __func__); + version = XGENE_AHCI_V1; +- } +- if (info->valid & ACPI_VALID_CID) ++ } else if (info->valid & ACPI_VALID_CID) { + version = XGENE_AHCI_V2; ++ } + } + } + #endif diff --git a/queue-4.5/ath10k-fix-pktlog-in-qca99x0.patch b/queue-4.5/ath10k-fix-pktlog-in-qca99x0.patch new file mode 100644 index 00000000000..9751d63d266 --- /dev/null +++ b/queue-4.5/ath10k-fix-pktlog-in-qca99x0.patch @@ -0,0 +1,38 @@ +From 53a5c9bc53ce51f65699a43c67ab167436d28083 Mon Sep 17 00:00:00 2001 +From: Ashok Raj Nagarajan +Date: Fri, 5 Feb 2016 21:12:48 +0530 +Subject: ath10k: fix pktlog in QCA99X0 + +From: Ashok Raj Nagarajan + +commit 53a5c9bc53ce51f65699a43c67ab167436d28083 upstream. + +Currently, we are providing wrong payload data of pktlog to trace points. +Data we receive from FW through copy engine 8 contains pktlog data alone. +We don't need to parse anything in driver before handing it to trace +points. + +Fixes: afb0bf7f530b ("ath10k: add support for pktlog in QCA99X0") +Signed-off-by: Ashok Raj Nagarajan +Signed-off-by: Kalle Valo +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/net/wireless/ath/ath10k/htt_rx.c | 6 +----- + 1 file changed, 1 insertion(+), 5 deletions(-) + +--- a/drivers/net/wireless/ath/ath10k/htt_rx.c ++++ b/drivers/net/wireless/ath/ath10k/htt_rx.c +@@ -2143,11 +2143,7 @@ EXPORT_SYMBOL(ath10k_htt_t2h_msg_handler + void ath10k_htt_rx_pktlog_completion_handler(struct ath10k *ar, + struct sk_buff *skb) + { +- struct ath10k_pktlog_10_4_hdr *hdr = +- (struct ath10k_pktlog_10_4_hdr *)skb->data; +- +- trace_ath10k_htt_pktlog(ar, hdr->payload, +- sizeof(*hdr) + __le16_to_cpu(hdr->size)); ++ trace_ath10k_htt_pktlog(ar, skb->data, skb->len); + dev_kfree_skb_any(skb); + } + EXPORT_SYMBOL(ath10k_htt_rx_pktlog_completion_handler); diff --git a/queue-4.5/clk-bcm2835-fix-check-of-error-code-returned-by-devm_ioremap_resource.patch b/queue-4.5/clk-bcm2835-fix-check-of-error-code-returned-by-devm_ioremap_resource.patch new file mode 100644 index 00000000000..e10f948b3af --- /dev/null +++ b/queue-4.5/clk-bcm2835-fix-check-of-error-code-returned-by-devm_ioremap_resource.patch @@ -0,0 +1,38 @@ +From 4d3ac6662452060721599a3392bc2f524af984cb Mon Sep 17 00:00:00 2001 +From: Vladimir Zapolskiy +Date: Sun, 6 Mar 2016 03:21:35 +0200 +Subject: clk: bcm2835: fix check of error code returned by devm_ioremap_resource() + +From: Vladimir Zapolskiy + +commit 4d3ac6662452060721599a3392bc2f524af984cb upstream. + +The change fixes potential oops while accessing iomem on invalid +address, if devm_ioremap_resource() fails due to some reason. + +The devm_ioremap_resource() function returns ERR_PTR() and never +returns NULL, which makes useless a following check for NULL. + +Signed-off-by: Vladimir Zapolskiy +Fixes: 5e63dcc74b30 ("clk: bcm2835: Add a driver for the auxiliary peripheral clock gates") +Reviewed-by: Eric Anholt +Signed-off-by: Stephen Boyd +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/clk/bcm/clk-bcm2835-aux.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/clk/bcm/clk-bcm2835-aux.c ++++ b/drivers/clk/bcm/clk-bcm2835-aux.c +@@ -38,8 +38,8 @@ static int bcm2835_aux_clk_probe(struct + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + reg = devm_ioremap_resource(dev, res); +- if (!reg) +- return -ENODEV; ++ if (IS_ERR(reg)) ++ return PTR_ERR(reg); + + onecell = devm_kmalloc(dev, sizeof(*onecell), GFP_KERNEL); + if (!onecell) diff --git a/queue-4.5/clk-divider-make-sure-read-only-dividers-do-not-write-to-their-register.patch b/queue-4.5/clk-divider-make-sure-read-only-dividers-do-not-write-to-their-register.patch new file mode 100644 index 00000000000..50a14ee15ce --- /dev/null +++ b/queue-4.5/clk-divider-make-sure-read-only-dividers-do-not-write-to-their-register.patch @@ -0,0 +1,103 @@ +From 50359819794b4a16ae35051cd80f2dab025f6019 Mon Sep 17 00:00:00 2001 +From: Heiko Stuebner +Date: Thu, 21 Jan 2016 21:53:09 +0100 +Subject: clk-divider: make sure read-only dividers do not write to their register + +From: Heiko Stuebner + +commit 50359819794b4a16ae35051cd80f2dab025f6019 upstream. + +Commit e6d5e7d90be9 ("clk-divider: Fix READ_ONLY when divider > 1") removed +the special ops struct for read-only clocks and instead opted to handle +them inside the regular ops. + +On the rk3368 this results in breakage as aclkm now gets set a value. +While it is the same divider value, the A53 core still doesn't like it, +which can result in the cpu ending up in a hang. +The reason being that "ACLKENMasserts one clock cycle before the rising +edge of ACLKM" and the clock should only be touched when STANDBYWFIL2 +is asserted. + +To fix this, reintroduce the read-only ops but do include the round_rate +callback. That way no writes that may be unsafe are done to the divider +register in any case. + +The Rockchip use of the clk_divider_ops is adapted to this split again, +as is the nxp, lpc18xx-ccu driver that was included since the original +commit. On lpc18xx-ccu the divider seems to always be read-only +so only uses the new ops now. + +Fixes: e6d5e7d90be9 ("clk-divider: Fix READ_ONLY when divider > 1") +Reported-by: Zhang Qing +Signed-off-by: Heiko Stuebner +Signed-off-by: Stephen Boyd +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/clk/clk-divider.c | 11 ++++++++++- + drivers/clk/nxp/clk-lpc18xx-ccu.c | 2 +- + drivers/clk/rockchip/clk.c | 4 +++- + include/linux/clk-provider.h | 1 + + 4 files changed, 15 insertions(+), 3 deletions(-) + +--- a/drivers/clk/clk-divider.c ++++ b/drivers/clk/clk-divider.c +@@ -423,6 +423,12 @@ const struct clk_ops clk_divider_ops = { + }; + EXPORT_SYMBOL_GPL(clk_divider_ops); + ++const struct clk_ops clk_divider_ro_ops = { ++ .recalc_rate = clk_divider_recalc_rate, ++ .round_rate = clk_divider_round_rate, ++}; ++EXPORT_SYMBOL_GPL(clk_divider_ro_ops); ++ + static struct clk *_register_divider(struct device *dev, const char *name, + const char *parent_name, unsigned long flags, + void __iomem *reg, u8 shift, u8 width, +@@ -446,7 +452,10 @@ static struct clk *_register_divider(str + return ERR_PTR(-ENOMEM); + + init.name = name; +- init.ops = &clk_divider_ops; ++ if (clk_divider_flags & CLK_DIVIDER_READ_ONLY) ++ init.ops = &clk_divider_ro_ops; ++ else ++ init.ops = &clk_divider_ops; + init.flags = flags | CLK_IS_BASIC; + init.parent_names = (parent_name ? &parent_name: NULL); + init.num_parents = (parent_name ? 1 : 0); +--- a/drivers/clk/nxp/clk-lpc18xx-ccu.c ++++ b/drivers/clk/nxp/clk-lpc18xx-ccu.c +@@ -222,7 +222,7 @@ static void lpc18xx_ccu_register_branch_ + div->width = 1; + + div_hw = &div->hw; +- div_ops = &clk_divider_ops; ++ div_ops = &clk_divider_ro_ops; + } + + branch->gate.reg = branch->offset + reg_base; +--- a/drivers/clk/rockchip/clk.c ++++ b/drivers/clk/rockchip/clk.c +@@ -90,7 +90,9 @@ static struct clk *rockchip_clk_register + div->width = div_width; + div->lock = lock; + div->table = div_table; +- div_ops = &clk_divider_ops; ++ div_ops = (div_flags & CLK_DIVIDER_READ_ONLY) ++ ? &clk_divider_ro_ops ++ : &clk_divider_ops; + } + + clk = clk_register_composite(NULL, name, parent_names, num_parents, +--- a/include/linux/clk-provider.h ++++ b/include/linux/clk-provider.h +@@ -385,6 +385,7 @@ struct clk_divider { + #define CLK_DIVIDER_MAX_AT_ZERO BIT(6) + + extern const struct clk_ops clk_divider_ops; ++extern const struct clk_ops clk_divider_ro_ops; + + unsigned long divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate, + unsigned int val, const struct clk_div_table *table, diff --git a/queue-4.5/clk-meson-fix-meson_clk_register_clks-signature-type-mismatch.patch b/queue-4.5/clk-meson-fix-meson_clk_register_clks-signature-type-mismatch.patch new file mode 100644 index 00000000000..82f7fdf817f --- /dev/null +++ b/queue-4.5/clk-meson-fix-meson_clk_register_clks-signature-type-mismatch.patch @@ -0,0 +1,38 @@ +From bb473593c8099302bfd7befc23de67df907e3a99 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Andreas=20F=C3=A4rber?= +Date: Sun, 7 Feb 2016 22:13:03 +0100 +Subject: clk: meson: Fix meson_clk_register_clks() signature type mismatch +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Andreas Färber + +commit bb473593c8099302bfd7befc23de67df907e3a99 upstream. + +As preparation for arm64 based mesongxbb, which pulls in this code once +enabling ARCH_MESON, fix a size_t vs. unsigned int type mismatch. +The loop uses a local unsigned int variable, so adopt that type, +matching the header. + +Fixes: 7a29a869434e ("clk: meson: Add support for Meson clock controller") +Signed-off-by: Andreas Färber +Acked-by: Carlo Caione +Signed-off-by: Stephen Boyd +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/clk/meson/clkc.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/clk/meson/clkc.c ++++ b/drivers/clk/meson/clkc.c +@@ -198,7 +198,7 @@ meson_clk_register_fixed_rate(const stru + } + + void __init meson_clk_register_clks(const struct clk_conf *clk_confs, +- size_t nr_confs, ++ unsigned int nr_confs, + void __iomem *clk_base) + { + unsigned int i; diff --git a/queue-4.5/clk-qcom-msm8960-fix-ce3_core-clk-enable-register.patch b/queue-4.5/clk-qcom-msm8960-fix-ce3_core-clk-enable-register.patch new file mode 100644 index 00000000000..09fe986ce5e --- /dev/null +++ b/queue-4.5/clk-qcom-msm8960-fix-ce3_core-clk-enable-register.patch @@ -0,0 +1,32 @@ +From 732d6913691848db9fabaa6a25b4d6fad10ddccf Mon Sep 17 00:00:00 2001 +From: Srinivas Kandagatla +Date: Mon, 22 Feb 2016 11:43:39 +0000 +Subject: clk: qcom: msm8960: fix ce3_core clk enable register + +From: Srinivas Kandagatla + +commit 732d6913691848db9fabaa6a25b4d6fad10ddccf upstream. + +This patch corrects the enable register offset which is actually 0x36cc +instead of 0x36c4 + +Signed-off-by: Srinivas Kandagatla +Fixes: 5f775498bdc4 ("clk: qcom: Fully support apq8064 global clock control") +Signed-off-by: Stephen Boyd +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/clk/qcom/gcc-msm8960.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/clk/qcom/gcc-msm8960.c ++++ b/drivers/clk/qcom/gcc-msm8960.c +@@ -2769,7 +2769,7 @@ static struct clk_branch ce3_core_clk = + .halt_reg = 0x2fdc, + .halt_bit = 5, + .clkr = { +- .enable_reg = 0x36c4, ++ .enable_reg = 0x36cc, + .enable_mask = BIT(4), + .hw.init = &(struct clk_init_data){ + .name = "ce3_core_clk", diff --git a/queue-4.5/clk-qcom-msm8960-fix-ce3_src-register-offset.patch b/queue-4.5/clk-qcom-msm8960-fix-ce3_src-register-offset.patch new file mode 100644 index 00000000000..91c0cfe7d43 --- /dev/null +++ b/queue-4.5/clk-qcom-msm8960-fix-ce3_src-register-offset.patch @@ -0,0 +1,33 @@ +From 0f75e1a370fd843c9e508fc1ccf0662833034827 Mon Sep 17 00:00:00 2001 +From: Stephen Boyd +Date: Tue, 1 Mar 2016 17:26:48 -0800 +Subject: clk: qcom: msm8960: Fix ce3_src register offset + +From: Stephen Boyd + +commit 0f75e1a370fd843c9e508fc1ccf0662833034827 upstream. + +The offset seems to have been copied from the sata clk. Fix it so +that enabling the crypto engine source clk works. + +Tested-by: Srinivas Kandagatla +Tested-by: Bjorn Andersson +Fixes: 5f775498bdc4 ("clk: qcom: Fully support apq8064 global clock control") +Signed-off-by: Stephen Boyd +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/clk/qcom/gcc-msm8960.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/clk/qcom/gcc-msm8960.c ++++ b/drivers/clk/qcom/gcc-msm8960.c +@@ -2753,7 +2753,7 @@ static struct clk_rcg ce3_src = { + }, + .freq_tbl = clk_tbl_ce3, + .clkr = { +- .enable_reg = 0x2c08, ++ .enable_reg = 0x36c0, + .enable_mask = BIT(7), + .hw.init = &(struct clk_init_data){ + .name = "ce3_src", diff --git a/queue-4.5/clk-rockchip-fix-wrong-mmc-phase-shift-for-rk3228.patch b/queue-4.5/clk-rockchip-fix-wrong-mmc-phase-shift-for-rk3228.patch new file mode 100644 index 00000000000..e1e6f036977 --- /dev/null +++ b/queue-4.5/clk-rockchip-fix-wrong-mmc-phase-shift-for-rk3228.patch @@ -0,0 +1,41 @@ +From bb07698fc8d13ec74f4f5bd87b04953777ee6982 Mon Sep 17 00:00:00 2001 +From: Shawn Lin +Date: Tue, 26 Jan 2016 11:30:18 +0800 +Subject: clk: rockchip: fix wrong mmc phase shift for rk3228 + +From: Shawn Lin + +commit bb07698fc8d13ec74f4f5bd87b04953777ee6982 upstream. + +mmc sample shift is 0 for rk3228 refer to user manaul. +So it's broken if we enable mmc tuning for rk3228. + +Fixes: 307a2e9ac ("clk: rockchip: add clock controller for rk3228") +Signed-off-by: Shawn Lin +Reviewed-by: Xing Zheng +Signed-off-by: Heiko Stuebner +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/clk/rockchip/clk-rk3228.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +--- a/drivers/clk/rockchip/clk-rk3228.c ++++ b/drivers/clk/rockchip/clk-rk3228.c +@@ -605,13 +605,13 @@ static struct rockchip_clk_branch rk3228 + + /* PD_MMC */ + MMC(SCLK_SDMMC_DRV, "sdmmc_drv", "sclk_sdmmc", RK3228_SDMMC_CON0, 1), +- MMC(SCLK_SDMMC_SAMPLE, "sdmmc_sample", "sclk_sdmmc", RK3228_SDMMC_CON1, 1), ++ MMC(SCLK_SDMMC_SAMPLE, "sdmmc_sample", "sclk_sdmmc", RK3228_SDMMC_CON1, 0), + + MMC(SCLK_SDIO_DRV, "sdio_drv", "sclk_sdio", RK3228_SDIO_CON0, 1), +- MMC(SCLK_SDIO_SAMPLE, "sdio_sample", "sclk_sdio", RK3228_SDIO_CON1, 1), ++ MMC(SCLK_SDIO_SAMPLE, "sdio_sample", "sclk_sdio", RK3228_SDIO_CON1, 0), + + MMC(SCLK_EMMC_DRV, "emmc_drv", "sclk_emmc", RK3228_EMMC_CON0, 1), +- MMC(SCLK_EMMC_SAMPLE, "emmc_sample", "sclk_emmc", RK3228_EMMC_CON1, 1), ++ MMC(SCLK_EMMC_SAMPLE, "emmc_sample", "sclk_emmc", RK3228_EMMC_CON1, 0), + }; + + static const char *const rk3228_critical_clocks[] __initconst = { diff --git a/queue-4.5/clk-rockchip-free-memory-in-error-cases-when-registering-clock-branches.patch b/queue-4.5/clk-rockchip-free-memory-in-error-cases-when-registering-clock-branches.patch new file mode 100644 index 00000000000..ccadbc5ecf9 --- /dev/null +++ b/queue-4.5/clk-rockchip-free-memory-in-error-cases-when-registering-clock-branches.patch @@ -0,0 +1,52 @@ +From 2467b6745e0ae9c6cdccff24c4cceeb14b1cce3f Mon Sep 17 00:00:00 2001 +From: Shawn Lin +Date: Tue, 2 Feb 2016 11:37:50 +0800 +Subject: clk: rockchip: free memory in error cases when registering clock branches + +From: Shawn Lin + +commit 2467b6745e0ae9c6cdccff24c4cceeb14b1cce3f upstream. + +Add free memeory if rockchip_clk_register_branch fails. + +Fixes: a245fecbb806 ("clk: rockchip: add basic infrastructure...") +Signed-off-by: Shawn Lin +Signed-off-by: Heiko Stuebner +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/clk/rockchip/clk.c | 9 +++++++-- + 1 file changed, 7 insertions(+), 2 deletions(-) + +--- a/drivers/clk/rockchip/clk.c ++++ b/drivers/clk/rockchip/clk.c +@@ -70,7 +70,7 @@ static struct clk *rockchip_clk_register + if (gate_offset >= 0) { + gate = kzalloc(sizeof(*gate), GFP_KERNEL); + if (!gate) +- return ERR_PTR(-ENOMEM); ++ goto err_gate; + + gate->flags = gate_flags; + gate->reg = base + gate_offset; +@@ -82,7 +82,7 @@ static struct clk *rockchip_clk_register + if (div_width > 0) { + div = kzalloc(sizeof(*div), GFP_KERNEL); + if (!div) +- return ERR_PTR(-ENOMEM); ++ goto err_div; + + div->flags = div_flags; + div->reg = base + muxdiv_offset; +@@ -102,6 +102,11 @@ static struct clk *rockchip_clk_register + flags); + + return clk; ++err_div: ++ kfree(gate); ++err_gate: ++ kfree(mux); ++ return ERR_PTR(-ENOMEM); + } + + struct rockchip_clk_frac { diff --git a/queue-4.5/clk-sunxi-fix-sun8i-a23-apb0-clk-divider-flags.patch b/queue-4.5/clk-sunxi-fix-sun8i-a23-apb0-clk-divider-flags.patch new file mode 100644 index 00000000000..02e5dd3d863 --- /dev/null +++ b/queue-4.5/clk-sunxi-fix-sun8i-a23-apb0-clk-divider-flags.patch @@ -0,0 +1,35 @@ +From 33f60d02605a3a604e56b07a78d80d7d801b2843 Mon Sep 17 00:00:00 2001 +From: Chen-Yu Tsai +Date: Mon, 15 Feb 2016 17:40:19 +0800 +Subject: clk: sunxi: Fix sun8i-a23-apb0-clk divider flags + +From: Chen-Yu Tsai + +commit 33f60d02605a3a604e56b07a78d80d7d801b2843 upstream. + +The APB0 clock on A23 is a zero-based divider, not a power-of-two based +divider. + +Note that this patch does not apply cleanly to kernels before 4.5-rc1, +which added CLK_OF_DECLARE support to this driver. + +Fixes: 57a1fbf28424 ("clk: sunxi: Add A23 APB0 divider clock support") +Signed-off-by: Chen-Yu Tsai +Signed-off-by: Maxime Ripard +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/clk/sunxi/clk-sun8i-apb0.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/clk/sunxi/clk-sun8i-apb0.c ++++ b/drivers/clk/sunxi/clk-sun8i-apb0.c +@@ -36,7 +36,7 @@ static struct clk *sun8i_a23_apb0_regist + + /* The A23 APB0 clock is a standard 2 bit wide divider clock */ + clk = clk_register_divider(NULL, clk_name, clk_parent, 0, reg, +- 0, 2, CLK_DIVIDER_POWER_OF_TWO, NULL); ++ 0, 2, 0, NULL); + if (IS_ERR(clk)) + return clk; + diff --git a/queue-4.5/clk-versatile-sp810-support-reentrance.patch b/queue-4.5/clk-versatile-sp810-support-reentrance.patch new file mode 100644 index 00000000000..51b993fa510 --- /dev/null +++ b/queue-4.5/clk-versatile-sp810-support-reentrance.patch @@ -0,0 +1,85 @@ +From ec7957a6aa0aaf981fb8356dc47a2cdd01cde03c Mon Sep 17 00:00:00 2001 +From: Linus Walleij +Date: Wed, 24 Feb 2016 09:39:11 +0100 +Subject: clk: versatile: sp810: support reentrance + +From: Linus Walleij + +commit ec7957a6aa0aaf981fb8356dc47a2cdd01cde03c upstream. + +Despite care take to allocate clocks state containers the +SP810 driver actually just supports creating one instance: +all clocks registered for every instance will end up with the +exact same name and __clk_init() will fail. + +Rename the timclken<0> .. timclken to sp810__ +so every clock on every instance gets a unique name. + +This is necessary for the RealView PBA8 which has two SP810 +blocks: the second block will not register its clocks unless +every clock on every instance is unique and results in boot +logs like this: + +------------[ cut here ]------------ +WARNING: CPU: 0 PID: 0 at ../drivers/clk/versatile/clk-sp810.c:137 + clk_sp810_of_setup+0x110/0x154() +Modules linked in: +CPU: 0 PID: 0 Comm: swapper/0 Not tainted +4.5.0-rc2-00030-g352718fc39f6-dirty #225 +Hardware name: ARM RealView Machine (Device Tree Support) +[] (unwind_backtrace) from [] + (show_stack+0x10/0x14) +[] (show_stack) from [] + (dump_stack+0x84/0x9c) +[] (dump_stack) from [] + (warn_slowpath_common+0x74/0xb0) +[] (warn_slowpath_common) from [] + (warn_slowpath_null+0x1c/0x24) +[] (warn_slowpath_null) from [] + (clk_sp810_of_setup+0x110/0x154) +[] (clk_sp810_of_setup) from [] + (of_clk_init+0x12c/0x1c8) +[] (of_clk_init) from [] + (time_init+0x20/0x2c) +[] (time_init) from [] + (start_kernel+0x244/0x3c4) +[] (start_kernel) from [<7000807c>] (0x7000807c) +---[ end trace cb88537fdc8fa200 ]--- + +Cc: Michael Turquette +Cc: Pawel Moll +Fixes: 6e973d2c4385 "clk: vexpress: Add separate SP810 driver" +Signed-off-by: Linus Walleij +Signed-off-by: Stephen Boyd +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/clk/versatile/clk-sp810.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +--- a/drivers/clk/versatile/clk-sp810.c ++++ b/drivers/clk/versatile/clk-sp810.c +@@ -92,6 +92,7 @@ static void __init clk_sp810_of_setup(st + int num = ARRAY_SIZE(parent_names); + char name[12]; + struct clk_init_data init; ++ static int instance; + int i; + bool deprecated; + +@@ -117,7 +118,7 @@ static void __init clk_sp810_of_setup(st + deprecated = !of_find_property(node, "assigned-clock-parents", NULL); + + for (i = 0; i < ARRAY_SIZE(sp810->timerclken); i++) { +- snprintf(name, ARRAY_SIZE(name), "timerclken%d", i); ++ snprintf(name, sizeof(name), "sp810_%d_%d", instance, i); + + sp810->timerclken[i].sp810 = sp810; + sp810->timerclken[i].channel = i; +@@ -138,5 +139,6 @@ static void __init clk_sp810_of_setup(st + } + + of_clk_add_provider(node, clk_sp810_timerclken_of_get, sp810); ++ instance++; + } + CLK_OF_DECLARE(sp810, "arm,sp810", clk_sp810_of_setup); diff --git a/queue-4.5/clk-xgene-add-missing-parenthesis-when-clearing-divider-value.patch b/queue-4.5/clk-xgene-add-missing-parenthesis-when-clearing-divider-value.patch new file mode 100644 index 00000000000..16cb17a31a6 --- /dev/null +++ b/queue-4.5/clk-xgene-add-missing-parenthesis-when-clearing-divider-value.patch @@ -0,0 +1,36 @@ +From 0f4c7a138dfefb0ebdbaf56e3ba2acd2958a6605 Mon Sep 17 00:00:00 2001 +From: Loc Ho +Date: Mon, 29 Feb 2016 14:15:43 -0700 +Subject: clk: xgene: Add missing parenthesis when clearing divider value + +From: Loc Ho + +commit 0f4c7a138dfefb0ebdbaf56e3ba2acd2958a6605 upstream. + +In the initial fix for non-zero divider shift value, the parenthesis +was missing after the negate operation. This patch adds the required +parenthesis. Otherwise, lower bits may be cleared unintentionally. + +Signed-off-by: Loc Ho +Acked-by: Toan Le +Fixes: 1382ea631ddd ("clk: xgene: Fix divider with non-zero shift value") +Signed-off-by: Stephen Boyd +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/clk/clk-xgene.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/clk/clk-xgene.c ++++ b/drivers/clk/clk-xgene.c +@@ -351,8 +351,8 @@ static int xgene_clk_set_rate(struct clk + /* Set new divider */ + data = xgene_clk_read(pclk->param.divider_reg + + pclk->param.reg_divider_offset); +- data &= ~((1 << pclk->param.reg_divider_width) - 1) +- << pclk->param.reg_divider_shift; ++ data &= ~(((1 << pclk->param.reg_divider_width) - 1) ++ << pclk->param.reg_divider_shift); + data |= divider; + xgene_clk_write(data, pclk->param.divider_reg + + pclk->param.reg_divider_offset); diff --git a/queue-4.5/clocksource-drivers-tango-xtal-fix-boot-hang-due-to-incorrect-test.patch b/queue-4.5/clocksource-drivers-tango-xtal-fix-boot-hang-due-to-incorrect-test.patch new file mode 100644 index 00000000000..ea6c01e4683 --- /dev/null +++ b/queue-4.5/clocksource-drivers-tango-xtal-fix-boot-hang-due-to-incorrect-test.patch @@ -0,0 +1,35 @@ +From 16eeed7e5558a3dcf30f75526a896b2632f299f9 Mon Sep 17 00:00:00 2001 +From: Daniel Lezcano +Date: Tue, 19 Apr 2016 15:43:02 +0200 +Subject: clocksource/drivers/tango-xtal: Fix boot hang due to incorrect test + +From: Daniel Lezcano + +commit 16eeed7e5558a3dcf30f75526a896b2632f299f9 upstream. + +Commit 0881841f7e78 introduced a regression by inverting a test check +after calling clocksource_mmio_init(). That results on the system to +hang at boot time. + +Fix it by inverting the test again. + +Fixes: 0881841f7e78 ("Replace code by clocksource_mmio_init") +Reported-by: Marc Gonzalez +Signed-off-by: Daniel Lezcano +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/clocksource/tango_xtal.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/clocksource/tango_xtal.c ++++ b/drivers/clocksource/tango_xtal.c +@@ -42,7 +42,7 @@ static void __init tango_clocksource_ini + + ret = clocksource_mmio_init(xtal_in_cnt, "tango-xtal", xtal_freq, 350, + 32, clocksource_mmio_readl_up); +- if (!ret) { ++ if (ret) { + pr_err("%s: registration failed\n", np->full_name); + return; + } diff --git a/queue-4.5/cns3xxx-fix-pci-cns3xxx_write_config.patch b/queue-4.5/cns3xxx-fix-pci-cns3xxx_write_config.patch new file mode 100644 index 00000000000..5e46c4be634 --- /dev/null +++ b/queue-4.5/cns3xxx-fix-pci-cns3xxx_write_config.patch @@ -0,0 +1,42 @@ +From 88e9da9a2a70b6f1a171fbf30a681d6bc4031c4d Mon Sep 17 00:00:00 2001 +From: Krzysztof Halasa +Date: Fri, 11 Mar 2016 12:32:14 +0100 +Subject: CNS3xxx: Fix PCI cns3xxx_write_config() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Krzysztof Halasa + +commit 88e9da9a2a70b6f1a171fbf30a681d6bc4031c4d upstream. + +The "where" offset was added twice, fix it. + +Signed-off-by: Krzysztof Hałasa +Fixes: 498a92d42596 ("ARM: cns3xxx: pci: avoid potential stack overflow") +Signed-off-by: Olof Johansson +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm/mach-cns3xxx/pcie.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +--- a/arch/arm/mach-cns3xxx/pcie.c ++++ b/arch/arm/mach-cns3xxx/pcie.c +@@ -220,13 +220,13 @@ static void cns3xxx_write_config(struct + u32 mask = (0x1ull << (size * 8)) - 1; + int shift = (where % 4) * 8; + +- v = readl_relaxed(base + (where & 0xffc)); ++ v = readl_relaxed(base); + + v &= ~(mask << shift); + v |= (val & mask) << shift; + +- writel_relaxed(v, base + (where & 0xffc)); +- readl_relaxed(base + (where & 0xffc)); ++ writel_relaxed(v, base); ++ readl_relaxed(base); + } + + static void __init cns3xxx_pcie_hw_init(struct cns3xxx_pcie *cnspci) diff --git a/queue-4.5/ipvs-correct-initial-offset-of-call-id-header-search-in-sip-persistence-engine.patch b/queue-4.5/ipvs-correct-initial-offset-of-call-id-header-search-in-sip-persistence-engine.patch new file mode 100644 index 00000000000..365c81cf1e6 --- /dev/null +++ b/queue-4.5/ipvs-correct-initial-offset-of-call-id-header-search-in-sip-persistence-engine.patch @@ -0,0 +1,55 @@ +From 7617a24f83b5d67f4dab1844956be1cebc44aec8 Mon Sep 17 00:00:00 2001 +From: Marco Angaroni +Date: Sat, 5 Mar 2016 12:10:02 +0100 +Subject: ipvs: correct initial offset of Call-ID header search in SIP persistence engine + +From: Marco Angaroni + +commit 7617a24f83b5d67f4dab1844956be1cebc44aec8 upstream. + +The IPVS SIP persistence engine is not able to parse the SIP header +"Call-ID" when such header is inserted in the first positions of +the SIP message. + +When IPVS is configured with "--pe sip" option, like for example: +ipvsadm -A -u 1.2.3.4:5060 -s rr --pe sip -p 120 -o +some particular messages (see below for details) do not create entries +in the connection template table, which can be listed with: +ipvsadm -Lcn --persistent-conn + +Problematic SIP messages are SIP responses having "Call-ID" header +positioned just after message first line: +SIP/2.0 200 OK +[Call-ID header here] +[rest of the headers] + +When "Call-ID" header is positioned down (after a few other headers) +it is correctly recognized. + +This is due to the data offset used in get_callid function call inside +ip_vs_pe_sip.c file: since dptr already points to the start of the +SIP message, the value of dataoff should be initially 0. +Otherwise the header is searched starting from some bytes after the +first character of the SIP message. + +Fixes: 758ff0338722 ("IPVS: sip persistence engine") +Signed-off-by: Marco Angaroni +Acked-by: Julian Anastasov +Signed-off-by: Simon Horman +Signed-off-by: Greg Kroah-Hartman + +--- + net/netfilter/ipvs/ip_vs_pe_sip.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/net/netfilter/ipvs/ip_vs_pe_sip.c ++++ b/net/netfilter/ipvs/ip_vs_pe_sip.c +@@ -88,7 +88,7 @@ ip_vs_sip_fill_param(struct ip_vs_conn_p + dptr = skb->data + dataoff; + datalen = skb->len - dataoff; + +- if (get_callid(dptr, dataoff, datalen, &matchoff, &matchlen)) ++ if (get_callid(dptr, 0, datalen, &matchoff, &matchlen)) + return -EINVAL; + + /* N.B: pe_data is only set on success, diff --git a/queue-4.5/ipvs-drop-first-packet-to-redirect-conntrack.patch b/queue-4.5/ipvs-drop-first-packet-to-redirect-conntrack.patch new file mode 100644 index 00000000000..d5e1c98fb29 --- /dev/null +++ b/queue-4.5/ipvs-drop-first-packet-to-redirect-conntrack.patch @@ -0,0 +1,129 @@ +From f719e3754ee2f7275437e61a6afd520181fdd43b Mon Sep 17 00:00:00 2001 +From: Julian Anastasov +Date: Sat, 5 Mar 2016 15:03:22 +0200 +Subject: ipvs: drop first packet to redirect conntrack + +From: Julian Anastasov + +commit f719e3754ee2f7275437e61a6afd520181fdd43b upstream. + +Jiri Bohac is reporting for a problem where the attempt +to reschedule existing connection to another real server +needs proper redirect for the conntrack used by the IPVS +connection. For example, when IPVS connection is created +to NAT-ed real server we alter the reply direction of +conntrack. If we later decide to select different real +server we can not alter again the conntrack. And if we +expire the old connection, the new connection is left +without conntrack. + +So, the only way to redirect both the IPVS connection and +the Netfilter's conntrack is to drop the SYN packet that +hits existing connection, to wait for the next jiffie +to expire the old connection and its conntrack and to rely +on client's retransmission to create new connection as +usually. + +Jiri Bohac provided a fix that drops all SYNs on rescheduling, +I extended his patch to do such drops only for connections +that use conntrack. Here is the original report from Jiri Bohac: + +Since commit dc7b3eb900aa ("ipvs: Fix reuse connection if real server +is dead"), new connections to dead servers are redistributed +immediately to new servers. The old connection is expired using +ip_vs_conn_expire_now() which sets the connection timer to expire +immediately. + +However, before the timer callback, ip_vs_conn_expire(), is run +to clean the connection's conntrack entry, the new redistributed +connection may already be established and its conntrack removed +instead. + +Fix this by dropping the first packet of the new connection +instead, like we do when the destination server is not available. +The timer will have deleted the old conntrack entry long before +the first packet of the new connection is retransmitted. + +Fixes: dc7b3eb900aa ("ipvs: Fix reuse connection if real server is dead") +Signed-off-by: Jiri Bohac +Signed-off-by: Julian Anastasov +Signed-off-by: Simon Horman +Signed-off-by: Greg Kroah-Hartman + +--- + include/net/ip_vs.h | 17 +++++++++++++++++ + net/netfilter/ipvs/ip_vs_core.c | 37 ++++++++++++++++++++++++++++--------- + 2 files changed, 45 insertions(+), 9 deletions(-) + +--- a/include/net/ip_vs.h ++++ b/include/net/ip_vs.h +@@ -1588,6 +1588,23 @@ static inline void ip_vs_conn_drop_connt + } + #endif /* CONFIG_IP_VS_NFCT */ + ++/* Really using conntrack? */ ++static inline bool ip_vs_conn_uses_conntrack(struct ip_vs_conn *cp, ++ struct sk_buff *skb) ++{ ++#ifdef CONFIG_IP_VS_NFCT ++ enum ip_conntrack_info ctinfo; ++ struct nf_conn *ct; ++ ++ if (!(cp->flags & IP_VS_CONN_F_NFCT)) ++ return false; ++ ct = nf_ct_get(skb, &ctinfo); ++ if (ct && !nf_ct_is_untracked(ct)) ++ return true; ++#endif ++ return false; ++} ++ + static inline int + ip_vs_dest_conn_overhead(struct ip_vs_dest *dest) + { +--- a/net/netfilter/ipvs/ip_vs_core.c ++++ b/net/netfilter/ipvs/ip_vs_core.c +@@ -1757,15 +1757,34 @@ ip_vs_in(struct netns_ipvs *ipvs, unsign + cp = pp->conn_in_get(ipvs, af, skb, &iph); + + conn_reuse_mode = sysctl_conn_reuse_mode(ipvs); +- if (conn_reuse_mode && !iph.fragoffs && +- is_new_conn(skb, &iph) && cp && +- ((unlikely(sysctl_expire_nodest_conn(ipvs)) && cp->dest && +- unlikely(!atomic_read(&cp->dest->weight))) || +- unlikely(is_new_conn_expected(cp, conn_reuse_mode)))) { +- if (!atomic_read(&cp->n_control)) +- ip_vs_conn_expire_now(cp); +- __ip_vs_conn_put(cp); +- cp = NULL; ++ if (conn_reuse_mode && !iph.fragoffs && is_new_conn(skb, &iph) && cp) { ++ bool uses_ct = false, resched = false; ++ ++ if (unlikely(sysctl_expire_nodest_conn(ipvs)) && cp->dest && ++ unlikely(!atomic_read(&cp->dest->weight))) { ++ resched = true; ++ uses_ct = ip_vs_conn_uses_conntrack(cp, skb); ++ } else if (is_new_conn_expected(cp, conn_reuse_mode)) { ++ uses_ct = ip_vs_conn_uses_conntrack(cp, skb); ++ if (!atomic_read(&cp->n_control)) { ++ resched = true; ++ } else { ++ /* Do not reschedule controlling connection ++ * that uses conntrack while it is still ++ * referenced by controlled connection(s). ++ */ ++ resched = !uses_ct; ++ } ++ } ++ ++ if (resched) { ++ if (!atomic_read(&cp->n_control)) ++ ip_vs_conn_expire_now(cp); ++ __ip_vs_conn_put(cp); ++ if (uses_ct) ++ return NF_DROP; ++ cp = NULL; ++ } + } + + if (unlikely(!cp)) { diff --git a/queue-4.5/ipvs-handle-ip_vs_fill_iph_skb_off-failure.patch b/queue-4.5/ipvs-handle-ip_vs_fill_iph_skb_off-failure.patch new file mode 100644 index 00000000000..e0310ff711c --- /dev/null +++ b/queue-4.5/ipvs-handle-ip_vs_fill_iph_skb_off-failure.patch @@ -0,0 +1,49 @@ +From 3f20efba41916ee17ce82f0fdd02581ada2872b2 Mon Sep 17 00:00:00 2001 +From: Arnd Bergmann +Date: Wed, 27 Jan 2016 14:52:02 +0100 +Subject: ipvs: handle ip_vs_fill_iph_skb_off failure + +From: Arnd Bergmann + +commit 3f20efba41916ee17ce82f0fdd02581ada2872b2 upstream. + +ip_vs_fill_iph_skb_off() may not find an IP header, and gcc has +determined that ip_vs_sip_fill_param() then incorrectly accesses +the protocol fields: + +net/netfilter/ipvs/ip_vs_pe_sip.c: In function 'ip_vs_sip_fill_param': +net/netfilter/ipvs/ip_vs_pe_sip.c:76:5: error: 'iph.protocol' may be used uninitialized in this function [-Werror=maybe-uninitialized] + if (iph.protocol != IPPROTO_UDP) + ^ +net/netfilter/ipvs/ip_vs_pe_sip.c:81:10: error: 'iph.len' may be used uninitialized in this function [-Werror=maybe-uninitialized] + dataoff = iph.len + sizeof(struct udphdr); + ^ + +This adds a check for the ip_vs_fill_iph_skb_off() return code +before looking at the ip header data returned from it. + +Signed-off-by: Arnd Bergmann +Fixes: b0e010c527de ("ipvs: replace ip_vs_fill_ip4hdr with ip_vs_fill_iph_skb_off") +Acked-by: Julian Anastasov +Signed-off-by: Simon Horman +Signed-off-by: Greg Kroah-Hartman + +--- + net/netfilter/ipvs/ip_vs_pe_sip.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/net/netfilter/ipvs/ip_vs_pe_sip.c ++++ b/net/netfilter/ipvs/ip_vs_pe_sip.c +@@ -70,10 +70,10 @@ ip_vs_sip_fill_param(struct ip_vs_conn_p + const char *dptr; + int retc; + +- ip_vs_fill_iph_skb(p->af, skb, false, &iph); ++ retc = ip_vs_fill_iph_skb(p->af, skb, false, &iph); + + /* Only useful with UDP */ +- if (iph.protocol != IPPROTO_UDP) ++ if (!retc || iph.protocol != IPPROTO_UDP) + return -EINVAL; + /* todo: IPv6 fragments: + * I think this only should be done for the first fragment. /HS diff --git a/queue-4.5/lightnvm-update-closed-list-outside-of-intr-context.patch b/queue-4.5/lightnvm-update-closed-list-outside-of-intr-context.patch new file mode 100644 index 00000000000..70914e89e3c --- /dev/null +++ b/queue-4.5/lightnvm-update-closed-list-outside-of-intr-context.patch @@ -0,0 +1,75 @@ +From 6adb03de406e8c92579c2e4b11640841fa908277 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Javier=20Gonz=C3=A1lez?= +Date: Sat, 20 Feb 2016 08:52:40 +0100 +Subject: lightnvm: update closed list outside of intr context +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Javier González + +commit 6adb03de406e8c92579c2e4b11640841fa908277 upstream. + +When an I/O finishes, full blocks are moved from the open to the closed +list - a lock is taken to protect the list. This happens at the moment +in the interrupt context, which is not correct. + +This patch moves this logic to the block workqueue instead, avoiding +holding a spinlock without interrupt save in an interrupt context. + +Signed-off-by: Javier González +Fixes: ff0e498bfa18 ("lightnvm: manage open and closed blocks sepa...") +Signed-off-by: Matias Bjørling +Signed-off-by: Jens Axboe +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/lightnvm/rrpc.c | 23 ++++++++++------------- + 1 file changed, 10 insertions(+), 13 deletions(-) + +--- a/drivers/lightnvm/rrpc.c ++++ b/drivers/lightnvm/rrpc.c +@@ -499,12 +499,21 @@ static void rrpc_gc_queue(struct work_st + struct rrpc *rrpc = gcb->rrpc; + struct rrpc_block *rblk = gcb->rblk; + struct nvm_lun *lun = rblk->parent->lun; ++ struct nvm_block *blk = rblk->parent; + struct rrpc_lun *rlun = &rrpc->luns[lun->id - rrpc->lun_offset]; + + spin_lock(&rlun->lock); + list_add_tail(&rblk->prio, &rlun->prio_list); + spin_unlock(&rlun->lock); + ++ spin_lock(&lun->lock); ++ lun->nr_open_blocks--; ++ lun->nr_closed_blocks++; ++ blk->state &= ~NVM_BLK_ST_OPEN; ++ blk->state |= NVM_BLK_ST_CLOSED; ++ list_move_tail(&rblk->list, &rlun->closed_list); ++ spin_unlock(&lun->lock); ++ + mempool_free(gcb, rrpc->gcb_pool); + pr_debug("nvm: block '%lu' is full, allow GC (sched)\n", + rblk->parent->id); +@@ -668,20 +677,8 @@ static void rrpc_end_io_write(struct rrp + lun = rblk->parent->lun; + + cmnt_size = atomic_inc_return(&rblk->data_cmnt_size); +- if (unlikely(cmnt_size == rrpc->dev->pgs_per_blk)) { +- struct nvm_block *blk = rblk->parent; +- struct rrpc_lun *rlun = rblk->rlun; +- +- spin_lock(&lun->lock); +- lun->nr_open_blocks--; +- lun->nr_closed_blocks++; +- blk->state &= ~NVM_BLK_ST_OPEN; +- blk->state |= NVM_BLK_ST_CLOSED; +- list_move_tail(&rblk->list, &rlun->closed_list); +- spin_unlock(&lun->lock); +- ++ if (unlikely(cmnt_size == rrpc->dev->pgs_per_blk)) + rrpc_run_gc(rrpc, rblk); +- } + } + } + diff --git a/queue-4.5/lpfc-fix-misleading-indentation.patch b/queue-4.5/lpfc-fix-misleading-indentation.patch new file mode 100644 index 00000000000..1c9c841d3db --- /dev/null +++ b/queue-4.5/lpfc-fix-misleading-indentation.patch @@ -0,0 +1,60 @@ +From aeb6641f8ebdd61939f462a8255b316f9bfab707 Mon Sep 17 00:00:00 2001 +From: Arnd Bergmann +Date: Mon, 14 Mar 2016 15:29:44 +0100 +Subject: lpfc: fix misleading indentation + +From: Arnd Bergmann + +commit aeb6641f8ebdd61939f462a8255b316f9bfab707 upstream. + +gcc-6 complains about the indentation of the lpfc_destroy_vport_work_array() +call in lpfc_online(), which clearly doesn't look right: + +drivers/scsi/lpfc/lpfc_init.c: In function 'lpfc_online': +drivers/scsi/lpfc/lpfc_init.c:2880:3: warning: statement is indented as if it were guarded by... [-Wmisleading-indentation] + lpfc_destroy_vport_work_array(phba, vports); + ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +drivers/scsi/lpfc/lpfc_init.c:2863:2: note: ...this 'if' clause, but it is not + if (vports != NULL) + ^~ + +Looking at the patch that introduced this code, it's clear that the +behavior is correct and the indentation is wrong. + +This fixes the indentation and adds curly braces around the previous +if() block for clarity, as that is most likely what caused the code +to be misindented in the first place. + +Signed-off-by: Arnd Bergmann +Fixes: 549e55cd2a1b ("[SCSI] lpfc 8.2.2 : Fix locking around HBA's port_list") +Reviewed-by: Sebastian Herbszt +Reviewed-by: Hannes Reinecke +Reviewed-by: Ewan D. Milne +Signed-off-by: Martin K. Petersen +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/scsi/lpfc/lpfc_init.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +--- a/drivers/scsi/lpfc/lpfc_init.c ++++ b/drivers/scsi/lpfc/lpfc_init.c +@@ -2860,7 +2860,7 @@ lpfc_online(struct lpfc_hba *phba) + } + + vports = lpfc_create_vport_work_array(phba); +- if (vports != NULL) ++ if (vports != NULL) { + for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { + struct Scsi_Host *shost; + shost = lpfc_shost_from_vport(vports[i]); +@@ -2877,7 +2877,8 @@ lpfc_online(struct lpfc_hba *phba) + } + spin_unlock_irq(shost->host_lock); + } +- lpfc_destroy_vport_work_array(phba, vports); ++ } ++ lpfc_destroy_vport_work_array(phba, vports); + + lpfc_unblock_mgmt_io(phba); + return 0; diff --git a/queue-4.5/mfd-intel-lpss-remove-clock-tree-on-error-path.patch b/queue-4.5/mfd-intel-lpss-remove-clock-tree-on-error-path.patch new file mode 100644 index 00000000000..142fbc84149 --- /dev/null +++ b/queue-4.5/mfd-intel-lpss-remove-clock-tree-on-error-path.patch @@ -0,0 +1,33 @@ +From 84cb36cac581c915ef4e8b70abb73e084325df92 Mon Sep 17 00:00:00 2001 +From: Andy Shevchenko +Date: Fri, 22 Jan 2016 16:48:46 +0200 +Subject: mfd: intel-lpss: Remove clock tree on error path + +From: Andy Shevchenko + +commit 84cb36cac581c915ef4e8b70abb73e084325df92 upstream. + +We forgot to remove the clock tree if something goes wrong in ->probe(). Add a +call to intel_lpss_unregister_clock() on error path in ->probe() to fix the +potential issue. + +Fixes: 4b45efe85263 (mfd: Add support for Intel Sunrisepoint LPSS devices) +Signed-off-by: Andy Shevchenko +Acked-by: Mika Westerberg +Signed-off-by: Lee Jones +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/mfd/intel-lpss.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/mfd/intel-lpss.c ++++ b/drivers/mfd/intel-lpss.c +@@ -453,6 +453,7 @@ int intel_lpss_probe(struct device *dev, + err_remove_ltr: + intel_lpss_debugfs_remove(lpss); + intel_lpss_ltr_hide(lpss); ++ intel_lpss_unregister_clock(lpss); + + err_clk_register: + ida_simple_remove(&intel_lpss_devid_ida, lpss->devid); diff --git a/queue-4.5/mwifiex-fix-corner-case-association-failure.patch b/queue-4.5/mwifiex-fix-corner-case-association-failure.patch new file mode 100644 index 00000000000..ea6d85232d5 --- /dev/null +++ b/queue-4.5/mwifiex-fix-corner-case-association-failure.patch @@ -0,0 +1,33 @@ +From a6139b6271f9f95377fe3486aed6120c9142779b Mon Sep 17 00:00:00 2001 +From: Amitkumar Karwar +Date: Tue, 23 Feb 2016 05:16:17 -0800 +Subject: mwifiex: fix corner case association failure + +From: Amitkumar Karwar + +commit a6139b6271f9f95377fe3486aed6120c9142779b upstream. + +This patch corrects the error case in association path by returning +-1. Earlier "media_connected" used to remain on in this error case +causing failure for further association attempts. + +Signed-off-by: Amitkumar Karwar +Fixes: b887664d882ee4 ('mwifiex: channel switch handling for station') +Signed-off-by: Cathy Luo +Signed-off-by: Kalle Valo +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/net/wireless/marvell/mwifiex/sta_ioctl.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/net/wireless/marvell/mwifiex/sta_ioctl.c ++++ b/drivers/net/wireless/marvell/mwifiex/sta_ioctl.c +@@ -314,6 +314,7 @@ int mwifiex_bss_start(struct mwifiex_pri + mwifiex_dbg(adapter, ERROR, + "Attempt to reconnect on csa closed chan(%d)\n", + bss_desc->channel); ++ ret = -1; + goto done; + } + diff --git a/queue-4.5/nbd-ratelimit-error-msgs-after-socket-close.patch b/queue-4.5/nbd-ratelimit-error-msgs-after-socket-close.patch new file mode 100644 index 00000000000..4ab85ff0459 --- /dev/null +++ b/queue-4.5/nbd-ratelimit-error-msgs-after-socket-close.patch @@ -0,0 +1,43 @@ +From da6ccaaa79caca4f38b540b651238f87215217a2 Mon Sep 17 00:00:00 2001 +From: Dan Streetman +Date: Thu, 14 Jan 2016 13:42:32 -0500 +Subject: nbd: ratelimit error msgs after socket close + +From: Dan Streetman + +commit da6ccaaa79caca4f38b540b651238f87215217a2 upstream. + +Make the "Attempted send on closed socket" error messages generated in +nbd_request_handler() ratelimited. + +When the nbd socket is shutdown, the nbd_request_handler() function emits +an error message for every request remaining in its queue. If the queue +is large, this will spam a large amount of messages to the log. There's +no need for a separate error message for each request, so this patch +ratelimits it. + +In the specific case this was found, the system was virtual and the error +messages were logged to the serial port, which overwhelmed it. + +Fixes: 4d48a542b427 ("nbd: fix I/O hang on disconnected nbds") +Signed-off-by: Dan Streetman +Signed-off-by: Markus Pargmann +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/block/nbd.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/block/nbd.c ++++ b/drivers/block/nbd.c +@@ -618,8 +618,8 @@ static void nbd_request_handler(struct r + req, req->cmd_type); + + if (unlikely(!nbd->sock)) { +- dev_err(disk_to_dev(nbd->disk), +- "Attempted send on closed socket\n"); ++ dev_err_ratelimited(disk_to_dev(nbd->disk), ++ "Attempted send on closed socket\n"); + req->errors++; + nbd_end_request(nbd, req); + spin_lock_irq(q->queue_lock); diff --git a/queue-4.5/net-mlx5_core-fix-caching-atomic-endian-mode-capability.patch b/queue-4.5/net-mlx5_core-fix-caching-atomic-endian-mode-capability.patch new file mode 100644 index 00000000000..61438dff290 --- /dev/null +++ b/queue-4.5/net-mlx5_core-fix-caching-atomic-endian-mode-capability.patch @@ -0,0 +1,34 @@ +From 91d9ed8443b88cc50b81cf5ec900172515270f6f Mon Sep 17 00:00:00 2001 +From: Leon Romanovsky +Date: Tue, 23 Feb 2016 10:25:21 +0200 +Subject: net/mlx5_core: Fix caching ATOMIC endian mode capability + +From: Leon Romanovsky + +commit 91d9ed8443b88cc50b81cf5ec900172515270f6f upstream. + +Add caching of maximum device capability of ATOMIC endian mode. + +Fixes: f91e6d8941bf ('net/mlx5_core: Add setting ATOMIC endian mode') +Signed-off-by: Leon Romanovsky +Reviewed-by: Saeed Mahameed +Signed-off-by: Doug Ledford +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/net/ethernet/mellanox/mlx5/core/main.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/drivers/net/ethernet/mellanox/mlx5/core/main.c ++++ b/drivers/net/ethernet/mellanox/mlx5/core/main.c +@@ -423,6 +423,10 @@ static int handle_hca_cap_atomic(struct + HCA_CAP_OPMOD_GET_CUR); + if (err) + return err; ++ err = mlx5_core_get_caps(dev, MLX5_CAP_ATOMIC, ++ HCA_CAP_OPMOD_GET_MAX); ++ if (err) ++ return err; + } else { + return 0; + } diff --git a/queue-4.5/null_blk-add-lightnvm-null_blk-device-to-the-nullb_list.patch b/queue-4.5/null_blk-add-lightnvm-null_blk-device-to-the-nullb_list.patch new file mode 100644 index 00000000000..abd40ed0bf6 --- /dev/null +++ b/queue-4.5/null_blk-add-lightnvm-null_blk-device-to-the-nullb_list.patch @@ -0,0 +1,37 @@ +From 3681c85dffda70e551dead31c8d102bd69033fe8 Mon Sep 17 00:00:00 2001 +From: Wenwei Tao +Date: Sat, 5 Mar 2016 00:27:04 +0800 +Subject: null_blk: add lightnvm null_blk device to the nullb_list + +From: Wenwei Tao + +commit 3681c85dffda70e551dead31c8d102bd69033fe8 upstream. + +After register null_blk devices into lightnvm, we forget +to add these devices to the the nullb_list, makes them +invisible to the null_blk driver. + +Signed-off-by: Wenwei Tao +Fixes: a514379b0c77 ("null_blk: oops when initializing without lightnvm") +Signed-off-by: Jens Axboe +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/block/null_blk.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/block/null_blk.c ++++ b/drivers/block/null_blk.c +@@ -742,10 +742,11 @@ static int null_add_dev(void) + + add_disk(disk); + ++done: + mutex_lock(&lock); + list_add_tail(&nullb->list, &nullb_list); + mutex_unlock(&lock); +-done: ++ + return 0; + + out_cleanup_lightnvm: diff --git a/queue-4.5/pwm-omap-dmtimer-add-sanity-checking-for-load-and-match-values.patch b/queue-4.5/pwm-omap-dmtimer-add-sanity-checking-for-load-and-match-values.patch new file mode 100644 index 00000000000..dc60d4e82df --- /dev/null +++ b/queue-4.5/pwm-omap-dmtimer-add-sanity-checking-for-load-and-match-values.patch @@ -0,0 +1,96 @@ +From cd378881426379a62a7fe67f34b8cbe738302022 Mon Sep 17 00:00:00 2001 +From: David Rivshin +Date: Fri, 29 Jan 2016 23:26:52 -0500 +Subject: pwm: omap-dmtimer: Add sanity checking for load and match values + +From: David Rivshin + +commit cd378881426379a62a7fe67f34b8cbe738302022 upstream. + +Add sanity checking to ensure that we do not program load or match values +that are out of range if a user requests period or duty_cycle values which +are not achievable. The match value cannot be less than the load value (but +can be equal), and neither can be 0xffffffff. This means that there must be +at least one fclk cycle between load and match, and another between match +and overflow. + +Fixes: 6604c6556db9 ("pwm: Add PWM driver for OMAP using dual-mode timers") +Signed-off-by: David Rivshin +Acked-by: Neil Armstrong +[thierry.reding@gmail.com: minor coding style cleanups] +Signed-off-by: Thierry Reding +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/pwm/pwm-omap-dmtimer.c | 34 ++++++++++++++++++++++++++++++---- + 1 file changed, 30 insertions(+), 4 deletions(-) + +--- a/drivers/pwm/pwm-omap-dmtimer.c ++++ b/drivers/pwm/pwm-omap-dmtimer.c +@@ -119,15 +119,13 @@ static int pwm_omap_dmtimer_config(struc + fclk = omap->pdata->get_fclk(omap->dm_timer); + if (!fclk) { + dev_err(chip->dev, "invalid pmtimer fclk\n"); +- mutex_unlock(&omap->mutex); +- return -EINVAL; ++ goto err_einval; + } + + clk_rate = clk_get_rate(fclk); + if (!clk_rate) { + dev_err(chip->dev, "invalid pmtimer fclk rate\n"); +- mutex_unlock(&omap->mutex); +- return -EINVAL; ++ goto err_einval; + } + + dev_dbg(chip->dev, "clk rate: %luHz\n", clk_rate); +@@ -142,6 +140,8 @@ static int pwm_omap_dmtimer_config(struc + * The non-active time is the remainder: (DM_TIMER_MAX-match_value) + * clock cycles. + * ++ * NOTE: It is required that: load_value <= match_value < DM_TIMER_MAX ++ * + * References: + * OMAP4430/60/70 TRM sections 22.2.4.10 and 22.2.4.11 + * AM335x Sitara TRM sections 20.1.3.5 and 20.1.3.6 +@@ -149,6 +149,27 @@ static int pwm_omap_dmtimer_config(struc + period_cycles = pwm_omap_dmtimer_get_clock_cycles(clk_rate, period_ns); + duty_cycles = pwm_omap_dmtimer_get_clock_cycles(clk_rate, duty_ns); + ++ if (period_cycles < 2) { ++ dev_info(chip->dev, ++ "period %d ns too short for clock rate %lu Hz\n", ++ period_ns, clk_rate); ++ goto err_einval; ++ } ++ ++ if (duty_cycles < 1) { ++ dev_dbg(chip->dev, ++ "duty cycle %d ns is too short for clock rate %lu Hz\n", ++ duty_ns, clk_rate); ++ dev_dbg(chip->dev, "using minimum of 1 clock cycle\n"); ++ duty_cycles = 1; ++ } else if (duty_cycles >= period_cycles) { ++ dev_dbg(chip->dev, ++ "duty cycle %d ns is too long for period %d ns at clock rate %lu Hz\n", ++ duty_ns, period_ns, clk_rate); ++ dev_dbg(chip->dev, "using maximum of 1 clock cycle less than period\n"); ++ duty_cycles = period_cycles - 1; ++ } ++ + load_value = (DM_TIMER_MAX - period_cycles) + 1; + match_value = load_value + duty_cycles - 1; + +@@ -179,6 +200,11 @@ static int pwm_omap_dmtimer_config(struc + mutex_unlock(&omap->mutex); + + return 0; ++ ++err_einval: ++ mutex_unlock(&omap->mutex); ++ ++ return -EINVAL; + } + + static int pwm_omap_dmtimer_set_polarity(struct pwm_chip *chip, diff --git a/queue-4.5/pwm-omap-dmtimer-fix-inaccurate-period-and-duty-cycle-calculations.patch b/queue-4.5/pwm-omap-dmtimer-fix-inaccurate-period-and-duty-cycle-calculations.patch new file mode 100644 index 00000000000..bcda8454a31 --- /dev/null +++ b/queue-4.5/pwm-omap-dmtimer-fix-inaccurate-period-and-duty-cycle-calculations.patch @@ -0,0 +1,93 @@ +From f8caa792261c0edded20eba2b8fcc899a1b91819 Mon Sep 17 00:00:00 2001 +From: David Rivshin +Date: Fri, 29 Jan 2016 23:26:51 -0500 +Subject: pwm: omap-dmtimer: Fix inaccurate period and duty cycle calculations + +From: David Rivshin + +commit f8caa792261c0edded20eba2b8fcc899a1b91819 upstream. + +Fix the calculation of load_value and match_value. Currently they +are slightly too low, which produces a noticeably wrong PWM rate with +sufficiently short periods (i.e. when 1/period approaches clk_rate/2). + +Example: + clk_rate=32768Hz, period=122070ns, duty_cycle=61035ns (8192Hz/50% PWM) + Correct values: load = 0xfffffffc, match = 0xfffffffd + Current values: load = 0xfffffffa, match = 0xfffffffc + effective PWM: period=183105ns, duty_cycle=91553ns (5461Hz/50% PWM) + +Fixes: 6604c6556db9 ("pwm: Add PWM driver for OMAP using dual-mode timers") +Signed-off-by: David Rivshin +Acked-by: Neil Armstrong +Tested-by: Adam Ford +Signed-off-by: Thierry Reding +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/pwm/pwm-omap-dmtimer.c | 27 ++++++++++++++++++++------- + 1 file changed, 20 insertions(+), 7 deletions(-) + +--- a/drivers/pwm/pwm-omap-dmtimer.c ++++ b/drivers/pwm/pwm-omap-dmtimer.c +@@ -31,6 +31,7 @@ + #include + + #define DM_TIMER_LOAD_MIN 0xfffffffe ++#define DM_TIMER_MAX 0xffffffff + + struct pwm_omap_dmtimer_chip { + struct pwm_chip chip; +@@ -46,13 +47,13 @@ to_pwm_omap_dmtimer_chip(struct pwm_chip + return container_of(chip, struct pwm_omap_dmtimer_chip, chip); + } + +-static int pwm_omap_dmtimer_calc_value(unsigned long clk_rate, int ns) ++static u32 pwm_omap_dmtimer_get_clock_cycles(unsigned long clk_rate, int ns) + { + u64 c = (u64)clk_rate * ns; + + do_div(c, NSEC_PER_SEC); + +- return DM_TIMER_LOAD_MIN - c; ++ return c; + } + + static void pwm_omap_dmtimer_start(struct pwm_omap_dmtimer_chip *omap) +@@ -99,7 +100,8 @@ static int pwm_omap_dmtimer_config(struc + int duty_ns, int period_ns) + { + struct pwm_omap_dmtimer_chip *omap = to_pwm_omap_dmtimer_chip(chip); +- int load_value, match_value; ++ u32 period_cycles, duty_cycles; ++ u32 load_value, match_value; + struct clk *fclk; + unsigned long clk_rate; + bool timer_active; +@@ -133,11 +135,22 @@ static int pwm_omap_dmtimer_config(struc + /* + * Calculate the appropriate load and match values based on the + * specified period and duty cycle. The load value determines the +- * cycle time and the match value determines the duty cycle. ++ * period time and the match value determines the duty time. ++ * ++ * The period lasts for (DM_TIMER_MAX-load_value+1) clock cycles. ++ * Similarly, the active time lasts (match_value-load_value+1) cycles. ++ * The non-active time is the remainder: (DM_TIMER_MAX-match_value) ++ * clock cycles. ++ * ++ * References: ++ * OMAP4430/60/70 TRM sections 22.2.4.10 and 22.2.4.11 ++ * AM335x Sitara TRM sections 20.1.3.5 and 20.1.3.6 + */ +- load_value = pwm_omap_dmtimer_calc_value(clk_rate, period_ns); +- match_value = pwm_omap_dmtimer_calc_value(clk_rate, +- period_ns - duty_ns); ++ period_cycles = pwm_omap_dmtimer_get_clock_cycles(clk_rate, period_ns); ++ duty_cycles = pwm_omap_dmtimer_get_clock_cycles(clk_rate, duty_ns); ++ ++ load_value = (DM_TIMER_MAX - period_cycles) + 1; ++ match_value = load_value + duty_cycles - 1; + + /* + * We MUST stop the associated dual-mode timer before attempting to diff --git a/queue-4.5/pwm-omap-dmtimer-round-load-and-match-values-rather-than-truncate.patch b/queue-4.5/pwm-omap-dmtimer-round-load-and-match-values-rather-than-truncate.patch new file mode 100644 index 00000000000..d68040572b8 --- /dev/null +++ b/queue-4.5/pwm-omap-dmtimer-round-load-and-match-values-rather-than-truncate.patch @@ -0,0 +1,39 @@ +From 7b0883f33809ff0aeca9848193c31629a752bb77 Mon Sep 17 00:00:00 2001 +From: David Rivshin +Date: Fri, 29 Jan 2016 23:26:53 -0500 +Subject: pwm: omap-dmtimer: Round load and match values rather than truncate + +From: David Rivshin + +commit 7b0883f33809ff0aeca9848193c31629a752bb77 upstream. + +When converting period and duty_cycle from nanoseconds to fclk cycles, +the error introduced by the integer division can be appreciable, especially +in the case of slow fclk or short period. Use DIV_ROUND_CLOSEST_ULL() so +that the error is kept to +/- 0.5 clock cycles. + +Fixes: 6604c6556db9 ("pwm: Add PWM driver for OMAP using dual-mode timers") +Signed-off-by: David Rivshin +Acked-by: Neil Armstrong +Signed-off-by: Thierry Reding +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/pwm/pwm-omap-dmtimer.c | 6 +----- + 1 file changed, 1 insertion(+), 5 deletions(-) + +--- a/drivers/pwm/pwm-omap-dmtimer.c ++++ b/drivers/pwm/pwm-omap-dmtimer.c +@@ -49,11 +49,7 @@ to_pwm_omap_dmtimer_chip(struct pwm_chip + + static u32 pwm_omap_dmtimer_get_clock_cycles(unsigned long clk_rate, int ns) + { +- u64 c = (u64)clk_rate * ns; +- +- do_div(c, NSEC_PER_SEC); +- +- return c; ++ return DIV_ROUND_CLOSEST_ULL((u64)clk_rate * ns, NSEC_PER_SEC); + } + + static void pwm_omap_dmtimer_start(struct pwm_omap_dmtimer_chip *omap) diff --git a/queue-4.5/rdma-iw_cxgb4-fix-bar2-virt-addr-calculation-for-t4-chips.patch b/queue-4.5/rdma-iw_cxgb4-fix-bar2-virt-addr-calculation-for-t4-chips.patch new file mode 100644 index 00000000000..0368f5bd149 --- /dev/null +++ b/queue-4.5/rdma-iw_cxgb4-fix-bar2-virt-addr-calculation-for-t4-chips.patch @@ -0,0 +1,125 @@ +From 32cc92c7b5e52357a0a24010bae9eb257fa75d3e Mon Sep 17 00:00:00 2001 +From: Hariprasad S +Date: Tue, 5 Apr 2016 10:23:48 +0530 +Subject: RDMA/iw_cxgb4: Fix bar2 virt addr calculation for T4 chips + +From: Hariprasad S + +commit 32cc92c7b5e52357a0a24010bae9eb257fa75d3e upstream. + +For T4, kernel mode qps don't use the user doorbell. User mode qps during +flow control db ringing are forced into kernel, where user doorbell is +treated as kernel doorbell and proper bar2 offset in bar2 virtual space is +calculated, which incase of T4 is a bogus address, causing a kernel panic +due to illegal write during doorbell ringing. +In case of T4, kernel mode qp bar2 virtual address should be 0. Added T4 +check during bar2 virtual address calculation to return 0. Fixed Bar2 +range checks based on bar2 physical address. + +The below oops will be fixed + + <1>BUG: unable to handle kernel paging request at 000000000002aa08 + <1>IP: [] c4iw_uld_control+0x4e0/0x880 [iw_cxgb4] + <4>PGD 1416a8067 PUD 15bf35067 PMD 0 + <4>Oops: 0002 [#1] SMP + <4>last sysfs file: + /sys/devices/pci0000:00/0000:00:03.0/0000:02:00.4/infiniband/cxgb4_0/node_guid + <4>CPU 5 + <4>Modules linked in: rdma_ucm rdma_cm ib_cm ib_sa ib_mad ib_uverbs + ip6table_filter ip6_tables ebtable_nat ebtables ipt_MASQUERADE + iptable_nat nf_nat nf_conntrack_ipv4 nf_defrag_ipv4 xt_state nf_conntrack + ipt_REJECT xt_CHECKSUM iptable_mangle iptable_filter ip_tables bridge autofs4 + target_core_iblock target_core_file target_core_pscsi target_core_mod + configfs bnx2fc cnic uio fcoe libfcoe libfc scsi_transport_fc scsi_tgt 8021q + garp stp llc cpufreq_ondemand acpi_cpufreq freq_table mperf vhost_net macvtap + macvlan tun kvm uinput microcode iTCO_wdt iTCO_vendor_support sg joydev + serio_raw i2c_i801 i2c_core lpc_ich mfd_core e1000e ptp pps_core ioatdma dca + i7core_edac edac_core shpchp ext3 jbd mbcache sd_mod crc_t10dif pata_acpi + ata_generic ata_piix iw_cxgb4 iw_cm ib_core ib_addr cxgb4 ipv6 dm_mirror + dm_region_hash dm_log dm_mod [last unloaded: scsi_wait_scan] + <4> + Supermicro X8ST3/X8ST3 + <4>RIP: 0010:[] [] + c4iw_uld_control+0x4e0/0x880 [iw_cxgb4] + <4>RSP: 0000:ffff880155a03db0 EFLAGS: 00010006 + <4>RAX: 000000000000001d RBX: ffff88013ae5fc00 RCX: ffff880155adb180 + <4>RDX: 000000000002aa00 RSI: 0000000000000001 RDI: ffff88013ae5fdf8 + <4>RBP: ffff880155a03e10 R08: 0000000000000000 R09: 0000000000000001 + <4>R10: 0000000000000000 R11: 0000000000000000 R12: 0000000000000000 + <4>R13: 000000000000001d R14: ffff880156414ab0 R15: ffffe8ffffc05b88 + <4>FS: 0000000000000000(0000) GS:ffff8800282a0000(0000) knlGS:0000000000000000 + <4>CS: 0010 DS: 0018 ES: 0018 CR0: 000000008005003b + <4>CR2: 000000000002aa08 CR3: 000000015bd0e000 CR4: 00000000000007e0 + <4>DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 + <4>DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400 + <4>Process cxgb4 (pid: 394, threadinfo ffff880155a00000, task ffff880156414ab0) + <4>Stack: + <4> ffff880156415068 ffff880155adb180 ffff880155a03df0 ffffffffa00a344b + <4> 00000000000003e8 ffff880155920000 0000000000000004 ffff880155920000 + <4> ffff88015592d438 ffffffffa00a3860 ffff880155a03fd8 ffffe8ffffc05b88 + <4>Call Trace: + <4> [] ? enable_txq_db+0x2b/0x80 [cxgb4] + <4> [] ? process_db_full+0x0/0xa0 [cxgb4] + <4> [] process_db_full+0x46/0xa0 [cxgb4] + <4> [] worker_thread+0x170/0x2a0 + <4> [] ? autoremove_wake_function+0x0/0x40 + <4> [] ? worker_thread+0x0/0x2a0 + <4> [] kthread+0x9e/0xc0 + <4> [] child_rip+0xa/0x20 + <4> [] ? kthread+0x0/0xc0 + <4> [] ? child_rip+0x0/0x20 + <4>Code: e9 ba 00 00 00 66 0f 1f 44 00 00 44 8b 05 29 07 02 00 45 85 c0 0f 85 + 71 02 00 00 8b 83 70 01 00 00 45 0f b7 ed c1 e0 0f 44 09 e8 <89> 42 08 0f ae f8 + 66 c7 83 82 01 00 00 00 00 44 0f b7 ab dc 01 + <1>RIP [] c4iw_uld_control+0x4e0/0x880 [iw_cxgb4] + <4> RSP + <4>CR2: 000000000002aa08` + +Based on original work by Bharat Potnuri + +Fixes: 74217d4c6a4fb0d8 ("iw_cxgb4: support for bar2 qid densities exceeding the page size") + +Signed-off-by: Steve Wise +Signed-off-by: Hariprasad Shenai +Reviewed-by: Leon Romanovsky +Signed-off-by: Doug Ledford +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/infiniband/hw/cxgb4/cq.c | 2 +- + drivers/infiniband/hw/cxgb4/qp.c | 6 +++++- + 2 files changed, 6 insertions(+), 2 deletions(-) + +--- a/drivers/infiniband/hw/cxgb4/cq.c ++++ b/drivers/infiniband/hw/cxgb4/cq.c +@@ -162,7 +162,7 @@ static int create_cq(struct c4iw_rdev *r + cq->bar2_va = c4iw_bar2_addrs(rdev, cq->cqid, T4_BAR2_QTYPE_INGRESS, + &cq->bar2_qid, + user ? &cq->bar2_pa : NULL); +- if (user && !cq->bar2_va) { ++ if (user && !cq->bar2_pa) { + pr_warn(MOD "%s: cqid %u not in BAR2 range.\n", + pci_name(rdev->lldi.pdev), cq->cqid); + ret = -EINVAL; +--- a/drivers/infiniband/hw/cxgb4/qp.c ++++ b/drivers/infiniband/hw/cxgb4/qp.c +@@ -185,6 +185,10 @@ void __iomem *c4iw_bar2_addrs(struct c4i + + if (pbar2_pa) + *pbar2_pa = (rdev->bar2_pa + bar2_qoffset) & PAGE_MASK; ++ ++ if (is_t4(rdev->lldi.adapter_type)) ++ return NULL; ++ + return rdev->bar2_kva + bar2_qoffset; + } + +@@ -270,7 +274,7 @@ static int create_qp(struct c4iw_rdev *r + /* + * User mode must have bar2 access. + */ +- if (user && (!wq->sq.bar2_va || !wq->rq.bar2_va)) { ++ if (user && (!wq->sq.bar2_pa || !wq->rq.bar2_pa)) { + pr_warn(MOD "%s: sqid %u or rqid %u not in BAR2 range.\n", + pci_name(rdev->lldi.pdev), wq->sq.qid, wq->rq.qid); + goto free_dma; diff --git a/queue-4.5/rtlwifi-fix-size-of-wireless-mode-variable.patch b/queue-4.5/rtlwifi-fix-size-of-wireless-mode-variable.patch new file mode 100644 index 00000000000..71f68e674c1 --- /dev/null +++ b/queue-4.5/rtlwifi-fix-size-of-wireless-mode-variable.patch @@ -0,0 +1,85 @@ +From 73fb270592164b1917442f8bff4c791d095ee2ef Mon Sep 17 00:00:00 2001 +From: Larry Finger +Date: Thu, 25 Feb 2016 11:03:01 -0600 +Subject: rtlwifi: Fix size of wireless mode variable + +From: Larry Finger + +commit 73fb270592164b1917442f8bff4c791d095ee2ef upstream. + +Smatch reports the following warning: + + CHECK drivers/net/wireless/realtek/rtlwifi/rc.c +drivers/net/wireless/realtek/rtlwifi/rc.c:144 _rtl_rc_rate_set_series() warn: impossible condition '(wireless_mode == 256) => (0-255 == 256)' + +This warning arises because commit acc6907b87a9 ("rtlwifi: Fix warning +from ieee80211_get_tx_rates() when using 5G") now checks the wireless +mode for WIRELESS_MODE_AC_ONLY (BIT(8)) in _rtl_rc_rate_set_series(). +As a result, all quantities used to store the wireless mode must be u16. + +This patch also reorders struct rtl_sta_info to save a little space. + +Fixes: d76d65fd2695 ("rtlwifi: fix broken VHT support") +Reported-by: Dan Williams +Signed-off-by: Larry Finger +Signed-off-by: Kalle Valo +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/net/wireless/realtek/rtlwifi/rc.c | 4 ++-- + drivers/net/wireless/realtek/rtlwifi/rtl8821ae/hw.c | 2 +- + drivers/net/wireless/realtek/rtlwifi/wifi.h | 9 ++++----- + 3 files changed, 7 insertions(+), 8 deletions(-) + +--- a/drivers/net/wireless/realtek/rtlwifi/rc.c ++++ b/drivers/net/wireless/realtek/rtlwifi/rc.c +@@ -41,7 +41,7 @@ static u8 _rtl_rc_get_highest_rix(struct + struct rtl_hal *rtlhal = rtl_hal(rtlpriv); + struct rtl_phy *rtlphy = &(rtlpriv->phy); + struct rtl_sta_info *sta_entry = NULL; +- u8 wireless_mode = 0; ++ u16 wireless_mode = 0; + + /* + *this rate is no use for true rate, firmware +@@ -99,7 +99,7 @@ static void _rtl_rc_rate_set_series(stru + { + struct rtl_mac *mac = rtl_mac(rtlpriv); + struct rtl_sta_info *sta_entry = NULL; +- u8 wireless_mode = 0; ++ u16 wireless_mode = 0; + u8 sgi_20 = 0, sgi_40 = 0, sgi_80 = 0; + + if (sta) { +--- a/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/hw.c ++++ b/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/hw.c +@@ -3855,7 +3855,7 @@ void rtl8821ae_update_channel_access_set + { + struct rtl_priv *rtlpriv = rtl_priv(hw); + struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); +- u8 wireless_mode = mac->mode; ++ u16 wireless_mode = mac->mode; + u8 sifs_timer, r2t_sifs; + + rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SLOT_TIME, +--- a/drivers/net/wireless/realtek/rtlwifi/wifi.h ++++ b/drivers/net/wireless/realtek/rtlwifi/wifi.h +@@ -1323,14 +1323,13 @@ struct rtl_tid_data { + + struct rtl_sta_info { + struct list_head list; +- u8 ratr_index; +- u8 wireless_mode; +- u8 mimo_ps; +- u8 mac_addr[ETH_ALEN]; + struct rtl_tid_data tids[MAX_TID_COUNT]; +- + /* just used for ap adhoc or mesh*/ + struct rssi_sta rssi_stat; ++ u16 wireless_mode; ++ u8 ratr_index; ++ u8 mimo_ps; ++ u8 mac_addr[ETH_ALEN]; + } __packed; + + struct rtl_priv; diff --git a/queue-4.5/series b/queue-4.5/series new file mode 100644 index 00000000000..59b39d26040 --- /dev/null +++ b/queue-4.5/series @@ -0,0 +1,31 @@ +clocksource-drivers-tango-xtal-fix-boot-hang-due-to-incorrect-test.patch +rdma-iw_cxgb4-fix-bar2-virt-addr-calculation-for-t4-chips.patch +net-mlx5_core-fix-caching-atomic-endian-mode-capability.patch +ipvs-handle-ip_vs_fill_iph_skb_off-failure.patch +ipvs-correct-initial-offset-of-call-id-header-search-in-sip-persistence-engine.patch +ipvs-drop-first-packet-to-redirect-conntrack.patch +rtlwifi-fix-size-of-wireless-mode-variable.patch +mfd-intel-lpss-remove-clock-tree-on-error-path.patch +nbd-ratelimit-error-msgs-after-socket-close.patch +lightnvm-update-closed-list-outside-of-intr-context.patch +null_blk-add-lightnvm-null_blk-device-to-the-nullb_list.patch +ata-ahci_xgene-dereferencing-uninitialized-pointer-in-probe.patch +wlcore-fix-error-handling-in-wlcore_event_fw_logger.patch +ath10k-fix-pktlog-in-qca99x0.patch +mwifiex-fix-corner-case-association-failure.patch +cns3xxx-fix-pci-cns3xxx_write_config.patch +clk-divider-make-sure-read-only-dividers-do-not-write-to-their-register.patch +soc-rockchip-power-domain-fix-err-handle-while-probing.patch +clk-rockchip-fix-wrong-mmc-phase-shift-for-rk3228.patch +clk-rockchip-free-memory-in-error-cases-when-registering-clock-branches.patch +clk-meson-fix-meson_clk_register_clks-signature-type-mismatch.patch +clk-qcom-msm8960-fix-ce3_core-clk-enable-register.patch +clk-versatile-sp810-support-reentrance.patch +clk-qcom-msm8960-fix-ce3_src-register-offset.patch +clk-sunxi-fix-sun8i-a23-apb0-clk-divider-flags.patch +clk-xgene-add-missing-parenthesis-when-clearing-divider-value.patch +clk-bcm2835-fix-check-of-error-code-returned-by-devm_ioremap_resource.patch +pwm-omap-dmtimer-fix-inaccurate-period-and-duty-cycle-calculations.patch +pwm-omap-dmtimer-add-sanity-checking-for-load-and-match-values.patch +pwm-omap-dmtimer-round-load-and-match-values-rather-than-truncate.patch +lpfc-fix-misleading-indentation.patch diff --git a/queue-4.5/soc-rockchip-power-domain-fix-err-handle-while-probing.patch b/queue-4.5/soc-rockchip-power-domain-fix-err-handle-while-probing.patch new file mode 100644 index 00000000000..e87015a9bb4 --- /dev/null +++ b/queue-4.5/soc-rockchip-power-domain-fix-err-handle-while-probing.patch @@ -0,0 +1,33 @@ +From 1d961f11a108af9f7fbe89cc950a8d16ddbdbb28 Mon Sep 17 00:00:00 2001 +From: Shawn Lin +Date: Mon, 1 Feb 2016 16:18:40 +0800 +Subject: soc: rockchip: power-domain: fix err handle while probing + +From: Shawn Lin + +commit 1d961f11a108af9f7fbe89cc950a8d16ddbdbb28 upstream. + +If we fail to probe the driver, we should not directly break +from the for_each_available_child_of_node since it calls of_node_get +while iterating. This patch add of_node_put to fix the unbalanced +call pair. + +Fixes: 7c696693a4f5 ("soc: rockchip: power-domain: Add power domain driver") +Signed-off-by: Shawn Lin +Signed-off-by: Heiko Stuebner +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/soc/rockchip/pm_domains.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/soc/rockchip/pm_domains.c ++++ b/drivers/soc/rockchip/pm_domains.c +@@ -419,6 +419,7 @@ static int rockchip_pm_domain_probe(stru + if (error) { + dev_err(dev, "failed to handle node %s: %d\n", + node->name, error); ++ of_node_put(node); + goto err_out; + } + } diff --git a/queue-4.5/wlcore-fix-error-handling-in-wlcore_event_fw_logger.patch b/queue-4.5/wlcore-fix-error-handling-in-wlcore_event_fw_logger.patch new file mode 100644 index 00000000000..9eccf3554c6 --- /dev/null +++ b/queue-4.5/wlcore-fix-error-handling-in-wlcore_event_fw_logger.patch @@ -0,0 +1,37 @@ +From 68f37e5d7a2e00306adab033fba6c3042b33e8e1 Mon Sep 17 00:00:00 2001 +From: Andrzej Hajda +Date: Thu, 7 Jan 2016 14:28:50 +0100 +Subject: wlcore: fix error handling in wlcore_event_fw_logger + +From: Andrzej Hajda + +commit 68f37e5d7a2e00306adab033fba6c3042b33e8e1 upstream. + +wlcore_read/wlcore_write can return negative values so it should +be assigned to signed variable. + +The problem has been detected using proposed semantic patch +scripts/coccinelle/tests/unsigned_lesser_than_zero.cocci [1]. + +[1]: http://permalink.gmane.org/gmane.linux.kernel/2120705 + +Fixes: 3719c17e1816 ("wlcore/wl18xx: fw logger over sdio") +Signed-off-by: Andrzej Hajda +Signed-off-by: Kalle Valo +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/net/wireless/ti/wlcore/event.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/net/wireless/ti/wlcore/event.c ++++ b/drivers/net/wireless/ti/wlcore/event.c +@@ -38,7 +38,7 @@ + + int wlcore_event_fw_logger(struct wl1271 *wl) + { +- u32 ret; ++ int ret; + struct fw_logger_information fw_log; + u8 *buffer; + u32 internal_fw_addrbase = WL18XX_DATA_RAM_BASE_ADDRESS;