From: Srinath Parvathaneni Date: Wed, 25 Jun 2025 12:32:18 +0000 (+0100) Subject: aarch64: Add supports for FEAT_PoPS feature and DC instructions. X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=5103708c0184fa87735ba8fff0f1af62933f6139;p=thirdparty%2Fbinutils-gdb.git aarch64: Add supports for FEAT_PoPS feature and DC instructions. This patch add support for FEAT_PoPS feature which can be enabled through +pops command line flag. This patch also adds support for following DC instructions and the spec can be found here [1]. 1. "dc cigdvaps" enabled on passing +memtag+pops command line flags. 2. "dc civaps" enabled on passing +pops command line flag. [1]: https://developer.arm.com/documentation/ddi0601/2025-03/AArch64-Instructions?lang=en --- diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index e569b85b058..13649e8f3d5 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -10796,6 +10796,7 @@ static const struct aarch64_option_cpu_value_table aarch64_features[] = { {"sme-f16f16", AARCH64_FEATURE (SME_F16F16), AARCH64_FEATURE (SME2)}, {"sme-b16b16", AARCH64_FEATURE (SME_B16B16), AARCH64_FEATURES (2, SVE_B16B16, SME2)}, + {"pops", AARCH64_FEATURE (PoPS), AARCH64_NO_FEATURES}, {NULL, AARCH64_NO_FEATURES, AARCH64_NO_FEATURES}, }; diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi index 0b68602c0a0..d7e9c95111d 100644 --- a/gas/doc/c-aarch64.texi +++ b/gas/doc/c-aarch64.texi @@ -247,6 +247,8 @@ automatically cause those extensions to be disabled. @tab Enable Privileged Access Never support. @item @code{pauth} @tab @tab Enable Pointer Authentication. +@item @code{pops} @tab + @tab Enable Point of Physical Storage. @item @code{predres} @tab @tab Enable the Execution and Data and Prediction instructions. @item @code{predres2} @tab @code{predres} diff --git a/gas/testsuite/gas/aarch64/sysreg/pops-sysregs-bad.d b/gas/testsuite/gas/aarch64/sysreg/pops-sysregs-bad.d new file mode 100644 index 00000000000..61a6b21daa3 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/pops-sysregs-bad.d @@ -0,0 +1,3 @@ +#source: pops-sysregs-bad.s +#as: -I$srcdir/$subdir +#error_output: pops-sysregs-bad.l diff --git a/gas/testsuite/gas/aarch64/sysreg/pops-sysregs-bad.l b/gas/testsuite/gas/aarch64/sysreg/pops-sysregs-bad.l new file mode 100644 index 00000000000..510bf3a6e99 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/pops-sysregs-bad.l @@ -0,0 +1,8 @@ +.*: Assembler messages: +.*: Error: selected processor does not support system register name 'cigdvaps' +.*: Error: selected processor does not support system register name 'civaps' +.*: Error: selected processor does not support system register name 'cigdvaps' +.*: Error: selected processor does not support system register name 'civaps' +.*: Error: selected processor does not support system register name 'cigdvaps' +.*: Error: comma expected between operands at operand 2 -- `dc civaps' +.*: Error: comma expected between operands at operand 2 -- `dc cigdvaps' diff --git a/gas/testsuite/gas/aarch64/sysreg/pops-sysregs-bad.s b/gas/testsuite/gas/aarch64/sysreg/pops-sysregs-bad.s new file mode 100644 index 00000000000..2783272e7a4 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/pops-sysregs-bad.s @@ -0,0 +1,20 @@ + .arch armv8-a+memtag + dc cigdvaps, x19 + + .arch armv8-a+memtag + dc civaps, x20 + + .arch armv8-a+pops + dc cigdvaps, x21 + + .arch armv8-a + dc civaps, x22 + + .arch armv8-a + dc cigdvaps, x23 + + .arch armv8-a+pops + dc civaps + + .arch armv8-a+memtag+pops + dc cigdvaps diff --git a/gas/testsuite/gas/aarch64/sysreg/pops-sysregs.d b/gas/testsuite/gas/aarch64/sysreg/pops-sysregs.d new file mode 100644 index 00000000000..db04ab86b94 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/pops-sysregs.d @@ -0,0 +1,12 @@ +#source: pops-sysregs.s +#as: -I$srcdir/$subdir +#objdump: -dr + +[^:]+: file format .* + + +[^:]+: + +[^:]+: +.*: d5087fb3 dc cigdvaps, x19 +.*: d5087f34 dc civaps, x20 diff --git a/gas/testsuite/gas/aarch64/sysreg/pops-sysregs.s b/gas/testsuite/gas/aarch64/sysreg/pops-sysregs.s new file mode 100644 index 00000000000..7da4dc9ea5e --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/pops-sysregs.s @@ -0,0 +1,7 @@ + .arch armv8-a+memtag+pops + + dc cigdvaps, x19 + + .arch armv8-a+pops + + dc civaps, x20 diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index 2dc2f7df79a..7c1163dba57 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -294,6 +294,8 @@ enum aarch64_feature_bit { AARCH64_FEATURE_V9_5A, /* FPRCVT instructions. */ AARCH64_FEATURE_FPRCVT, + /* Point of Physical Storage. */ + AARCH64_FEATURE_PoPS, /* Virtual features. These are used to gate instructions that are enabled by either of two (or more) sets of command line flags. */ diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c index b2fd49771d5..60facbfb056 100644 --- a/opcodes/aarch64-opc.c +++ b/opcodes/aarch64-opc.c @@ -5216,6 +5216,8 @@ const aarch64_sys_ins_reg aarch64_sys_regs_dc[] = { "isw", CPENS (0, C7, C6, 2), F_HASXT, AARCH64_NO_FEATURES }, { "igdvac", CPENS (0, C7, C6, 5), F_HASXT | F_ARCHEXT, AARCH64_FEATURE (MEMTAG) }, { "igdsw", CPENS (0, C7, C6, 6), F_HASXT | F_ARCHEXT, AARCH64_FEATURE (MEMTAG) }, + { "cigdvaps", CPENS (0, C7, C15, 5), F_HASXT | F_ARCHEXT, AARCH64_FEATURES (2, MEMTAG, PoPS) }, + { "civaps", CPENS (0, C7, C15, 1), F_HASXT | F_ARCHEXT, AARCH64_FEATURE (PoPS) }, { "cvac", CPENS (3, C7, C10, 1), F_HASXT, AARCH64_NO_FEATURES }, { "cgvac", CPENS (3, C7, C10, 3), F_HASXT | F_ARCHEXT, AARCH64_FEATURE (MEMTAG) }, { "cgdvac", CPENS (3, C7, C10, 5), F_HASXT | F_ARCHEXT, AARCH64_FEATURE (MEMTAG) },