From: Vitaly Lubart Date: Mon, 28 Aug 2023 10:07:07 +0000 (+0300) Subject: drm/xe/gsc: add HECI2 register offsets X-Git-Tag: v6.8-rc1~111^2~7^2~291 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=5120243bfb0dabc9f16924a5fc66e8ef26f0f8d3;p=thirdparty%2Flinux.git drm/xe/gsc: add HECI2 register offsets Add HECI2 register offsets for DG1 and DG2 to regs/xe_regs.h Reviewed-by: Rodrigo Vivi Signed-off-by: Vitaly Lubart Signed-off-by: Alexander Usyskin Signed-off-by: Rodrigo Vivi --- diff --git a/drivers/gpu/drm/xe/regs/xe_regs.h b/drivers/gpu/drm/xe/regs/xe_regs.h index 1574d11d4e143..e4408473e802b 100644 --- a/drivers/gpu/drm/xe/regs/xe_regs.h +++ b/drivers/gpu/drm/xe/regs/xe_regs.h @@ -33,6 +33,10 @@ #define XEHPC_BCS6_RING_BASE 0x3ea000 #define XEHPC_BCS7_RING_BASE 0x3ec000 #define XEHPC_BCS8_RING_BASE 0x3ee000 + +#define DG1_GSC_HECI2_BASE 0x00259000 +#define DG2_GSC_HECI2_BASE 0x00374000 + #define GSCCS_RING_BASE 0x11a000 #define GT_WAIT_SEMAPHORE_INTERRUPT REG_BIT(11) #define GT_CONTEXT_SWITCH_INTERRUPT REG_BIT(8)