From: Greg Kroah-Hartman Date: Tue, 5 Dec 2017 14:37:53 +0000 (+0100) Subject: 4.14-stable patches X-Git-Tag: v3.18.87~32 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=51a86a5f23b81651f6436432be3894a93ab80a2b;p=thirdparty%2Fkernel%2Fstable-queue.git 4.14-stable patches added patches: drm-fsl-dcu-avoid-disabling-pixel-clock-twice-on-suspend.patch drm-fsl-dcu-enable-irq-before-drm_atomic_helper_resume.patch --- diff --git a/queue-4.14/drm-fsl-dcu-avoid-disabling-pixel-clock-twice-on-suspend.patch b/queue-4.14/drm-fsl-dcu-avoid-disabling-pixel-clock-twice-on-suspend.patch new file mode 100644 index 00000000000..65f9acb517d --- /dev/null +++ b/queue-4.14/drm-fsl-dcu-avoid-disabling-pixel-clock-twice-on-suspend.patch @@ -0,0 +1,36 @@ +From 9306e996574f7f57136a62e49cd0075f85713623 Mon Sep 17 00:00:00 2001 +From: Stefan Agner +Date: Thu, 9 Nov 2017 15:39:56 +0100 +Subject: drm/fsl-dcu: avoid disabling pixel clock twice on suspend + +From: Stefan Agner + +commit 9306e996574f7f57136a62e49cd0075f85713623 upstream. + +With commit 0a70c998d0c5 ("drm/fsl-dcu: enable pixel clock when +enabling CRTC") the pixel clock is controlled by the CRTC code. +Disabling the pixel clock in suspend leads to a warning due to +the second clk_disable_unprepare call: + WARNING: CPU: 0 PID: 359 at drivers/clk/clk.c:594 clk_core_disable+0x8c/0x90 + +Remove clk_disable_unprepare call for pixel clock to avoid +unbalanced clock disable on suspend. + +Fixes: 0a70c998d0c5 ("drm/fsl-dcu: enable pixel clock when enabling CRTC") +Signed-off-by: Stefan Agner +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 1 - + 1 file changed, 1 deletion(-) + +--- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c ++++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c +@@ -210,7 +210,6 @@ static int fsl_dcu_drm_pm_suspend(struct + return PTR_ERR(fsl_dev->state); + } + +- clk_disable_unprepare(fsl_dev->pix_clk); + clk_disable_unprepare(fsl_dev->clk); + + return 0; diff --git a/queue-4.14/drm-fsl-dcu-enable-irq-before-drm_atomic_helper_resume.patch b/queue-4.14/drm-fsl-dcu-enable-irq-before-drm_atomic_helper_resume.patch new file mode 100644 index 00000000000..348b9b2e7e2 --- /dev/null +++ b/queue-4.14/drm-fsl-dcu-enable-irq-before-drm_atomic_helper_resume.patch @@ -0,0 +1,39 @@ +From 9fd99f4f3f5e13ce959900ae57d64b1bdb51d823 Mon Sep 17 00:00:00 2001 +From: Stefan Agner +Date: Fri, 10 Nov 2017 10:15:28 +0100 +Subject: drm/fsl-dcu: enable IRQ before drm_atomic_helper_resume() + +From: Stefan Agner + +commit 9fd99f4f3f5e13ce959900ae57d64b1bdb51d823 upstream. + +The resume helpers wait for a vblank to occurre hence IRQ need +to be enabled. This avoids a warning as follows during resume: + WARNING: CPU: 0 PID: 314 at drivers/gpu/drm/drm_atomic_helper.c:1249 drm_atomic_helper_wait_for_vblanks.part.1+0x284/0x288 + [CRTC:28:crtc-0] vblank wait timed out + +Signed-off-by: Stefan Agner +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c ++++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c +@@ -232,6 +232,7 @@ static int fsl_dcu_drm_pm_resume(struct + if (fsl_dev->tcon) + fsl_tcon_bypass_enable(fsl_dev->tcon); + fsl_dcu_drm_init_planes(fsl_dev->drm); ++ enable_irq(fsl_dev->irq); + drm_atomic_helper_resume(fsl_dev->drm, fsl_dev->state); + + console_lock(); +@@ -239,7 +240,6 @@ static int fsl_dcu_drm_pm_resume(struct + console_unlock(); + + drm_kms_helper_poll_enable(fsl_dev->drm); +- enable_irq(fsl_dev->irq); + + return 0; + } diff --git a/queue-4.14/series b/queue-4.14/series new file mode 100644 index 00000000000..126462b299d --- /dev/null +++ b/queue-4.14/series @@ -0,0 +1,2 @@ +drm-fsl-dcu-avoid-disabling-pixel-clock-twice-on-suspend.patch +drm-fsl-dcu-enable-irq-before-drm_atomic_helper_resume.patch