From: Paolo Bonzini Date: Sat, 25 May 2024 08:03:22 +0000 (+0200) Subject: target/i386: no single-step exception after MOV or POP SS X-Git-Tag: v8.2.5~27 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=52031d6be53b51f78f2fd8d7c7314b3d0d5a2105;p=thirdparty%2Fqemu.git target/i386: no single-step exception after MOV or POP SS Intel SDM 18.3.1.4 "If an occurrence of the MOV or POP instruction loads the SS register executes with EFLAGS.TF = 1, no single-step debug exception occurs following the MOV or POP instruction." Cc: qemu-stable@nongnu.org Signed-off-by: Paolo Bonzini (cherry picked from commit f0f0136abba688a6516647a79cc91e03fad6d5d7) Signed-off-by: Michael Tokarev --- diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 981c6b4de7a..063727c912f 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -2795,7 +2795,7 @@ do_gen_eob_worker(DisasContext *s, bool inhibit, bool recheck_tf, bool jr) if (recheck_tf) { gen_helper_rechecking_single_step(tcg_env); tcg_gen_exit_tb(NULL, 0); - } else if (s->flags & HF_TF_MASK) { + } else if ((s->flags & HF_TF_MASK) && !inhibit) { gen_helper_single_step(tcg_env); } else if (jr && /* give irqs a chance to happen */