From: Amadeusz Sławiński Date: Mon, 14 Oct 2024 09:49:58 +0000 (+0200) Subject: ALSA: hda: Fix all stream interrupts definition X-Git-Tag: v6.13-rc1~123^2~23 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=52345d35622026b99271edc1c58ad7cfef3b7567;p=thirdparty%2Flinux.git ALSA: hda: Fix all stream interrupts definition It is defined in header to 0xFF, which only allows to set values for 8 streams. In specification it is defined as bits from 0 to 29. In practice there is no HW with 29 streams, but as the only place where the value is used is chip initialization, it is best to make sure that all bits are reset properly. Reviewed-by: Cezary Rojewski Signed-off-by: Amadeusz Sławiński Link: https://patch.msgid.link/20241014094958.708563-1-amadeuszx.slawinski@linux.intel.com Signed-off-by: Takashi Iwai --- diff --git a/include/sound/hda_register.h b/include/sound/hda_register.h index 5ff31e6d41c19..db1cc0b897fd3 100644 --- a/include/sound/hda_register.h +++ b/include/sound/hda_register.h @@ -180,7 +180,7 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 }; #define SD_STS_FIFO_READY 0x20 /* FIFO ready */ /* INTCTL and INTSTS */ -#define AZX_INT_ALL_STREAM 0xff /* all stream interrupts */ +#define AZX_INT_ALL_STREAM 0x3fffffff /* all stream interrupts */ #define AZX_INT_CTRL_EN 0x40000000 /* controller interrupt enable bit */ #define AZX_INT_GLOBAL_EN 0x80000000 /* global interrupt enable bit */