From: Shahar Shitrit Date: Wed, 19 Feb 2025 08:58:07 +0000 (+0200) Subject: net/mlx5: Add new health syndrome error and crr bit offset X-Git-Tag: v6.15-rc1~116^2~36^2~1 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=531ca2b9a215d072ffb4b1ff760a73f5e80c9c46;p=thirdparty%2Fkernel%2Flinux.git net/mlx5: Add new health syndrome error and crr bit offset Add new error value for trust lockdown in health syndrome enum. Also, include the offset for crr bit in the health buffer layout. These changes prepare for downstream patches that update health event handling. Signed-off-by: Shahar Shitrit Signed-off-by: Tariq Toukan Link: https://patch.msgid.link/20250219085808.349923-2-tariqt@nvidia.com Signed-off-by: Leon Romanovsky --- diff --git a/include/linux/mlx5/device.h b/include/linux/mlx5/device.h index 0c48b20f818a9..fd37f4e54d761 100644 --- a/include/linux/mlx5/device.h +++ b/include/linux/mlx5/device.h @@ -538,6 +538,7 @@ struct mlx5_cmd_layout { }; enum mlx5_rfr_severity_bit_offsets { + MLX5_CRR_BIT_OFFSET = 0x6, MLX5_RFR_BIT_OFFSET = 0x7, }; diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h index 4f3716e124c9c..cc2875e843f7f 100644 --- a/include/linux/mlx5/mlx5_ifc.h +++ b/include/linux/mlx5/mlx5_ifc.h @@ -11119,6 +11119,7 @@ enum { MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR = 0xf, MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR = 0x10, MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PCI_POISONED_ERR = 0x12, + MLX5_INITIAL_SEG_HEALTH_SYNDROME_TRUST_LOCKDOWN_ERR = 0x13, }; struct mlx5_ifc_initial_seg_bits {