From: Mark Corbin <mark@dibsco.co.uk>
Date: Mon, 16 Sep 2024 15:51:05 +0000 (+1000)
Subject: bsd-user: Implement RISC-V CPU register cloning and reset functions
X-Git-Tag: v9.2.0-rc0~66^2~14
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=5341bf6afe86895be900e1709b62f9d4af9f97d8;p=thirdparty%2Fqemu.git

bsd-user: Implement RISC-V CPU register cloning and reset functions

Added functions for cloning CPU registers and resetting the CPU state
for RISC-V architecture.

Signed-off-by: Mark Corbin <mark@dibsco.co.uk>
Signed-off-by: Ajeet Singh <itachis@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20240916155119.14610-4-itachis@FreeBSD.org>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---

diff --git a/bsd-user/riscv/target_arch_cpu.h b/bsd-user/riscv/target_arch_cpu.h
index 9c31d9dc4cb..a93ea3915a1 100644
--- a/bsd-user/riscv/target_arch_cpu.h
+++ b/bsd-user/riscv/target_arch_cpu.h
@@ -131,4 +131,18 @@ static inline void target_cpu_loop(CPURISCVState *env)
     }
 }
 
+static inline void target_cpu_clone_regs(CPURISCVState *env, target_ulong newsp)
+{
+    if (newsp) {
+        env->gpr[xSP] = newsp;
+    }
+
+    env->gpr[xA0] = 0;
+    env->gpr[xT0] = 0;
+}
+
+static inline void target_cpu_reset(CPUArchState *env)
+{
+}
+
 #endif /* TARGET_ARCH_CPU_H */