From: Philippe Mathieu-Daudé Date: Sun, 23 Mar 2025 15:22:41 +0000 (+0100) Subject: target/ppc: Register CPUClass:list_cpus X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=53c895fbb2d31b0de6a04a6f7e86e17b48324dc8;p=thirdparty%2Fqemu.git target/ppc: Register CPUClass:list_cpus Register ppc_cpu_list() as CPUClass:list_cpus callback. Reduce its scope and remove the cpu_list definition. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Reviewed-by: Richard Henderson Reviewed-by: Zhao Liu Message-Id: <20250324185837.46506-4-philmd@linaro.org> --- diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 3c02f7f7d4..f4cc823c5c 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1610,8 +1610,6 @@ void ppc_store_dawrx1(CPUPPCState *env, uint32_t value); #endif /* !defined(CONFIG_USER_ONLY) */ void ppc_store_msr(CPUPPCState *env, target_ulong value); -void ppc_cpu_list(void); - /* Time-base and decrementer management */ uint64_t cpu_ppc_load_tbl(CPUPPCState *env); uint32_t cpu_ppc_load_tbu(CPUPPCState *env); @@ -1673,8 +1671,6 @@ static inline uint64_t ppc_dump_gpr(CPUPPCState *env, int gprn) int ppc_dcr_read(ppc_dcr_t *dcr_env, int dcrn, uint32_t *valp); int ppc_dcr_write(ppc_dcr_t *dcr_env, int dcrn, uint32_t val); -#define cpu_list ppc_cpu_list - /* MMU modes definitions */ #define MMU_USER_IDX 0 static inline int ppc_env_mmu_index(CPUPPCState *env, bool ifetch) diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index fde7d71fc6..077991ed53 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -7177,7 +7177,7 @@ static void ppc_cpu_list_entry(gpointer data, gpointer user_data) g_free(name); } -void ppc_cpu_list(void) +static void ppc_cpu_list(void) { GSList *list; @@ -7521,6 +7521,7 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data) &pcc->parent_phases); cc->class_by_name = ppc_cpu_class_by_name; + cc->list_cpus = ppc_cpu_list; cc->dump_state = ppc_cpu_dump_state; cc->set_pc = ppc_cpu_set_pc; cc->get_pc = ppc_cpu_get_pc;