From: Yoshihiro Shimoda Date: Tue, 11 Jun 2024 12:50:53 +0000 (+0900) Subject: PCI: dwc: Add PCIE_PORT_{FORCE,LANE_SKEW} macros X-Git-Tag: v6.11-rc1~97^2~5^2~3 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=544a18c936f99245bca5b990039152b816abc4ee;p=thirdparty%2Fkernel%2Flinux.git PCI: dwc: Add PCIE_PORT_{FORCE,LANE_SKEW} macros R-Car Gen4 PCIe controller needs to use the Synopsys-specific PCIe configuration registers. So, add the macros. Link: https://lore.kernel.org/linux-pci/20240611125057.1232873-2-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Yoshihiro Shimoda Signed-off-by: Krzysztof WilczyƄski Reviewed-by: Manivannan Sadhasivam --- diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index f8e5431a207bd..0476f9b6186b2 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -71,6 +71,9 @@ #define LINK_WAIT_IATU 9 /* Synopsys-specific PCIe configuration registers */ +#define PCIE_PORT_FORCE 0x708 +#define PORT_FORCE_DO_DESKEW_FOR_SRIS BIT(23) + #define PCIE_PORT_AFR 0x70C #define PORT_AFR_N_FTS_MASK GENMASK(15, 8) #define PORT_AFR_N_FTS(n) FIELD_PREP(PORT_AFR_N_FTS_MASK, n) @@ -92,6 +95,9 @@ #define PORT_LINK_MODE_4_LANES PORT_LINK_MODE(0x7) #define PORT_LINK_MODE_8_LANES PORT_LINK_MODE(0xf) +#define PCIE_PORT_LANE_SKEW 0x714 +#define PORT_LANE_SKEW_INSERT_MASK GENMASK(23, 0) + #define PCIE_PORT_DEBUG0 0x728 #define PORT_LOGIC_LTSSM_STATE_MASK 0x1f #define PORT_LOGIC_LTSSM_STATE_L0 0x11