From: Thomas Preud'homme Date: Fri, 16 Mar 2018 14:18:53 +0000 (+0000) Subject: [ARM] Fix bxns mask X-Git-Tag: users/ARM/embedded-binutils-2_30-branch-2018q2~25 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=54ef1671ba67210fb24e41d898ceea6939e9b1f5;p=thirdparty%2Fbinutils-gdb.git [ARM] Fix bxns mask Bit 7 of BXNS is a fixed bit which distinguish it from BLXNS. Yet it is not set in the disassembler entry mask. This commit fixes that. 2018-03-16 Thomas Preud'homme Backport from mainline 2018-02-19 Thomas Preud'homme opcodes/ * arm-dis.c (thumb_opcodes): Fix BXNS mask. --- diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index dcca8ce5c9c..cae90ebe124 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,10 @@ +2018-03-16 Thomas Preud'homme + + Backport from mainline + 2018-02-19 Thomas Preud'homme + + * arm-dis.c (thumb_opcodes): Fix BXNS mask. + 2018-02-05 Nick Clifton * po/pt_BR.po: Updated Brazilian Portuguese translation. diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index 5efe0316222..afa9410b4f4 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -2530,7 +2530,7 @@ static const struct opcode16 thumb_opcodes[] = /* ARMv8-M Security Extensions instructions. */ {ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8M), 0x4784, 0xff87, "blxns\t%3-6r"}, - {ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8M), 0x4704, 0xff07, "bxns\t%3-6r"}, + {ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8M), 0x4704, 0xff87, "bxns\t%3-6r"}, /* ARM V8 instructions. */ {ARM_FEATURE_CORE_LOW (ARM_EXT_V8), 0xbf50, 0xffff, "sevl%c"},